tree cac2ee59928935441baf617c43fb312c7347297f
parent 3709844f2366cd75eacee1deeedadaa507ddc9a1
author Marek Vasut <marex@denx.de> 1438029257 +0200
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1454254376 +0100

arm: cache: Implement cache range check for v7

Add code to aid tracking down cache alignment issues.
In case DEBUG is defined in the cache.c, this code will
check alignment of each attempt to flush/invalidate data
cache and print a warning if the alignment is incorrect.
If DEBUG is not defined, this code is optimized out.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>