tree eeba4e2a173aa09ab03548885d535f169fa86077
parent 4b564460023a8cbf58d56f354e8ab45264770825
author Quentin Schulz <quentin.schulz@theobroma-systems.com> 1668422026 +0100
committer Kever Yang <kever.yang@rock-chips.com> 1673863270 +0800

rockchip: clk: add watchdog clock to px30_clk_enable

Add the PCLK_WDT_NS clock to px30_clk_enable so that the watchdog driver
can probe since it wants to enable this clock.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>