tree 2dc0166b2a3f27fd131cf19880be12db121bcb6d
parent 8792a64d87708139bc0cf8b48d4a580a39167473
author Icenowy Zheng <icenowy@aosc.io> 1500530431 +0800
committer Jagan Teki <jagan@amarulasolutions.com> 1502446779 +0530

sunxi: add PRCM secure switch register definition

Some new Allwinner SoCs' PRCM has a secure switch register, which
controls the access to some clock and power registers in PRCM block.

Add the definition of this register and its bits in the PRCM header
file.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>