/dts-v1/;

#include "tegra20.dtsi"

/ {
	model = "NVIDIA Tegra20 Ventana evaluation board";
	compatible = "nvidia,ventana", "nvidia,tegra20";

	chosen {
		stdout-path = &uartd;
	};

	aliases {
		usb0 = "/usb@c5008000";
		sdhci0 = "/sdhci@c8000600";
		sdhci1 = "/sdhci@c8000400";
	};

	memory {
		reg = <0x00000000 0x40000000>;
	};

	host1x@50000000 {
		status = "okay";
		dc@54200000 {
			status = "okay";
			rgb {
				status = "okay";
				nvidia,panel = <&lcd_panel>;
			};
		};
	};

	serial@70006300 {
		clock-frequency = < 216000000 >;
	};

	usb@c5008000 {
		status = "okay";
	};

	sdhci@c8000400 {
		status = "okay";
		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		bus-width = <8>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	pwm: pwm@7000a000 {
		status = "okay";
	};

	lcd_panel: panel {
		clock = <72072000>;
		xres = <1366>;
		yres = <768>;
		left-margin = <58>;
		right-margin = <58>;
		hsync-len = <58>;
		lower-margin = <4>;
		upper-margin = <4>;
		vsync-len = <4>;
		hsync-active-high;
		vsync-active-high;
		nvidia,bits-per-pixel = <16>;
		nvidia,pwm = <&pwm 2 0>;
		nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(D, 4)
							GPIO_ACTIVE_HIGH>;
		nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
							GPIO_ACTIVE_HIGH>;
		nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
							GPIO_ACTIVE_HIGH>;
		nvidia,panel-vdd-gpios = <&gpio TEGRA_GPIO(C, 6)
							GPIO_ACTIVE_HIGH>;
		nvidia,panel-timings = <0 0 200 0 0>;
	};
};