tree 7eb2da32590f4c48bc9e2ef8cde5ae85c3d9e7bf
parent 536c642ffef545b4b5b02d065a0c1de9785549d7
parent 3655dd22a4c219d0ee69dc4a29e5553c1a1bb5d7
author Tom Rini <trini@konsulko.com> 1669138428 -0500
committer Tom Rini <trini@konsulko.com> 1669138428 -0500
mergetag object 3655dd22a4c219d0ee69dc4a29e5553c1a1bb5d7
 type commit
 tag xilinx-for-v2023.01-rc3
 tagger Michal Simek <michal.simek@amd.com> 1669125730 +0100
 
 Xilinx changes for v2023.01-rc3
 
 microblaze:
 - Enable 32 bit addressing mode for SPIs
 
 zynq:
 - Minor DT fixes (PL clock enabling)
 
 zynqmp:
 - Disable watchdog by default
 - Remove unused xlnx,eeprom chosen support
 - Add missing symlink for vck190 SC revB
 - Use mdio bus with ethernet-phy-id description
 
 versal:
 - Add mini qspi/ospi configuration
 
 versal-net:
 - Add soc driver
 - Fix Kconfig entry for SOC
 - Fix loading address location for MINI configuration
 - Disable LMB for mini configuration
 
 net:
 - Fix ethernet-phy-id usage in the code
 
 pinctrl:
 - Revert high impedance/output enable support
 
 timer:
 - Fix timer relocation for Microblaze
 - Fix timer wrap in 32bit Xilinx timer driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCY3zfWQAKCRDKSWXLKUoM
 IRjpAJ4pETCmZ31k2itaK9VBtTzog/bP5QCfU9gJDb+TSWtZSwGzXLuy7Bq+ZkU=
 =29kc
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2023.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2023.01-rc3

microblaze:
- Enable 32 bit addressing mode for SPIs

zynq:
- Minor DT fixes (PL clock enabling)

zynqmp:
- Disable watchdog by default
- Remove unused xlnx,eeprom chosen support
- Add missing symlink for vck190 SC revB
- Use mdio bus with ethernet-phy-id description

versal:
- Add mini qspi/ospi configuration

versal-net:
- Add soc driver
- Fix Kconfig entry for SOC
- Fix loading address location for MINI configuration
- Disable LMB for mini configuration

net:
- Fix ethernet-phy-id usage in the code

pinctrl:
- Revert high impedance/output enable support

timer:
- Fix timer relocation for Microblaze
- Fix timer wrap in 32bit Xilinx timer driver