tree 17cce9082494287a275f9262670ccf7329fdc7ab
parent b7d6e104fbfd54b7ffe9e0a00200e98dd2904a65
author Jagan Teki <jagan@amarulasolutions.com> 1587661254 +0530
committer Jagan Teki <jagan@amarulasolutions.com> 1588266260 +0530

spi: sifive: Fix format register proto field

SiFive SPI controller has a proto bit field in frame format
register which would be used to configure the SPI I/O protocol
lines used on specific transfer. 

Right now the driver is configuring this proto using slave->mode,
for all types of transctions. This makes the driver unable to
function since the proto needs to configure dynamically for
each and every transaction separately at runtime.

Now, the controller driver supports per transfer via spi-mem
exec_opo, so add the fmt_proto flag and fill the per transfer
buswidth so that the controller configures the proto bit at
runtime.

This patch fixes the SPI controller works with SPI NOR flash
on quad read with page program.

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>