commit 64531496f990c2a63211c72b953dfc084b4c2589
author Andre Przywara <andre.przywara@arm.com> Mon Nov 28 00:02:56 2022 +0000
committer Andre Przywara <andre.przywara@arm.com> Wed Dec 14 22:31:33 2022 +0000
tree 1703fef2feb486e971c760b79e128c6b8a5d8b10
parent eeaca6ac27ccfd75956c1ad6ca27d9b9caf62c96

sunxi: board: annotate #endif lines

The legacy Allwinner code is cluttered with #ifdef's, some of them even
nested, which makes the code hard to read and error prone.
Eventually we will get rid of most of them, but for now let's at least
annotate the #endif lines with the corresponding symbol the bracket
started with.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

arch/arm/mach-sunxi/board.c

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 8623363..0c4b6dd 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -73,7 +73,7 @@
 
 	return gd->ram_top;
 }
-#endif
+#endif /* CONFIG_ARM64 */
 
 #ifdef CONFIG_SPL_BUILD
 static int gpio_init(void)
@@ -196,7 +196,7 @@
 	return 0;
 }
 SPL_LOAD_IMAGE_METHOD("FEL", 0, BOOT_DEVICE_BOARD, spl_board_load_image);
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
 #define SUNXI_INVALID_BOOT_SOURCE	-1
 
@@ -457,7 +457,7 @@
 #endif
 	sunxi_board_init();
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
 #if !CONFIG_IS_ENABLED(SYSRESET)
 void reset_cpu(void)
@@ -490,7 +490,7 @@
 	while (1) { }
 #endif
 }
-#endif
+#endif /* CONFIG_SYSRESET */
 
 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && defined(CONFIG_CPU_V7A)
 void enable_caches(void)

arch/arm/mach-sunxi/clock_sun6i.c

diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index cda6949..6bd75a1 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -63,7 +63,7 @@
 	setbits_le32(&ccm->sata_clk_cfg, CCM_SATA_CTRL_ENABLE);
 #endif
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
 void clock_init_sec(void)
 {
@@ -172,7 +172,7 @@
 		       &ccm->cpu_axi_cfg);
 	}
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
 void clock_set_pll3(unsigned int clk)
 {

board/sunxi/board.c

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 4fe749f..827e545 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -351,7 +351,7 @@
 	sunxi_nand_init();
 #endif
 }
-#endif
+#endif /* CONFIG_NAND_SUNXI */
 
 #ifdef CONFIG_MMC
 static void mmc_pinmux_setup(int sdc)
@@ -554,7 +554,7 @@
 	}
 }
 #endif
-#endif
+#endif /* CONFIG_MMC */
 
 #ifdef CONFIG_SPL_BUILD
 
@@ -670,7 +670,7 @@
 	else
 		printf("Failed to set core voltage! Can't set CPU frequency\n");
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
 #ifdef CONFIG_USB_GADGET
 int g_dnl_board_usb_cable_connected(void)
@@ -699,7 +699,7 @@
 
 	return sun4i_usb_phy_vbus_detect(&phy);
 }
-#endif
+#endif /* CONFIG_USB_GADGET */
 
 #ifdef CONFIG_SERIAL_TAG
 void get_board_serial(struct tag_serialnr *serialnr)
@@ -928,7 +928,6 @@
 }
 
 #ifdef CONFIG_SPL_LOAD_FIT
-
 static void set_spl_dt_name(const char *name)
 {
 	struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION);
@@ -996,4 +995,4 @@
 
 	return ret;
 }
-#endif
+#endif /* CONFIG_SPL_LOAD_FIT */