tree 592fb707b77e2a37a5259119149566192a7d7e49
parent aea17f99278818caa327ad0e511b48d1761fb10c
author Xie Xiaobo <r63061@freescale.com> 1173438505 +0800
committer Kim Phillips <kim.phillips@freescale.com> 1176417543 -0500

Fix two bugs for MPC83xx DDR2 controller SPD Init

There are a few bugs in the cpu/mpc83xx/spd_sdram.c
the first bug is that the picos_to_clk routine introduces a huge
rounding error in 83xx.
the second bug is that the mode register write recovery field is
tWR-1, not tWR >> 1.