tree aff4796e19e86f23d01e1392961984740cb1da6d
parent f0f76b0a4c7181b2cbde39ec04eac8973cd4ad1f
author Akshay Saraswat <akshay.s@samsung.com> 1424419037 +0530
committer Minkyu Kang <mk7.kang@samsung.com> 1425114226 +0900

Exynos542x: add L2 control register configuration

This patch does 3 things:
1. Enables ECC by setting 21st bit of L2CTLR.
2. Restore data and tag RAM latencies to 3 cycles because iROM sets
   0x3000400 L2CTLR value during switching.
3. Disable clean/evict push to external by setting 3rd bit of L2ACTLR.
   We need to restore this here due to switching.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>