tree d4321481b59e6f2969efd57b810f91737c28c4a5
parent f43a009959e6c1f1ace8b76ef525651ac4729c9d
author Icenowy Zheng <icenowy@aosc.xyz> 1496481016 +0800
committer Jagan Teki <jagan@amarulasolutions.com> 1496941675 +0530

sunxi: add option for 16-bit DW DRAM controller

Some Allwinner SoCs features a DesignWare-like controller with only 16
bit bus width.

Add support for them.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>