tree d1a45ee6ae8360286e17e02b0a8b0e30408beb5f
parent 69b6a796f7a7cf2a7946e07e32346bf5595829d5
author Saksham Jain <saksham.jain@nxp.com> 1458730482 +0530
committer York Sun <york.sun@nxp.com> 1459266382 -0700

crypto/fsl: Make CAAM transactions cacheable

This commit solves CAAM coherency issue on ls2080. When caches are
enabled and CAAM's DMA's AXI transcations are not made cacheable,
Core reads/writes data from/to caches and CAAM does from main memory.
This forces data flushes to synchronize various data structures. But
even if any data in proximity of these structures is read by core,
these structures again are fetched in caches.

To avoid this problem, either all the data that CAAM accesses can be
made cache line aligned or CAAM transcations can be made cacheable.

So, this commit makes CAAM transcations as write back with write and
read allocate.

Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>