tree 248794f2acee19cbdf706953c81a25a525753eb6
parent fc001432e5b0fab912f883ef861416cd3bdc951a
author Michal Simek <michal.simek@amd.com> 1725349695 +0200
committer Michal Simek <michal.simek@amd.com> 1726813917 +0200

xilinx: Enable SIMPLE_PM_BUS

Enable simple-pm-bus driver to handle case where axi bus coming between PS
(fixed) part to PL (programmable) part has own clock or power domain.
That's why enable driver to be ready for this configuration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b9f4bb85be502616edf3be2b79e52a0e2c03e821.1725349691.git.michal.simek@amd.com