/*
 * Device Tree Source for UniPhier ProXstream2 SoC
 *
 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+	X11
 */

/include/ "uniphier-common32.dtsi"

/ {
	compatible = "socionext,proxstream2";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "socionext,uniphier-smp";

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <2>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <3>;
		};
	};

	clocks {
		arm_timer_clk: arm_timer_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <50000000>;
		};

		uart_clk: uart_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <88900000>;
		};

		i2c_clk: i2c_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <50000000>;
		};
	};
};

&soc {
	i2c0: i2c@58780000 {
		compatible = "socionext,uniphier-fi2c";
		status = "disabled";
		reg = <0x58780000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0 41 4>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c0>;
		clocks = <&i2c_clk>;
		clock-frequency = <100000>;
	};

	i2c1: i2c@58781000 {
		compatible = "socionext,uniphier-fi2c";
		status = "disabled";
		reg = <0x58781000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0 42 4>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c1>;
		clocks = <&i2c_clk>;
		clock-frequency = <100000>;
	};

	i2c2: i2c@58782000 {
		compatible = "socionext,uniphier-fi2c";
		status = "disabled";
		reg = <0x58782000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c2>;
		interrupts = <0 43 4>;
		clocks = <&i2c_clk>;
		clock-frequency = <100000>;
	};

	i2c3: i2c@58783000 {
		compatible = "socionext,uniphier-fi2c";
		status = "disabled";
		reg = <0x58783000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0 44 4>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3>;
		clocks = <&i2c_clk>;
		clock-frequency = <100000>;
	};

	/* chip-internal connection for DMD */
	i2c4: i2c@58784000 {
		compatible = "socionext,uniphier-fi2c";
		reg = <0x58784000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0 45 4>;
		clocks = <&i2c_clk>;
		clock-frequency = <400000>;
	};

	/* chip-internal connection for STM */
	i2c5: i2c@58785000 {
		compatible = "socionext,uniphier-fi2c";
		reg = <0x58785000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0 25 4>;
		clocks = <&i2c_clk>;
		clock-frequency = <400000>;
	};

	/* chip-internal connection for HDMI */
	i2c6: i2c@58786000 {
		compatible = "socionext,uniphier-fi2c";
		reg = <0x58786000 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0 26 4>;
		clocks = <&i2c_clk>;
		clock-frequency = <400000>;
	};

	usb0: usb@65a00000 {
		compatible = "socionext,uniphier-xhci", "generic-xhci";
		status = "disabled";
		reg = <0x65a00000 0x100>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
		interrupts = <0 134 4>;
	};

	usb1: usb@65c00000 {
		compatible = "socionext,uniphier-xhci", "generic-xhci";
		status = "disabled";
		reg = <0x65c00000 0x100>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
		interrupts = <0 137 4>;
	};
};

&serial0 {
	clock-frequency = <88900000>;
};

&serial1 {
	clock-frequency = <88900000>;
};

&serial2 {
	clock-frequency = <88900000>;
};

&serial3 {
	clock-frequency = <88900000>;
};

&pinctrl {
	compatible = "socionext,proxstream2-pinctrl", "syscon";
};