tree 5e566170229207049451ce212aee2f54a1bbd173
parent 290f1f999a42fd08f3483722a61e2d9e0901eb17
author Peter Crosthwaite <crosthwaitepeter@gmail.com> 1409224599 +1000
committer Michal Simek <michal.simek@xilinx.com> 1415700127 +0100

arm: dts: zynq: Add digilent ZYBO board dts

It's a Zynq board similar in design to the currently supported ones.
512MB of RAM and UART1 is used.

Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>