tree 158ed8e068ebbfa6b283937fe6c98b3c41a56d9b
parent 4709805657db221b05192d575392ebfd977ee1d2
author Reinhard Pfau <reinhard.pfau@gdsys.cc> 1458116413 +0100
committer Stefan Roese <sr@denx.de> 1458548437 +0100

strider: use optimised bus timing for FPGA access

Use optimised bus timing for FPGA access.

Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>