tree 354f9d78a676e58b3cbdbae40f31460f6ab749e2
parent b21626d4cb4ed258755b64e36baedb5e040ebf20
author Simon Glass <sjg@chromium.org> 1683240903 -0600
committer Bin Meng <bmeng@tinylab.org> 1683771929 +0800

x86: coreboot: Document how to enable the debug UART

This is not obvious so add a little note about how it works.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>