tree bb4f46357fba0cf1dd5a89871215f71c98ae5eca
parent f54fe87acedbbad7d29ad18cab31d2b323717514
author York Sun <yorksun@freescale.com> 1273241521 -0500
committer Kumar Gala <galak@kernel.crashing.org> 1273658070 -0500

Enabled support for Rev 1.3 SPD for DDR2 DIMMs

SPD has minor change from Rev 1.2 to 1.3. This patch enables Rev 1.3.
The difference has ben examined and the code is compatible.
Speed bins is not verified on hardware for CL7 at this moment.

This patch also enables SPD Rev 1.x where x is up to "F". According to SPD
spec, the lower nibble is optionally used to determine which additinal bytes
or attribute bits have been defined. Software can safely use defaults. However,
the upper nibble should always be checked.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>