tree 50cf563182ac9e3c6b6dbb326b39cbfdb73eb6da
parent 25aaebdb123b1c59c95d5515a06f14537a870855
author Fabio Estevam <fabio.estevam@nxp.com> 1482800681 -0200
committer Stefano Babic <sbabic@denx.de> 1483373557 +0100

mx6qsabreauto: Fix the EIM clock for the mx6qp variant

On the MX6Q the aclk_eim_slow_podf field is '1' after POR, while on the
MX6DQP it is '3'.

This makes the EIM clock to be only 66MHz on the mx6qp variant, instead of
132 MHz.

Instead of relying on the POR values for the CSMR1 register, make sure to
manually configure the clk_eim_slow_sel field as '00' so that EIM clock is
derived from AXI clock and the aclk_eim_slow_podf field as '1' so that EIM
clock can be AXI clock divided by 2.

This way a consistent EIM clock frequency is configured for all the mx6
variants.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>