tree cf67611feca62b5d3d8109dfd5b0d4988a65efa6
parent 0cb3d82c68012887475eba12ee3d8b82894b460b
author Peng Fan <peng.fan@nxp.com> 1487751702 +0800
committer Stefano Babic <sbabic@denx.de> 1489739228 +0100

imx: mx7ulp: Add clock framework and functions

Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.

SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.

In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>