tree cd415656cc2c7d527feae832c5026e4a23052ac4
parent c41045411bbb64eeda2d404b79723f8d2802351c
author Sean Anderson <seanga2@gmail.com> 1600689096 -0400
committer Andes <uboot@andestech.com> 1601427292 +0800

riscv: Match memory barriers between send_ipi_many and handle_ipi

Without a matching barrier on the write side, the barrier in handle_ipi
does nothing. It was entirely possible for the boot hart to write to addr,
arg0, and arg1 *after* sending the IPI, because there was no barrier on the
sending side.

Fixes: 90ae281437 ("riscv: add option to wait for ack from secondary harts in smp functions")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>