tree 5ce95a3ed9f5ee894892e85774dcf8f945ef31e7
parent d2f68006627eda6cb6c7f364bddf621dbfd2fc68
author Rafal Jaworowski <raj@semihalf.com> 1185898794 +0200
committer Stefan Roese <sr@denx.de> 1186035918 +0200

[ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A

This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>