tree 76a89a18838a4d5c275540b68c04704a138841c4
parent cdf21a8696a4ce6cb3103b175665fdc458b04d57
author Elaine Zhang <zhangqing@rock-chips.com> 1697105892 +0800
committer Kever Yang <kever.yang@rock-chips.com> 1698056515 +0800

clk: rockchip: rk3588: Avoid re-setting the pll rate of dclk_vop's parent

Optimize setting process.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>