tree 9be74259d29df83bd05b2a3a06353633eeb441cc
parent 5dbdd3a600906f56a19c9a82a741705988851a28
author Marek Vasut <marek.vasut+renesas@gmail.com> 1540994810 +0100
committer Marek Vasut <marex@denx.de> 1541170633 +0100

ARM: rmobile: Generate fitting mem_map on Gen3

Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.

This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes: c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>