tree 31f9b38ead0b52626eacc8e806db76c10686f16a
parent cf4128e53caa4f7b0a6586fc3f10690d5c05db31
author mario.six@gdsys.cc <mario.six@gdsys.cc> 1484638427 +0100
committer York Sun <york.sun@nxp.com> 1485884106 -0800

powerpc: mpc83xx: Minimize r1 modification

The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>