tree a187ad9403f8e304c9dd954aec3a8aad51557e08
parent 56747bfdbd6f2c5bc391d0c9d5eb20a6a2d50505
author Alex Porosanu <alexandru.porosanu@freescale.com> 1461932278 +0300
committer York Sun <york.sun@nxp.com> 1463586706 -0700

arch/arm: add SEC JR0 offset

Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)

Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>