tree 819dece576ce94a497c9c95dd5a1c917efd84980
parent 50a874b3b0272f32e3627732fab90b27fbd35066
author Adam Graham <agraham@amcc.com> 1223313373 -0700
committer Stefan Roese <sr@denx.de> 1223458583 +0200

ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change

After changing SDRAM_CLKTR phase value rerun the memory preload
initialization sequence (INITPLR) to reset and relock the memory
DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
adjustment effects the phase relationship of the internal, to the
PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.

Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>