tree 83a9de28154eee826825b5d1e8ca5271a7dce70d
parent c1412cbb17b2f6cd6c2301d7102346bec3a260d6
author Oleksandr Suvorov <oleksandr.suvorov@foundries.io> 1631127403 +0300
committer Stefano Babic <sbabic@denx.de> 1633636729 +0200

mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP

Import HS400 support for iMX7ULP B0 from the Linux kernel:

2eaf5a533afd ("mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP")

According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET
before any setting of STROBE_DLL_CTRL register.

USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL)
for slave sel value. If this register bits value is 0,  it needs
256 ref_clk cycles to update slave sel value. IC suggest to set
bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave
sel value. This will short the lock time of slave.

i.MX7ULP B0 will need more time to lock the REF and SLV, so change
to add 5us delay.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>