blob: cb3e174841838351ba8c66c8cfc63e5531961ccd [file] [log] [blame]
Sascha Hauercaebc952008-03-26 20:41:09 +01001/*
2 *
3 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24
25#include <common.h>
26#include <asm/arch/mx31.h>
27#include <asm/arch/mx31-regs.h>
28
29DECLARE_GLOBAL_DATA_PTR;
30
31int dram_init (void)
32{
33 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
34 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
35
36 return 0;
37}
38
39int board_init (void)
40{
41 __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
42 __REG(CSCR_L(0)) = 0xa0330d01;
43 __REG(CSCR_A(0)) = 0x00220800;
44
45 __REG(CSCR_U(4)) = 0x0000dcf6; /* CS4: Network Controller */
46 __REG(CSCR_L(4)) = 0x444a4541;
47 __REG(CSCR_A(4)) = 0x44443302;
48
49 /* setup pins for UART1 */
50 mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
51 mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
52 mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
Magnus Liljab6b183c2008-08-03 21:43:37 +020053 mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
Sascha Hauercaebc952008-03-26 20:41:09 +010054
Magnus Liljaf9204e12008-04-20 10:38:12 +020055 /* SPI2 */
Magnus Lilja5276a352008-08-03 21:44:10 +020056 mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
57 mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
58 mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
59 mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
60 mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
61 mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
62 mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
Magnus Liljaf9204e12008-04-20 10:38:12 +020063
64 /* start SPI2 clock */
65 __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
66
Magnus Lilja17c9de62008-04-20 10:35:03 +020067 gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
Sascha Hauercaebc952008-03-26 20:41:09 +010068 gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
69
70 return 0;
71}
72
73int checkboard (void)
74{
75 printf("Board: i.MX31 Litekit\n");
76 return 0;
77}