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Mike Frysinger9171fc82008-03-30 15:46:13 -04001/*
Bin Menga1875592016-02-05 19:30:11 -08002 * U-Boot - start.S Startup file for Blackfin U-Boot
Mike Frysinger9171fc82008-03-30 15:46:13 -04003 *
Mike Frysinger96092222008-10-11 21:18:10 -04004 * Copyright (c) 2005-2008 Analog Devices Inc.
Mike Frysinger9171fc82008-03-30 15:46:13 -04005 *
6 * This file is based on head.S
7 * Copyright (c) 2003 Metrowerks/Motorola
8 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
9 * Kenneth Albanowski <kjahds@kjahds.com>,
10 * The Silver Hammer Group, Ltd.
11 * (c) 1995, Dionne & Associates
12 * (c) 1995, DKG Display Tech.
13 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020014 * SPDX-License-Identifier: GPL-2.0+
Mike Frysinger9171fc82008-03-30 15:46:13 -040015 */
16
17#include <config.h>
18#include <asm/blackfin.h>
Sonic Zhange9a389a2013-04-07 18:02:37 +080019#include <asm/mach-common/bits/watchdog.h>
Mike Frysinger9171fc82008-03-30 15:46:13 -040020#include <asm/mach-common/bits/core.h>
Mike Frysinger9171fc82008-03-30 15:46:13 -040021#include <asm/mach-common/bits/pll.h>
Sonic Zhang9d803fc2013-04-07 19:04:14 +080022#include <asm/serial.h>
Mike Frysinger9171fc82008-03-30 15:46:13 -040023
24/* It may seem odd that we make calls to functions even though we haven't
25 * relocated ourselves yet out of {flash,ram,wherever}. This is OK because
26 * the "call" instruction in the Blackfin architecture is actually PC
27 * relative. So we can call functions all we want and not worry about them
28 * not being relocated yet.
29 */
30
31.text
32ENTRY(_start)
33
34 /* Set our initial stack to L1 scratch space */
Mike Frysinger96092222008-10-11 21:18:10 -040035 sp.l = LO(L1_SRAM_SCRATCH_END - 20);
36 sp.h = HI(L1_SRAM_SCRATCH_END - 20);
Mike Frysinger9171fc82008-03-30 15:46:13 -040037
Mike Frysingerc745a842010-12-24 14:46:12 -050038 /* Optimization register tricks: keep a base value in the
39 * reserved P registers so we use the load/store with an
40 * offset syntax. R0 = [P5 + <constant>];
41 * P4 - system MMR base
42 * P5 - core MMR base
43 */
44#ifdef CONFIG_HW_WATCHDOG
45 p4.l = 0;
46 p4.h = HI(SYSMMR_BASE);
47#endif
48 p5.l = 0;
49 p5.h = HI(COREMMR_BASE);
50
Mike Frysinger9171fc82008-03-30 15:46:13 -040051#ifdef CONFIG_HW_WATCHDOG
Sonic Zhange9a389a2013-04-07 18:02:37 +080052 /* Program the watchdog with default timeout of ~5 seconds.
Mike Frysinger9171fc82008-03-30 15:46:13 -040053 * That should be long enough to bootstrap ourselves up and
Bin Menga1875592016-02-05 19:30:11 -080054 * then the common U-Boot code can take over.
Mike Frysinger9171fc82008-03-30 15:46:13 -040055 */
Sonic Zhange9a389a2013-04-07 18:02:37 +080056 r1 = WDDIS;
57# ifdef __ADSPBF60x__
58 [p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
59# else
60 W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
61# endif
62 SSYNC;
Mike Frysingerc745a842010-12-24 14:46:12 -050063 r0 = 0;
Sonic Zhange9a389a2013-04-07 18:02:37 +080064 r0.h = HI(MSEC_TO_SCLK(CONFIG_WATCHDOG_TIMEOUT_MSECS));
Mike Frysingerc745a842010-12-24 14:46:12 -050065 [p4 + (WDOG_CNT - SYSMMR_BASE)] = r0;
Sonic Zhange9a389a2013-04-07 18:02:37 +080066 SSYNC;
67 r1 = WDEN;
Mike Frysinger9171fc82008-03-30 15:46:13 -040068 /* fire up the watchdog - R0.L above needs to be 0x0000 */
Sonic Zhange9a389a2013-04-07 18:02:37 +080069# ifdef __ADSPBF60x__
70 [p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
71# else
72 W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
73# endif
74 SSYNC;
Bob Liu49c2da52011-12-27 15:05:53 +080075#endif
Mike Frysinger9171fc82008-03-30 15:46:13 -040076
77 /* Turn on the serial for debugging the init process */
78 serial_early_init
79 serial_early_set_baud
80
81 serial_early_puts("Init Registers");
82
Mike Frysinger70c4c032008-06-01 01:23:48 -040083 /* Disable self-nested interrupts and enable CYCLES for udelay() */
Mike Frysinger9171fc82008-03-30 15:46:13 -040084 R0 = CCEN | 0x30;
85 SYSCFG = R0;
86
87 /* Zero out registers required by Blackfin ABI.
88 * http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
89 */
90 r1 = 0 (x);
91 /* Disable circular buffers */
92 l0 = r1;
93 l1 = r1;
94 l2 = r1;
95 l3 = r1;
96 /* Disable hardware loops in case we were started by 'go' */
97 lc0 = r1;
98 lc1 = r1;
99
100 /* Save RETX so we can pass it while booting Linux */
101 r7 = RETX;
102
Mike Frysinger7527fee2009-11-09 19:38:23 -0500103#if CONFIG_MEM_SIZE
Mike Frysinger74398b22008-10-11 21:58:33 -0400104 /* Figure out where we are currently executing so that we can decide
105 * how to best reprogram and relocate things. We'll pass below:
106 * R4: load address of _start
107 * R5: current (not load) address of _start
Mike Frysinger9171fc82008-03-30 15:46:13 -0400108 */
Mike Frysinger74398b22008-10-11 21:58:33 -0400109 serial_early_puts("Find ourselves");
110
Mike Frysinger9171fc82008-03-30 15:46:13 -0400111 call _get_pc;
Mike Frysinger74398b22008-10-11 21:58:33 -0400112.Loffset:
113 r1.l = .Loffset;
114 r1.h = .Loffset;
115 r4.l = _start;
116 r4.h = _start;
117 r3 = r1 - r4;
118 r5 = r0 - r3;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400119
120 /* Inform upper layers if we had to do the relocation ourselves.
121 * This allows us to detect whether we were loaded by 'go 0x1000'
Mike Frysinger74398b22008-10-11 21:58:33 -0400122 * or by the bootrom from an LDR. "R6" is "loaded_from_ldr".
Mike Frysinger9171fc82008-03-30 15:46:13 -0400123 */
124 r6 = 1 (x);
Mike Frysinger74398b22008-10-11 21:58:33 -0400125 cc = r4 == r5;
126 if cc jump .Lnorelocate;
127 r6 = 0 (x);
128
Mike Frysingerc745a842010-12-24 14:46:12 -0500129 /* Turn off caches as they require CPLBs and a CPLB miss requires
130 * a software exception handler to process it. But we're about to
131 * clobber any previous executing software (like U-Boot that just
132 * launched a new U-Boot via 'go'), so any handler state will be
133 * unreliable after the memcpy below.
134 */
135 serial_early_puts("Kill Caches");
136 r0 = 0;
137 [p5 + (IMEM_CONTROL - COREMMR_BASE)] = r0;
138 [p5 + (DMEM_CONTROL - COREMMR_BASE)] = r0;
139 ssync;
140
Mike Frysinger74398b22008-10-11 21:58:33 -0400141 /* In bypass mode, we don't have an LDR with an init block
142 * so we need to explicitly call it ourselves. This will
143 * reprogram our clocks, memory, and setup our async banks.
144 */
145 serial_early_puts("Program Clocks");
146
147 /* if we're executing >=0x20000000, then we dont need to dma */
148 r3 = 0x0;
149 r3.h = 0x2000;
150 cc = r5 < r3 (iu);
151 if cc jump .Ldma_and_reprogram;
Mike Frysinger7527fee2009-11-09 19:38:23 -0500152#else
153 r6 = 1 (x); /* fake loaded_from_ldr = 1 */
154#endif
Mike Frysingerad907322009-02-13 17:10:58 -0500155 r0 = 0 (x); /* set bootstruct to NULL */
Mike Frysinger74398b22008-10-11 21:58:33 -0400156 call _initcode;
157 jump .Lprogrammed;
158
159 /* we're sitting in external memory, so dma into L1 and reprogram */
160.Ldma_and_reprogram:
161 r0.l = LO(L1_INST_SRAM);
162 r0.h = HI(L1_INST_SRAM);
Mike Frysingerb1e2c552009-11-03 06:11:31 -0500163 r1.l = __initcode_lma;
164 r1.h = __initcode_lma;
165 r2.l = __initcode_len;
166 r2.h = __initcode_len;
Mike Frysinger74398b22008-10-11 21:58:33 -0400167 r1 = r1 - r4; /* convert r1 from load address of initcode ... */
168 r1 = r1 + r5; /* ... to current (not load) address of initcode */
169 p3 = r0;
170 call _dma_memcpy_nocache;
Mike Frysingerad907322009-02-13 17:10:58 -0500171 r0 = 0 (x); /* set bootstruct to NULL */
Mike Frysinger74398b22008-10-11 21:58:33 -0400172 call (p3);
173
174 /* Since we reprogrammed SCLK, we need to update the serial divisor */
175.Lprogrammed:
176 serial_early_set_baud
Mike Frysinger9171fc82008-03-30 15:46:13 -0400177
Mike Frysinger7527fee2009-11-09 19:38:23 -0500178#if CONFIG_MEM_SIZE
Mike Frysingerb5eba3f2008-10-11 21:40:26 -0400179 /* Relocate from wherever we are (FLASH/RAM/etc...) to the hardcoded
Mike Frysingerdc2bfb02008-06-01 01:21:34 -0400180 * monitor location in the end of RAM. We know that memcpy() only
Mike Frysingerb5eba3f2008-10-11 21:40:26 -0400181 * uses registers, so it is safe to call here. Note that this only
182 * copies to external memory ... we do not start executing out of
183 * it yet (see "lower to 15" below).
Mike Frysinger9171fc82008-03-30 15:46:13 -0400184 */
185 serial_early_puts("Relocate");
Mike Frysinger74398b22008-10-11 21:58:33 -0400186 r0 = r4;
187 r1 = r5;
Mike Frysingerdc2bfb02008-06-01 01:21:34 -0400188 r2.l = LO(CONFIG_SYS_MONITOR_LEN);
189 r2.h = HI(CONFIG_SYS_MONITOR_LEN);
190 call _memcpy_ASM;
Mike Frysinger7527fee2009-11-09 19:38:23 -0500191#endif
Mike Frysinger9171fc82008-03-30 15:46:13 -0400192
Bob Liu28bfc402011-09-27 11:00:27 +0800193.Lnorelocate:
Mike Frysinger9171fc82008-03-30 15:46:13 -0400194 /* Initialize BSS section ... we know that memset() does not
195 * use the BSS, so it is safe to call here. The bootrom LDR
196 * takes care of clearing things for us.
197 */
198 serial_early_puts("Zero BSS");
Sonic Zhangc49eabe2014-07-17 19:00:29 +0800199 r0.l = __bss_start;
200 r0.h = __bss_start;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400201 r1 = 0 (x);
Mike Frysingerb1e2c552009-11-03 06:11:31 -0500202 r2.l = __bss_len;
203 r2.h = __bss_len;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400204 call _memset;
205
Mike Frysinger9171fc82008-03-30 15:46:13 -0400206
207 /* Setup the actual stack in external memory */
Mike Frysinger95433f62008-10-11 21:23:41 -0400208 sp.h = HI(CONFIG_STACKBASE);
209 sp.l = LO(CONFIG_STACKBASE);
Mike Frysinger9171fc82008-03-30 15:46:13 -0400210 fp = sp;
211
212 /* Now lower ourselves from the highest interrupt level to
213 * the lowest. We do this by masking all interrupts but 15,
Mike Frysinger70c4c032008-06-01 01:23:48 -0400214 * setting the 15 handler to ".Lenable_nested", raising the 15
Mike Frysinger9171fc82008-03-30 15:46:13 -0400215 * interrupt, and then returning from the highest interrupt
216 * level to the dummy "jump" until the interrupt controller
Mike Frysingerb5eba3f2008-10-11 21:40:26 -0400217 * services the pending 15 interrupt. If executing out of
218 * flash, these steps also changes the code flow from flash
219 * to external memory.
Mike Frysinger9171fc82008-03-30 15:46:13 -0400220 */
221 serial_early_puts("Lower to 15");
222 r0 = r7;
223 r1 = r6;
Mike Frysinger70c4c032008-06-01 01:23:48 -0400224 p1.l = .Lenable_nested;
225 p1.h = .Lenable_nested;
Mike Frysingerc745a842010-12-24 14:46:12 -0500226 [p5 + (EVT15 - COREMMR_BASE)] = p1;
Mike Frysingerbd33e5c2008-10-11 21:19:39 -0400227 r7 = EVT_IVG15 (z);
228 sti r7;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400229 raise 15;
Mike Frysingerc745a842010-12-24 14:46:12 -0500230 p3.l = .LWAIT_HERE;
231 p3.h = .LWAIT_HERE;
232 reti = p3;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400233 rti;
234
Mike Frysinger70c4c032008-06-01 01:23:48 -0400235 /* Enable nested interrupts before continuing with cpu init */
236.Lenable_nested:
237 cli r7;
238 [--sp] = reti;
239 jump.l _cpu_init_f;
240
Mike Frysinger9171fc82008-03-30 15:46:13 -0400241.LWAIT_HERE:
242 jump .LWAIT_HERE;
243ENDPROC(_start)
244
245LENTRY(_get_pc)
246 r0 = rets;
247#if ANOMALY_05000371
248 NOP;
249 NOP;
250 NOP;
251#endif
252 rts;
253ENDPROC(_get_pc)
Sonic Zhangc49eabe2014-07-17 19:00:29 +0800254
255ENTRY(_relocate_code)
256 /* Fake relocate code. Setup the new stack only */
257 sp = r0;
258 fp = sp;
259 r0 = p3;
260 r1.h = 0x2000;
261 r1.l = 0x10;
262 jump.l _board_init_r
263ENDPROC(_relocate_code)