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wdenk1f045212002-03-10 14:37:15 +00001/*
Heiko Schocher385c9ef2012-01-16 21:12:23 +00002 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
5 *
wdenk1f045212002-03-10 14:37:15 +00006 * (C) Copyright 2001
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
wdenk1f045212002-03-10 14:37:15 +000010 *
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
15 */
16
17#ifndef _I2C_H_
18#define _I2C_H_
19
20/*
Simon Glassc6202d82014-12-10 08:55:47 -070021 * For now there are essentially two parts to this file - driver model
22 * here at the top, and the older code below (with CONFIG_SYS_I2C being
23 * most recent). The plan is to migrate everything to driver model.
24 * The driver model structures and API are separate as they are different
25 * enough as to be incompatible for compilation purposes.
26 */
27
Simon Glassc6202d82014-12-10 08:55:47 -070028enum dm_i2c_chip_flags {
29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
32};
33
Simon Glassfffff722015-02-05 21:41:33 -070034struct udevice;
Simon Glassc6202d82014-12-10 08:55:47 -070035/**
36 * struct dm_i2c_chip - information about an i2c chip
37 *
38 * An I2C chip is a device on the I2C bus. It sits at a particular address
39 * and normally supports 7-bit or 10-bit addressing.
40 *
Simon Glasse6f66ec2015-01-25 08:27:13 -070041 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42 * the chip to examine.
Simon Glassc6202d82014-12-10 08:55:47 -070043 *
44 * @chip_addr: Chip address on bus
45 * @offset_len: Length of offset in bytes. A single byte offset can
46 * represent up to 256 bytes. A value larger than 1 may be
47 * needed for larger devices.
48 * @flags: Flags for this chip (dm_i2c_chip_flags)
49 * @emul: Emulator for this chip address (only used for emulation)
50 */
51struct dm_i2c_chip {
52 uint chip_addr;
53 uint offset_len;
54 uint flags;
55#ifdef CONFIG_SANDBOX
56 struct udevice *emul;
Simon Glass182bf922015-04-20 12:37:15 -060057 bool test_mode;
Simon Glassc6202d82014-12-10 08:55:47 -070058#endif
59};
60
61/**
62 * struct dm_i2c_bus- information about an i2c bus
63 *
64 * An I2C bus contains 0 or more chips on it, each at its own address. The
65 * bus can operate at different speeds (measured in Hz, typically 100KHz
66 * or 400KHz).
67 *
Simon Glasse564f052015-03-05 12:25:20 -070068 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
69 * I2C bus udevice.
Simon Glassc6202d82014-12-10 08:55:47 -070070 *
71 * @speed_hz: Bus speed in hertz (typically 100000)
72 */
73struct dm_i2c_bus {
74 int speed_hz;
75};
76
Simon Glass7fc65bc2015-07-02 18:15:41 -060077/*
78 * Not all of these flags are implemented in the U-Boot API
79 */
80enum dm_i2c_msg_flags {
81 I2C_M_TEN = 0x0010, /* ten-bit chip address */
82 I2C_M_RD = 0x0001, /* read data, from slave to master */
83 I2C_M_STOP = 0x8000, /* send stop after this message */
84 I2C_M_NOSTART = 0x4000, /* no start before this message */
85 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
86 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
87 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
88 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
89};
90
91/**
92 * struct i2c_msg - an I2C message
93 *
94 * @addr: Slave address
95 * @flags: Flags (see enum dm_i2c_msg_flags)
96 * @len: Length of buffer in bytes, may be 0 for a probe
97 * @buf: Buffer to send/receive, or NULL if no data
98 */
99struct i2c_msg {
100 uint addr;
101 uint flags;
102 uint len;
103 u8 *buf;
104};
105
106/**
107 * struct i2c_msg_list - a list of I2C messages
108 *
109 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
110 * appropriate in U-Boot.
111 *
112 * @msg: Pointer to i2c_msg array
113 * @nmsgs: Number of elements in the array
114 */
115struct i2c_msg_list {
116 struct i2c_msg *msgs;
117 uint nmsgs;
118};
119
Simon Glassc6202d82014-12-10 08:55:47 -0700120/**
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700121 * dm_i2c_read() - read bytes from an I2C chip
Simon Glassc6202d82014-12-10 08:55:47 -0700122 *
123 * To obtain an I2C device (called a 'chip') given the I2C bus address you
124 * can use i2c_get_chip(). To obtain a bus by bus number use
125 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
126 *
127 * To set the address length of a devce use i2c_set_addr_len(). It
128 * defaults to 1.
129 *
130 * @dev: Chip to read from
131 * @offset: Offset within chip to start reading
132 * @buffer: Place to put data
133 * @len: Number of bytes to read
134 *
135 * @return 0 on success, -ve on failure
136 */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700137int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
Simon Glassc6202d82014-12-10 08:55:47 -0700138
139/**
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700140 * dm_i2c_write() - write bytes to an I2C chip
Simon Glassc6202d82014-12-10 08:55:47 -0700141 *
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700142 * See notes for dm_i2c_read() above.
Simon Glassc6202d82014-12-10 08:55:47 -0700143 *
144 * @dev: Chip to write to
145 * @offset: Offset within chip to start writing
146 * @buffer: Buffer containing data to write
147 * @len: Number of bytes to write
148 *
149 * @return 0 on success, -ve on failure
150 */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700151int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
152 int len);
Simon Glassc6202d82014-12-10 08:55:47 -0700153
154/**
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700155 * dm_i2c_probe() - probe a particular chip address
Simon Glassc6202d82014-12-10 08:55:47 -0700156 *
157 * This can be useful to check for the existence of a chip on the bus.
158 * It is typically implemented by writing the chip address to the bus
159 * and checking that the chip replies with an ACK.
160 *
161 * @bus: Bus to probe
162 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
163 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
164 * @devp: Returns the device found, or NULL if none
165 * @return 0 if a chip was found at that address, -ve if not
166 */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700167int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
168 struct udevice **devp);
Simon Glassc6202d82014-12-10 08:55:47 -0700169
170/**
Simon Glassba3864f2015-04-20 12:37:14 -0600171 * dm_i2c_reg_read() - Read a value from an I2C register
172 *
173 * This reads a single value from the given address in an I2C chip
174 *
Simon Glass25a0fb42015-07-02 18:15:40 -0600175 * @dev: Device to use for transfer
Simon Glassba3864f2015-04-20 12:37:14 -0600176 * @addr: Address to read from
177 * @return value read, or -ve on error
178 */
179int dm_i2c_reg_read(struct udevice *dev, uint offset);
180
181/**
182 * dm_i2c_reg_write() - Write a value to an I2C register
183 *
184 * This writes a single value to the given address in an I2C chip
185 *
Simon Glass25a0fb42015-07-02 18:15:40 -0600186 * @dev: Device to use for transfer
Simon Glassba3864f2015-04-20 12:37:14 -0600187 * @addr: Address to write to
188 * @val: Value to write (normally a byte)
189 * @return 0 on success, -ve on error
190 */
191int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
192
193/**
Simon Glassdf358c62015-07-02 18:15:42 -0600194 * dm_i2c_xfer() - Transfer messages over I2C
195 *
196 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
197 * instead.
198 *
199 * @dev: Device to use for transfer
200 * @msg: List of messages to transfer
201 * @nmsgs: Number of messages to transfer
202 * @return 0 on success, -ve on error
203 */
204int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
205
206/**
Simon Glassca88b9b2015-02-05 21:41:32 -0700207 * dm_i2c_set_bus_speed() - set the speed of a bus
Simon Glassc6202d82014-12-10 08:55:47 -0700208 *
209 * @bus: Bus to adjust
210 * @speed: Requested speed in Hz
211 * @return 0 if OK, -EINVAL for invalid values
212 */
Simon Glassca88b9b2015-02-05 21:41:32 -0700213int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
Simon Glassc6202d82014-12-10 08:55:47 -0700214
215/**
Simon Glassca88b9b2015-02-05 21:41:32 -0700216 * dm_i2c_get_bus_speed() - get the speed of a bus
Simon Glassc6202d82014-12-10 08:55:47 -0700217 *
218 * @bus: Bus to check
219 * @return speed of selected I2C bus in Hz, -ve on error
220 */
Simon Glassca88b9b2015-02-05 21:41:32 -0700221int dm_i2c_get_bus_speed(struct udevice *bus);
Simon Glassc6202d82014-12-10 08:55:47 -0700222
223/**
224 * i2c_set_chip_flags() - set flags for a chip
225 *
226 * Typically addresses are 7 bits, but for 10-bit addresses you should set
227 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
228 *
229 * @dev: Chip to adjust
230 * @flags: New flags
231 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
232 */
233int i2c_set_chip_flags(struct udevice *dev, uint flags);
234
235/**
236 * i2c_get_chip_flags() - get flags for a chip
237 *
238 * @dev: Chip to check
239 * @flagsp: Place to put flags
240 * @return 0 if OK, other -ve value on error
241 */
242int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
243
244/**
245 * i2c_set_offset_len() - set the offset length for a chip
246 *
247 * The offset used to access a chip may be up to 4 bytes long. Typically it
248 * is only 1 byte, which is enough for chips with 256 bytes of memory or
249 * registers. The default value is 1, but you can call this function to
250 * change it.
251 *
252 * @offset_len: New offset length value (typically 1 or 2)
253 */
Simon Glassc6202d82014-12-10 08:55:47 -0700254int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
Simon Glass01501802015-05-04 11:30:58 -0600255
256/**
257 * i2c_get_offset_len() - get the offset length for a chip
258 *
259 * @return: Current offset length value (typically 1 or 2)
260 */
261int i2c_get_chip_offset_len(struct udevice *dev);
262
Simon Glassc6202d82014-12-10 08:55:47 -0700263/**
264 * i2c_deblock() - recover a bus that is in an unknown state
265 *
266 * See the deblock() method in 'struct dm_i2c_ops' for full information
267 *
268 * @bus: Bus to recover
269 * @return 0 if OK, -ve on error
270 */
271int i2c_deblock(struct udevice *bus);
272
Simon Glass73845352015-01-12 18:02:08 -0700273#ifdef CONFIG_DM_I2C_COMPAT
274/**
275 * i2c_probe() - Compatibility function for driver model
276 *
277 * Calls dm_i2c_probe() on the current bus
278 */
279int i2c_probe(uint8_t chip_addr);
280
281/**
282 * i2c_read() - Compatibility function for driver model
283 *
284 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
285 * set to @addr. @alen must match the current setting for the device.
286 */
287int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
288 int len);
289
290/**
291 * i2c_write() - Compatibility function for driver model
292 *
293 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
294 * set to @addr. @alen must match the current setting for the device.
295 */
296int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
297 int len);
298
299/**
300 * i2c_get_bus_num_fdt() - Compatibility function for driver model
301 *
302 * @return the bus number associated with the given device tree node
303 */
304int i2c_get_bus_num_fdt(int node);
305
306/**
307 * i2c_get_bus_num() - Compatibility function for driver model
308 *
309 * @return the 'current' bus number
310 */
311unsigned int i2c_get_bus_num(void);
312
313/**
Simon Glassd744d562015-01-26 20:29:39 -0700314 * i2c_set_bus_num() - Compatibility function for driver model
Simon Glass73845352015-01-12 18:02:08 -0700315 *
316 * Sets the 'current' bus
317 */
318int i2c_set_bus_num(unsigned int bus);
319
320static inline void I2C_SET_BUS(unsigned int bus)
321{
322 i2c_set_bus_num(bus);
323}
324
325static inline unsigned int I2C_GET_BUS(void)
326{
327 return i2c_get_bus_num();
328}
329
Simon Glassd744d562015-01-26 20:29:39 -0700330/**
331 * i2c_init() - Compatibility function for driver model
332 *
333 * This function does nothing.
334 */
335void i2c_init(int speed, int slaveaddr);
336
337/**
338 * board_i2c_init() - Compatibility function for driver model
339 *
340 * @param blob Device tree blbo
341 * @return the number of I2C bus
342 */
343void board_i2c_init(const void *blob);
344
Simon Glassa2879762015-05-16 15:01:41 -0600345/*
346 * Compatibility functions for driver model.
347 */
348uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
349void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
350
Simon Glass73845352015-01-12 18:02:08 -0700351#endif
352
Simon Glassc6202d82014-12-10 08:55:47 -0700353/**
354 * struct dm_i2c_ops - driver operations for I2C uclass
355 *
356 * Drivers should support these operations unless otherwise noted. These
357 * operations are intended to be used by uclass code, not directly from
358 * other code.
359 */
360struct dm_i2c_ops {
361 /**
362 * xfer() - transfer a list of I2C messages
363 *
364 * @bus: Bus to read from
365 * @msg: List of messages to transfer
366 * @nmsgs: Number of messages in the list
367 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
368 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
369 * flags cannot be supported, other -ve value on some other error
370 */
371 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
372
373 /**
374 * probe_chip() - probe for the presense of a chip address
375 *
376 * This function is optional. If omitted, the uclass will send a zero
377 * length message instead.
378 *
379 * @bus: Bus to probe
380 * @chip_addr: Chip address to probe
381 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
382 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
383 * to default probem other -ve value on error
384 */
385 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
386
387 /**
388 * set_bus_speed() - set the speed of a bus (optional)
389 *
390 * The bus speed value will be updated by the uclass if this function
391 * does not return an error. This method is optional - if it is not
392 * provided then the driver can read the speed from
Simon Glasse564f052015-03-05 12:25:20 -0700393 * dev_get_uclass_priv(bus)->speed_hz
Simon Glassc6202d82014-12-10 08:55:47 -0700394 *
395 * @bus: Bus to adjust
396 * @speed: Requested speed in Hz
397 * @return 0 if OK, -EINVAL for invalid values
398 */
399 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
400
401 /**
402 * get_bus_speed() - get the speed of a bus (optional)
403 *
404 * Normally this can be provided by the uclass, but if you want your
405 * driver to check the bus speed by looking at the hardware, you can
406 * implement that here. This method is optional. This method would
Simon Glasse564f052015-03-05 12:25:20 -0700407 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
Simon Glassc6202d82014-12-10 08:55:47 -0700408 *
409 * @bus: Bus to check
410 * @return speed of selected I2C bus in Hz, -ve on error
411 */
412 int (*get_bus_speed)(struct udevice *bus);
413
414 /**
415 * set_flags() - set the flags for a chip (optional)
416 *
417 * This is generally implemented by the uclass, but drivers can
418 * check the value to ensure that unsupported options are not used.
419 * This method is optional. If provided, this method will always be
420 * called when the flags change.
421 *
422 * @dev: Chip to adjust
423 * @flags: New flags value
424 * @return 0 if OK, -EINVAL if value is unsupported
425 */
426 int (*set_flags)(struct udevice *dev, uint flags);
427
428 /**
429 * deblock() - recover a bus that is in an unknown state
430 *
431 * I2C is a synchronous protocol and resets of the processor in the
432 * middle of an access can block the I2C Bus until a powerdown of
433 * the full unit is done. This is because slaves can be stuck
434 * waiting for addition bus transitions for a transaction that will
435 * never complete. Resetting the I2C master does not help. The only
436 * way is to force the bus through a series of transitions to make
437 * sure that all slaves are done with the transaction. This method
438 * performs this 'deblocking' if support by the driver.
439 *
440 * This method is optional.
441 */
442 int (*deblock)(struct udevice *bus);
443};
444
445#define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
446
447/**
Simon Glass3d1957f2015-08-03 08:19:21 -0600448 * struct i2c_mux_ops - operations for an I2C mux
449 *
450 * The current mux state is expected to be stored in the mux itself since
451 * it is the only thing that knows how to make things work. The mux can
452 * record the current state and then avoid switching unless it is necessary.
453 * So select() can be skipped if the mux is already in the correct state.
454 * Also deselect() can be made a nop if required.
455 */
456struct i2c_mux_ops {
457 /**
458 * select() - select one of of I2C buses attached to a mux
459 *
460 * This will be called when there is no bus currently selected by the
461 * mux. This method does not need to deselect the old bus since
462 * deselect() will be already have been called if necessary.
463 *
464 * @mux: Mux device
465 * @bus: I2C bus to select
466 * @channel: Channel number correponding to the bus to select
467 * @return 0 if OK, -ve on error
468 */
469 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
470
471 /**
472 * deselect() - select one of of I2C buses attached to a mux
473 *
474 * This is used to deselect the currently selected I2C bus.
475 *
476 * @mux: Mux device
477 * @bus: I2C bus to deselect
478 * @channel: Channel number correponding to the bus to deselect
479 * @return 0 if OK, -ve on error
480 */
481 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
482};
483
484#define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
485
486/**
Simon Glassc6202d82014-12-10 08:55:47 -0700487 * i2c_get_chip() - get a device to use to access a chip on a bus
488 *
489 * This returns the device for the given chip address. The device can then
490 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
491 *
492 * @bus: Bus to examine
493 * @chip_addr: Chip address for the new device
Simon Glass25ab4b02015-01-25 08:26:55 -0700494 * @offset_len: Length of a register offset in bytes (normally 1)
Simon Glassc6202d82014-12-10 08:55:47 -0700495 * @devp: Returns pointer to new device if found or -ENODEV if not
496 * found
497 */
Simon Glass25ab4b02015-01-25 08:26:55 -0700498int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
499 struct udevice **devp);
Simon Glassc6202d82014-12-10 08:55:47 -0700500
501/**
Stefan Roesea06728c2015-11-25 07:41:58 +0100502 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
503 * a bus number
Simon Glassc6202d82014-12-10 08:55:47 -0700504 *
505 * This returns the device for the given chip address on a particular bus
506 * number.
507 *
508 * @busnum: Bus number to examine
509 * @chip_addr: Chip address for the new device
Simon Glass25ab4b02015-01-25 08:26:55 -0700510 * @offset_len: Length of a register offset in bytes (normally 1)
Simon Glassc6202d82014-12-10 08:55:47 -0700511 * @devp: Returns pointer to new device if found or -ENODEV if not
512 * found
513 */
Simon Glass25ab4b02015-01-25 08:26:55 -0700514int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
515 struct udevice **devp);
Simon Glassc6202d82014-12-10 08:55:47 -0700516
517/**
518 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
519 *
520 * This decodes the chip address from a device tree node and puts it into
521 * its dm_i2c_chip structure. This should be called in your driver's
522 * ofdata_to_platdata() method.
523 *
524 * @blob: Device tree blob
525 * @node: Node offset to read from
526 * @spi: Place to put the decoded information
527 */
Simon Glass17043082017-05-18 20:09:30 -0600528int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
Simon Glassc6202d82014-12-10 08:55:47 -0700529
Simon Glass7d7db222015-07-02 18:15:39 -0600530/**
531 * i2c_dump_msgs() - Dump a list of I2C messages
532 *
533 * This may be useful for debugging.
534 *
535 * @msg: Message list to dump
536 * @nmsgs: Number of messages
537 */
538void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
539
Simon Glassc6202d82014-12-10 08:55:47 -0700540#ifndef CONFIG_DM_I2C
541
542/*
wdenk1f045212002-03-10 14:37:15 +0000543 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
544 *
545 * The implementation MUST NOT use static or global variables if the
546 * I2C routines are used to read SDRAM configuration information
547 * because this is done before the memories are initialized. Limited
548 * use of stack-based variables are OK (the initial stack size is
549 * limited).
550 *
551 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
552 */
553
554/*
555 * Configuration items.
556 */
557#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
558
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000559#if !defined(CONFIG_SYS_I2C_MAX_HOPS)
560/* no muxes used bus = i2c adapters */
561#define CONFIG_SYS_I2C_DIRECT_BUS 1
562#define CONFIG_SYS_I2C_MAX_HOPS 0
563#define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
Stefan Roese79b2d0b2007-02-20 10:27:08 +0100564#else
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000565/* we use i2c muxes */
566#undef CONFIG_SYS_I2C_DIRECT_BUS
Stefan Roese79b2d0b2007-02-20 10:27:08 +0100567#endif
568
Stefan Roese8c120452007-03-01 07:03:25 +0100569/* define the I2C bus number for RTC and DTT if not already done */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200570#if !defined(CONFIG_SYS_RTC_BUS_NUM)
571#define CONFIG_SYS_RTC_BUS_NUM 0
Stefan Roese8c120452007-03-01 07:03:25 +0100572#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200573#if !defined(CONFIG_SYS_SPD_BUS_NUM)
574#define CONFIG_SYS_SPD_BUS_NUM 0
Matthias Fuchsd8a8ea52007-03-08 16:20:32 +0100575#endif
Stefan Roese8c120452007-03-01 07:03:25 +0100576
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000577struct i2c_adapter {
578 void (*init)(struct i2c_adapter *adap, int speed,
579 int slaveaddr);
580 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
581 int (*read)(struct i2c_adapter *adap, uint8_t chip,
582 uint addr, int alen, uint8_t *buffer,
583 int len);
584 int (*write)(struct i2c_adapter *adap, uint8_t chip,
585 uint addr, int alen, uint8_t *buffer,
586 int len);
587 uint (*set_bus_speed)(struct i2c_adapter *adap,
588 uint speed);
589 int speed;
Hannes Petermaierd5243352014-02-03 21:22:18 +0100590 int waitdelay;
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000591 int slaveaddr;
592 int init_done;
593 int hwadapnr;
594 char *name;
595};
596
597#define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
598 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
599 { \
600 .init = _init, \
601 .probe = _probe, \
602 .read = _read, \
603 .write = _write, \
604 .set_bus_speed = _set_speed, \
605 .speed = _speed, \
606 .slaveaddr = _slaveaddr, \
607 .init_done = 0, \
608 .hwadapnr = _hwadapnr, \
609 .name = #_name \
610};
611
612#define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
613 _set_speed, _speed, _slaveaddr, _hwadapnr) \
614 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
615 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
616 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
617
618struct i2c_adapter *i2c_get_adapter(int index);
619
620#ifndef CONFIG_SYS_I2C_DIRECT_BUS
621struct i2c_mux {
622 int id;
623 char name[16];
624};
625
626struct i2c_next_hop {
627 struct i2c_mux mux;
628 uint8_t chip;
629 uint8_t channel;
630};
631
632struct i2c_bus_hose {
633 int adapter;
634 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
635};
636#define I2C_NULL_HOP {{-1, ""}, 0, 0}
637extern struct i2c_bus_hose i2c_bus[];
638
639#define I2C_ADAPTER(bus) i2c_bus[bus].adapter
640#else
641#define I2C_ADAPTER(bus) bus
642#endif
643#define I2C_BUS gd->cur_i2c_bus
644
645#define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
646#define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
647#define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
648
649#ifndef CONFIG_SYS_I2C_DIRECT_BUS
650#define I2C_MUX_PCA9540_ID 1
651#define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
652#define I2C_MUX_PCA9542_ID 2
653#define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
654#define I2C_MUX_PCA9544_ID 3
655#define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
656#define I2C_MUX_PCA9547_ID 4
657#define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
Michael Burre6658742013-09-23 22:35:45 +0000658#define I2C_MUX_PCA9548_ID 5
659#define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000660#endif
661
Heiko Schocher98aed372008-10-15 09:35:26 +0200662#ifndef I2C_SOFT_DECLARATIONS
Heiko Schocher2eb48ff2017-06-07 17:33:10 +0200663# if (defined(CONFIG_AT91RM9200) || \
Jens Scharsig0cf0b932010-02-03 22:46:58 +0100664 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
Andreas Bießmanncb96a0a2013-10-30 15:18:18 +0100665 defined(CONFIG_AT91SAM9263))
esw@bus-elektronik.de78132272011-12-20 06:05:30 +0000666# define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
Heiko Schocher98aed372008-10-15 09:35:26 +0200667# else
668# define I2C_SOFT_DECLARATIONS
669# endif
670#endif
Timur Tabiecf5f072008-12-03 11:28:30 -0600671
Peter Tyser9c90a2c2009-04-24 15:34:05 -0500672/*
673 * Many boards/controllers/drivers don't support an I2C slave interface so
674 * provide a default slave address for them for use in common code. A real
675 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
676 * support a slave interface.
677 */
678#ifndef CONFIG_SYS_I2C_SLAVE
679#define CONFIG_SYS_I2C_SLAVE 0xfe
Timur Tabiecf5f072008-12-03 11:28:30 -0600680#endif
681
wdenk1f045212002-03-10 14:37:15 +0000682/*
683 * Initialization, must be called once on start up, may be called
684 * repeatedly to change the speed and slave addresses.
685 */
Yuan Yao9d10c2d2016-06-08 18:24:51 +0800686#ifdef CONFIG_SYS_I2C_EARLY_INIT
687void i2c_early_init_f(void);
688#endif
wdenk1f045212002-03-10 14:37:15 +0000689void i2c_init(int speed, int slaveaddr);
wdenk06d01db2003-03-14 20:47:52 +0000690void i2c_init_board(void);
wdenk1f045212002-03-10 14:37:15 +0000691
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000692#ifdef CONFIG_SYS_I2C
693/*
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000694 * i2c_get_bus_num:
695 *
696 * Returns index of currently active I2C bus. Zero-based.
697 */
698unsigned int i2c_get_bus_num(void);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200699
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000700/*
701 * i2c_set_bus_num:
702 *
703 * Change the active I2C bus. Subsequent read/write calls will
704 * go to this one.
705 *
706 * bus - bus index, zero based
707 *
708 * Returns: 0 on success, not 0 on failure
709 *
710 */
711int i2c_set_bus_num(unsigned int bus);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200712
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000713/*
714 * i2c_init_all():
715 *
716 * Initializes all I2C adapters in the system. All i2c_adap structures must
717 * be initialized beforehead with function pointers and data, including
718 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
719 */
720void i2c_init_all(void);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200721
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000722/*
723 * Probe the given I2C chip address. Returns 0 if a chip responded,
724 * not 0 on failure.
725 */
726int i2c_probe(uint8_t chip);
727
728/*
729 * Read/Write interface:
730 * chip: I2C chip address, range 0..127
731 * addr: Memory (register) address within the chip
732 * alen: Number of bytes to use for addr (typically 1, 2 for larger
733 * memories, 0 for register type devices with only one
734 * register)
735 * buffer: Where to read/write the data
736 * len: How many bytes to read/write
737 *
738 * Returns: 0 on success, not 0 on failure
739 */
740int i2c_read(uint8_t chip, unsigned int addr, int alen,
741 uint8_t *buffer, int len);
742
743int i2c_write(uint8_t chip, unsigned int addr, int alen,
744 uint8_t *buffer, int len);
745
746/*
747 * Utility routines to read/write registers.
748 */
749uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
750
751void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
752
753/*
754 * i2c_set_bus_speed:
755 *
756 * Change the speed of the active I2C bus
757 *
758 * speed - bus speed in Hz
759 *
760 * Returns: new bus speed
761 *
762 */
763unsigned int i2c_set_bus_speed(unsigned int speed);
764
765/*
766 * i2c_get_bus_speed:
767 *
768 * Returns speed of currently active I2C bus in Hz
769 */
770
771unsigned int i2c_get_bus_speed(void);
772
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000773#else
Heiko Schocher67b23a32008-10-15 09:39:47 +0200774
wdenk1f045212002-03-10 14:37:15 +0000775/*
776 * Probe the given I2C chip address. Returns 0 if a chip responded,
777 * not 0 on failure.
778 */
779int i2c_probe(uchar chip);
780
781/*
782 * Read/Write interface:
783 * chip: I2C chip address, range 0..127
784 * addr: Memory (register) address within the chip
785 * alen: Number of bytes to use for addr (typically 1, 2 for larger
786 * memories, 0 for register type devices with only one
787 * register)
788 * buffer: Where to read/write the data
789 * len: How many bytes to read/write
790 *
791 * Returns: 0 on success, not 0 on failure
792 */
793int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
794int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
795
796/*
797 * Utility routines to read/write registers.
798 */
Timur Tabiecf5f072008-12-03 11:28:30 -0600799static inline u8 i2c_reg_read(u8 addr, u8 reg)
800{
801 u8 buf;
802
Timur Tabiecf5f072008-12-03 11:28:30 -0600803#ifdef DEBUG
804 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
805#endif
806
Timur Tabiecf5f072008-12-03 11:28:30 -0600807 i2c_read(addr, reg, 1, &buf, 1);
Timur Tabiecf5f072008-12-03 11:28:30 -0600808
809 return buf;
810}
811
812static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
813{
Timur Tabiecf5f072008-12-03 11:28:30 -0600814#ifdef DEBUG
815 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
816 __func__, addr, reg, val);
817#endif
818
Timur Tabiecf5f072008-12-03 11:28:30 -0600819 i2c_write(addr, reg, 1, &val, 1);
Timur Tabiecf5f072008-12-03 11:28:30 -0600820}
wdenk1f045212002-03-10 14:37:15 +0000821
Ben Warrenbb99ad62006-09-07 16:50:54 -0400822/*
823 * Functions for setting the current I2C bus and its speed
824 */
825
826/*
827 * i2c_set_bus_num:
828 *
829 * Change the active I2C bus. Subsequent read/write calls will
830 * go to this one.
831 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200832 * bus - bus index, zero based
Ben Warrenbb99ad62006-09-07 16:50:54 -0400833 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200834 * Returns: 0 on success, not 0 on failure
Ben Warrenbb99ad62006-09-07 16:50:54 -0400835 *
836 */
Timur Tabi9ca880a2006-10-31 21:23:16 -0600837int i2c_set_bus_num(unsigned int bus);
Ben Warrenbb99ad62006-09-07 16:50:54 -0400838
839/*
840 * i2c_get_bus_num:
841 *
842 * Returns index of currently active I2C bus. Zero-based.
843 */
844
Timur Tabi9ca880a2006-10-31 21:23:16 -0600845unsigned int i2c_get_bus_num(void);
Ben Warrenbb99ad62006-09-07 16:50:54 -0400846
847/*
848 * i2c_set_bus_speed:
849 *
850 * Change the speed of the active I2C bus
851 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200852 * speed - bus speed in Hz
Ben Warrenbb99ad62006-09-07 16:50:54 -0400853 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200854 * Returns: 0 on success, not 0 on failure
Ben Warrenbb99ad62006-09-07 16:50:54 -0400855 *
856 */
Timur Tabi9ca880a2006-10-31 21:23:16 -0600857int i2c_set_bus_speed(unsigned int);
Ben Warrenbb99ad62006-09-07 16:50:54 -0400858
859/*
860 * i2c_get_bus_speed:
861 *
862 * Returns speed of currently active I2C bus in Hz
863 */
864
Timur Tabi9ca880a2006-10-31 21:23:16 -0600865unsigned int i2c_get_bus_speed(void);
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000866#endif /* CONFIG_SYS_I2C */
867
868/*
869 * only for backwardcompatibility, should go away if we switched
870 * completely to new multibus support.
871 */
872#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
873# if !defined(CONFIG_SYS_MAX_I2C_BUS)
874# define CONFIG_SYS_MAX_I2C_BUS 2
875# endif
Łukasz Majewskiea0f73a2013-08-16 15:31:45 +0200876# define I2C_MULTI_BUS 1
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000877#else
878# define CONFIG_SYS_MAX_I2C_BUS 1
879# define I2C_MULTI_BUS 0
880#endif
Ben Warrenbb99ad62006-09-07 16:50:54 -0400881
Marek Vasutcd7b4e82011-10-25 11:40:57 +0200882/* NOTE: These two functions MUST be always_inline to avoid code growth! */
883static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
884static inline unsigned int I2C_GET_BUS(void)
885{
886 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
887}
888
889static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
890static inline void I2C_SET_BUS(unsigned int bus)
891{
892 if (I2C_MULTI_BUS)
893 i2c_set_bus_num(bus);
894}
895
Łukasz Majewski7ca8f732012-09-04 23:15:20 +0000896/* Multi I2C definitions */
897enum {
898 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
899 I2C_8, I2C_9, I2C_10,
900};
901
Rajeshwari Shindea9d2ae72012-12-26 20:03:12 +0000902/**
903 * Get FDT values for i2c bus.
904 *
905 * @param blob Device tree blbo
906 * @return the number of I2C bus
907 */
908void board_i2c_init(const void *blob);
909
910/**
911 * Find the I2C bus number by given a FDT I2C node.
912 *
913 * @param blob Device tree blbo
914 * @param node FDT I2C node to find
915 * @return the number of I2C bus (zero based), or -1 on error
916 */
917int i2c_get_bus_num_fdt(int node);
918
919/**
920 * Reset the I2C bus represented by the given a FDT I2C node.
921 *
922 * @param blob Device tree blbo
923 * @param node FDT I2C node to find
924 * @return 0 if port was reset, -1 if not found
925 */
926int i2c_reset_port_fdt(const void *blob, int node);
Simon Glassc6202d82014-12-10 08:55:47 -0700927
928#endif /* !CONFIG_DM_I2C */
929
wdenk1f045212002-03-10 14:37:15 +0000930#endif /* _I2C_H_ */