Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Marvell Semiconductor <www.marvell.com> |
| 4 | * Prafulla Wadaskar <prafulla@marvell.com> |
| 5 | * |
| 6 | * (C) Copyright 2009 |
| 7 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 8 | * |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 9 | * (C) Copyright 2011-2012 |
| 10 | * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com |
| 11 | * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com |
Holger Brunck | 83b40c3 | 2011-06-16 18:11:15 +0530 | [diff] [blame] | 12 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 13 | * SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | /* |
| 17 | * for linking errors see |
| 18 | * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html |
| 19 | */ |
| 20 | |
Holger Brunck | 83b40c3 | 2011-06-16 18:11:15 +0530 | [diff] [blame] | 21 | #ifndef _CONFIG_KM_KIRKWOOD_H |
| 22 | #define _CONFIG_KM_KIRKWOOD_H |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 23 | |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 24 | /* KM_KIRKWOOD */ |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 25 | #if defined(CONFIG_KM_KIRKWOOD) |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 26 | #define CONFIG_HOSTNAME km_kirkwood |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 27 | #define CONFIG_KM_DISABLE_PCIE |
Heiko Schocher | f3e9361 | 2012-10-25 11:07:00 +0200 | [diff] [blame] | 28 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 29 | |
| 30 | /* KM_KIRKWOOD_PCI */ |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 31 | #elif defined(CONFIG_KM_KIRKWOOD_PCI) |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 32 | #define CONFIG_HOSTNAME km_kirkwood_pci |
Heiko Schocher | f3e9361 | 2012-10-25 11:07:00 +0200 | [diff] [blame] | 33 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 34 | #define CONFIG_KM_FPGA_CONFIG |
Holger Brunck | 58c90c8 | 2014-08-15 10:51:48 +0200 | [diff] [blame] | 35 | #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" |
| 36 | #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 37 | |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 38 | /* KM_KIRKWOOD_128M16 */ |
| 39 | #elif defined(CONFIG_KM_KIRKWOOD_128M16) |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 40 | #define CONFIG_HOSTNAME km_kirkwood_128m16 |
| 41 | #undef CONFIG_SYS_KWD_CONFIG |
Masahiro Yamada | 4ab3fc5 | 2014-03-11 11:05:17 +0900 | [diff] [blame] | 42 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 43 | #define CONFIG_KM_DISABLE_PCIE |
Holger Brunck | e28d4a2 | 2013-10-07 15:10:03 +0200 | [diff] [blame] | 44 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 45 | |
Gerlando Falauto | 9c134e1 | 2014-02-13 16:43:00 +0100 | [diff] [blame] | 46 | /* KM_NUSA / KM_SUGP1 */ |
| 47 | #elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1) |
Heiko Schocher | f3e9361 | 2012-10-25 11:07:00 +0200 | [diff] [blame] | 48 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Gerlando Falauto | 9c134e1 | 2014-02-13 16:43:00 +0100 | [diff] [blame] | 49 | |
| 50 | # if defined(CONFIG_KM_NUSA) |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 51 | #define CONFIG_HOSTNAME kmnusa |
Gerlando Falauto | 9c134e1 | 2014-02-13 16:43:00 +0100 | [diff] [blame] | 52 | # elif defined(CONFIG_KM_SUGP1) |
Gerlando Falauto | 9c134e1 | 2014-02-13 16:43:00 +0100 | [diff] [blame] | 53 | #define CONFIG_HOSTNAME kmsugp1 |
| 54 | #define KM_PCIE_RESET_MPP7 |
| 55 | #endif |
| 56 | |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 57 | #undef CONFIG_SYS_KWD_CONFIG |
Masahiro Yamada | 4ab3fc5 | 2014-03-11 11:05:17 +0900 | [diff] [blame] | 58 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 59 | #define CONFIG_KM_ENV_IS_IN_SPI_NOR |
| 60 | #define CONFIG_KM_FPGA_CONFIG |
| 61 | #define CONFIG_KM_PIGGY4_88E6352 |
Valentin Longchamp | be3e8be | 2012-08-16 01:25:20 +0000 | [diff] [blame] | 62 | #define CONFIG_MV88E6352_SWITCH |
| 63 | #define CONFIG_KM_MVEXTSW_ADDR 0x10 |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 64 | |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 65 | /* KM_MGCOGE3UN */ |
| 66 | #elif defined(CONFIG_KM_MGCOGE3UN) |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 67 | #define CONFIG_HOSTNAME mgcoge3un |
Heiko Schocher | f3e9361 | 2012-10-25 11:07:00 +0200 | [diff] [blame] | 68 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 69 | #undef CONFIG_SYS_KWD_CONFIG |
Masahiro Yamada | 4ab3fc5 | 2014-03-11 11:05:17 +0900 | [diff] [blame] | 70 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 71 | #define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0" |
| 72 | #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 |
| 73 | #define CONFIG_KM_DISABLE_PCIE |
| 74 | #define CONFIG_KM_PIGGY4_88E6061 |
| 75 | |
| 76 | /* KMCOGE5UN */ |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 77 | #elif defined(CONFIG_KM_COGE5UN) |
Heiko Schocher | f3e9361 | 2012-10-25 11:07:00 +0200 | [diff] [blame] | 78 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 79 | #undef CONFIG_SYS_KWD_CONFIG |
Masahiro Yamada | 4ab3fc5 | 2014-03-11 11:05:17 +0900 | [diff] [blame] | 80 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 81 | #define CONFIG_KM_ENV_IS_IN_SPI_NOR |
| 82 | #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 |
| 83 | #define CONFIG_HOSTNAME kmcoge5un |
| 84 | #define CONFIG_KM_DISABLE_PCIE |
| 85 | #define CONFIG_KM_PIGGY4_88E6352 |
Holger Brunck | 6ef6486 | 2012-07-05 05:05:04 +0000 | [diff] [blame] | 86 | |
| 87 | /* KM_PORTL2 */ |
| 88 | #elif defined(CONFIG_KM_PORTL2) |
Holger Brunck | 6ef6486 | 2012-07-05 05:05:04 +0000 | [diff] [blame] | 89 | #define CONFIG_HOSTNAME portl2 |
Heiko Schocher | f3e9361 | 2012-10-25 11:07:00 +0200 | [diff] [blame] | 90 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Holger Brunck | 6ef6486 | 2012-07-05 05:05:04 +0000 | [diff] [blame] | 91 | #define CONFIG_KM_PIGGY4_88E6061 |
| 92 | |
Holger Brunck | 90639fe | 2013-01-15 22:51:22 +0000 | [diff] [blame] | 93 | /* KM_SUV31 */ |
| 94 | #elif defined(CONFIG_KM_SUV31) |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 95 | #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ |
Holger Brunck | 90639fe | 2013-01-15 22:51:22 +0000 | [diff] [blame] | 96 | #define CONFIG_HOSTNAME kmsuv31 |
Holger Brunck | 2a4ebef | 2014-01-27 16:58:24 +0100 | [diff] [blame] | 97 | #undef CONFIG_SYS_KWD_CONFIG |
Masahiro Yamada | 4ab3fc5 | 2014-03-11 11:05:17 +0900 | [diff] [blame] | 98 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg |
Holger Brunck | 90639fe | 2013-01-15 22:51:22 +0000 | [diff] [blame] | 99 | #define CONFIG_KM_ENV_IS_IN_SPI_NOR |
| 100 | #define CONFIG_KM_FPGA_CONFIG |
Holger Brunck | 58c90c8 | 2014-08-15 10:51:48 +0200 | [diff] [blame] | 101 | #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" |
| 102 | #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 103 | #else |
| 104 | #error ("Board unsupported") |
| 105 | #endif |
| 106 | |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 107 | /* include common defines/options for all arm based Keymile boards */ |
Valentin Longchamp | 264eaa0 | 2011-05-04 01:47:33 +0000 | [diff] [blame] | 108 | #include "km/km_arm.h" |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 109 | |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 110 | #if defined(CONFIG_KM_PIGGY4_88E6352) |
| 111 | /* |
| 112 | * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via |
| 113 | * an Marvell 88E6352 simple switch. |
| 114 | * In this case we have to change the default settings for the etherent mac. |
| 115 | * There is NO ethernet phy. The ARM and Switch are conencted directly over |
| 116 | * RGMII in MAC-MAC mode |
| 117 | * In this case 1GBit full duplex and autoneg off |
| 118 | */ |
| 119 | #define PORT_SERIAL_CONTROL_VALUE ( \ |
| 120 | MVGBE_FORCE_LINK_PASS | \ |
| 121 | MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ |
| 122 | MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ |
| 123 | MVGBE_ADV_NO_FLOW_CTRL | \ |
| 124 | MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ |
| 125 | MVGBE_FORCE_BP_MODE_NO_JAM | \ |
| 126 | (1 << 9) /* Reserved bit has to be 1 */ | \ |
| 127 | MVGBE_DO_NOT_FORCE_LINK_FAIL | \ |
| 128 | MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ |
| 129 | MVGBE_DTE_ADV_0 | \ |
| 130 | MVGBE_MIIPHY_MAC_MODE | \ |
| 131 | MVGBE_AUTO_NEG_NO_CHANGE | \ |
| 132 | MVGBE_MAX_RX_PACKET_1552BYTE | \ |
| 133 | MVGBE_CLR_EXT_LOOPBACK | \ |
| 134 | MVGBE_SET_FULL_DUPLEX_MODE | \ |
| 135 | MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ |
| 136 | MVGBE_SET_GMII_SPEED_TO_1000 |\ |
| 137 | MVGBE_SET_MII_SPEED_TO_100) |
| 138 | |
| 139 | #endif |
Heiko Schocher | 731b968 | 2011-03-08 10:53:51 +0100 | [diff] [blame] | 140 | |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 141 | #ifdef CONFIG_KM_PIGGY4_88E6061 |
| 142 | /* |
| 143 | * Some keymile boards like mgcoge3un have their PIGGY4 connected via |
| 144 | * an Marvell 88E6061 simple switch. |
| 145 | * In this case we have to change the default settings for the |
| 146 | * ethernet phy connected to the kirkwood. |
| 147 | * In this case 100MB full duplex and autoneg off |
| 148 | */ |
| 149 | #define PORT_SERIAL_CONTROL_VALUE ( \ |
| 150 | MVGBE_FORCE_LINK_PASS | \ |
| 151 | MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ |
| 152 | MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ |
| 153 | MVGBE_ADV_NO_FLOW_CTRL | \ |
| 154 | MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ |
| 155 | MVGBE_FORCE_BP_MODE_NO_JAM | \ |
| 156 | (1 << 9) /* Reserved bit has to be 1 */ | \ |
| 157 | MVGBE_DO_NOT_FORCE_LINK_FAIL | \ |
| 158 | MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ |
| 159 | MVGBE_DTE_ADV_0 | \ |
| 160 | MVGBE_MIIPHY_MAC_MODE | \ |
| 161 | MVGBE_AUTO_NEG_NO_CHANGE | \ |
| 162 | MVGBE_MAX_RX_PACKET_1552BYTE | \ |
| 163 | MVGBE_CLR_EXT_LOOPBACK | \ |
| 164 | MVGBE_SET_FULL_DUPLEX_MODE | \ |
| 165 | MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ |
| 166 | MVGBE_SET_GMII_SPEED_TO_10_100 |\ |
| 167 | MVGBE_SET_MII_SPEED_TO_100) |
| 168 | #endif |
| 169 | |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 170 | #ifdef CONFIG_KM_DISABLE_PCI |
| 171 | #undef CONFIG_KIRKWOOD_PCIE_INIT |
| 172 | #endif |
Valentin Longchamp | b37f772 | 2012-07-05 05:05:05 +0000 | [diff] [blame] | 173 | |
Holger Brunck | 83b40c3 | 2011-06-16 18:11:15 +0530 | [diff] [blame] | 174 | #endif /* _CONFIG_KM_KIRKWOOD */ |