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wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
Stefan Roesefa36ae72009-10-27 15:15:55 +010042#include <mtd/cfi_flash.h>
wdenk028ab6b2004-02-23 23:54:43 +000043
wdenk5653fc32004-02-08 22:55:38 +000044/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010045 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000051 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010057 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000060 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010062 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000063 */
64
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010065static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Mike Frysinger4ffeab22010-12-22 09:41:13 -050066#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +010067static uint flash_verbose = 1;
Mike Frysinger4ffeab22010-12-22 09:41:13 -050068#else
69#define flash_verbose 1
70#endif
Wolfgang Denk92eb7292006-12-27 01:26:13 +010071
Wolfgang Denk2a112b22008-08-08 16:39:54 +020072flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
73
Stefan Roese79b4cda2006-02-28 15:29:58 +010074/*
75 * Check if chip width is defined. If not, start detecting with 8bit.
76 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
78#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +010079#endif
80
Stefan Roese6f726f92010-10-25 18:31:48 +020081/*
82 * 0xffff is an undefined value for the configuration register. When
83 * this value is returned, the configuration register shall not be
84 * written at all (default mode).
85 */
86static u16 cfi_flash_config_reg(int i)
87{
88#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
89 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
90#else
91 return 0xffff;
92#endif
93}
94
Stefan Roeseca5def32010-08-31 10:00:10 +020095#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
96int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
97#endif
98
Stefan Roeseb00e19c2010-08-30 10:11:51 +020099static phys_addr_t __cfi_flash_bank_addr(int i)
100{
101 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
102}
103phys_addr_t cfi_flash_bank_addr(int i)
104 __attribute__((weak, alias("__cfi_flash_bank_addr")));
105
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200106static unsigned long __cfi_flash_bank_size(int i)
107{
108#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
109 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
110#else
111 return 0;
112#endif
113}
114unsigned long cfi_flash_bank_size(int i)
115 __attribute__((weak, alias("__cfi_flash_bank_size")));
116
Stefan Roese45aa5a72008-11-17 14:45:22 +0100117static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100118{
119 __raw_writeb(value, addr);
120}
121
Stefan Roese45aa5a72008-11-17 14:45:22 +0100122static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100123{
124 __raw_writew(value, addr);
125}
126
Stefan Roese45aa5a72008-11-17 14:45:22 +0100127static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100128{
129 __raw_writel(value, addr);
130}
131
Stefan Roese45aa5a72008-11-17 14:45:22 +0100132static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100133{
134 /* No architectures currently implement __raw_writeq() */
135 *(volatile u64 *)addr = value;
136}
137
Stefan Roese45aa5a72008-11-17 14:45:22 +0100138static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100139{
140 return __raw_readb(addr);
141}
142
Stefan Roese45aa5a72008-11-17 14:45:22 +0100143static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100144{
145 return __raw_readw(addr);
146}
147
Stefan Roese45aa5a72008-11-17 14:45:22 +0100148static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100149{
150 return __raw_readl(addr);
151}
152
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100153static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100154{
155 /* No architectures currently implement __raw_readq() */
156 return *(volatile u64 *)addr;
157}
158
Stefan Roese45aa5a72008-11-17 14:45:22 +0100159#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
160void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
161void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
162void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
163void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
164u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
165u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
166u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100167u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100168#else
169#define flash_write8 __flash_write8
170#define flash_write16 __flash_write16
171#define flash_write32 __flash_write32
172#define flash_write64 __flash_write64
173#define flash_read8 __flash_read8
174#define flash_read16 __flash_read16
175#define flash_read32 __flash_read32
176#define flash_read64 __flash_read64
177#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100178
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200179/*-----------------------------------------------------------------------
180 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4f975672009-02-10 09:53:29 +0100182flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200183{
184 int i;
Stefan Roesecba34aa2010-08-30 11:14:38 +0200185 flash_info_t *info = NULL;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200188 info = & flash_info[i];
189 if (info->size && info->start[0] <= base &&
190 base <= info->start[0] + info->size - 1)
191 break;
192 }
193
Stefan Roesecba34aa2010-08-30 11:14:38 +0200194 return info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200195}
wdenk5653fc32004-02-08 22:55:38 +0000196#endif
197
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100198unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
199{
200 if (sect != (info->sector_count - 1))
201 return info->start[sect + 1] - info->start[sect];
202 else
203 return info->start[0] + info->size - info->start[sect];
204}
205
wdenk5653fc32004-02-08 22:55:38 +0000206/*-----------------------------------------------------------------------
207 * create an address based on the offset and the port width
208 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100209static inline void *
210flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000211{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100212 unsigned int byte_offset = offset * info->portwidth;
213
Becky Bruce09ce9922009-02-02 16:34:51 -0600214 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100215}
216
217static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
218 unsigned int offset, void *addr)
219{
wdenk5653fc32004-02-08 22:55:38 +0000220}
wdenkbf9e3b32004-02-12 00:47:09 +0000221
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200222/*-----------------------------------------------------------------------
223 * make a proper sized command based on the port and chip widths
224 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200225static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200226{
227 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400228 int cword_offset;
229 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200231 u32 cmd_le = cpu_to_le32(cmd);
232#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400233 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200234 uchar *cp = (uchar *) cmdbuf;
235
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400236 for (i = info->portwidth; i > 0; i--){
237 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400239 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200240 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200241#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400242 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200243 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200244#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200245 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400246 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200247}
248
wdenkbf9e3b32004-02-12 00:47:09 +0000249#ifdef DEBUG
250/*-----------------------------------------------------------------------
251 * Debug support
252 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100253static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000254{
255 int i;
256 char *cp;
257
Wolfgang Denk657f2062009-02-04 09:42:20 +0100258 cp = (char *) &data;
wdenkbf9e3b32004-02-12 00:47:09 +0000259 for (i = 0; i < 8; i++)
260 sprintf (&str[i * 2], "%2.2x", *cp++);
261}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200262
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100263static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000264{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100265 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000266 int x, y;
267
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100268 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
269 debug("%02x : ", x);
270 for (y = 0; y < 16; y++)
271 debug("%2.2x ", p[x + y]);
272 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000273 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100274 unsigned char c = p[x + y];
275 if (c >= 0x20 && c <= 0x7e)
276 debug("%c", c);
277 else
278 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000279 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100280 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000281 }
282}
wdenkbf9e3b32004-02-12 00:47:09 +0000283#endif
284
285
wdenk5653fc32004-02-08 22:55:38 +0000286/*-----------------------------------------------------------------------
287 * read a character at a port width address
288 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100289static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000290{
291 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000293
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100294 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100296 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000297#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100298 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000299#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100300 flash_unmap (info, 0, offset, cp);
301 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000302}
303
304/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100305 * read a word at a port width address, assume 16bit bus
306 */
307static inline ushort flash_read_word (flash_info_t * info, uint offset)
308{
309 ushort *addr, retval;
310
311 addr = flash_map (info, 0, offset);
312 retval = flash_read16 (addr);
313 flash_unmap (info, 0, offset, addr);
314 return retval;
315}
316
317
318/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100319 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000320 * port size word. Swap for ppc format.
321 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100322static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
323 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000324{
wdenkbf9e3b32004-02-12 00:47:09 +0000325 uchar *addr;
326 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000327
wdenkbf9e3b32004-02-12 00:47:09 +0000328#ifdef DEBUG
329 int x;
330#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100331 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000332
333#ifdef DEBUG
334 debug ("long addr is at %p info->portwidth = %d\n", addr,
335 info->portwidth);
336 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100337 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000338 }
339#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200340#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100341 retval = ((flash_read8(addr) << 16) |
342 (flash_read8(addr + info->portwidth) << 24) |
343 (flash_read8(addr + 2 * info->portwidth)) |
344 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000345#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100346 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
347 (flash_read8(addr + info->portwidth - 1) << 16) |
348 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
349 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000350#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100351 flash_unmap(info, sect, offset, addr);
352
wdenkbf9e3b32004-02-12 00:47:09 +0000353 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000354}
355
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200356/*
357 * Write a proper sized command to the correct address
358 */
Stefan Roesefa36ae72009-10-27 15:15:55 +0100359void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
360 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200361{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100362
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100363 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200364 cfiword_t cword;
365
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100366 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200367 flash_make_cmd (info, cmd, &cword);
368 switch (info->portwidth) {
369 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100370 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200371 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100372 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200373 break;
374 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100375 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200376 cmd, cword.w,
377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100378 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200379 break;
380 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100381 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200382 cmd, cword.l,
383 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100384 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200385 break;
386 case FLASH_CFI_64BIT:
387#ifdef DEBUG
388 {
389 char str[20];
390
391 print_longlong (str, cword.ll);
392
393 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100394 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200395 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
396 }
397#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100398 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200399 break;
400 }
401
402 /* Ensure all the instructions are fully finished */
403 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100404
405 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200406}
407
408static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
409{
410 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
411 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
412}
413
414/*-----------------------------------------------------------------------
415 */
416static int flash_isequal (flash_info_t * info, flash_sect_t sect,
417 uint offset, uchar cmd)
418{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100419 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200420 cfiword_t cword;
421 int retval;
422
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100423 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200424 flash_make_cmd (info, cmd, &cword);
425
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100426 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200427 switch (info->portwidth) {
428 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100429 debug ("is= %x %x\n", flash_read8(addr), cword.c);
430 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200431 break;
432 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100433 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
434 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200435 break;
436 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700437 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100438 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200439 break;
440 case FLASH_CFI_64BIT:
441#ifdef DEBUG
442 {
443 char str1[20];
444 char str2[20];
445
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100446 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200447 print_longlong (str2, cword.ll);
448 debug ("is= %s %s\n", str1, str2);
449 }
450#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100451 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200452 break;
453 default:
454 retval = 0;
455 break;
456 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100457 flash_unmap(info, sect, offset, addr);
458
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200459 return retval;
460}
461
462/*-----------------------------------------------------------------------
463 */
464static int flash_isset (flash_info_t * info, flash_sect_t sect,
465 uint offset, uchar cmd)
466{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100467 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200468 cfiword_t cword;
469 int retval;
470
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100471 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200472 flash_make_cmd (info, cmd, &cword);
473 switch (info->portwidth) {
474 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100475 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 break;
477 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100478 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100481 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200482 break;
483 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100484 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200485 break;
486 default:
487 retval = 0;
488 break;
489 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100490 flash_unmap(info, sect, offset, addr);
491
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200492 return retval;
493}
494
495/*-----------------------------------------------------------------------
496 */
497static int flash_toggle (flash_info_t * info, flash_sect_t sect,
498 uint offset, uchar cmd)
499{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100500 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200501 cfiword_t cword;
502 int retval;
503
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100504 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200505 flash_make_cmd (info, cmd, &cword);
506 switch (info->portwidth) {
507 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200508 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200509 break;
510 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200511 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200512 break;
513 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200514 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200515 break;
516 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100517 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
518 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200519 break;
520 default:
521 retval = 0;
522 break;
523 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100524 flash_unmap(info, sect, offset, addr);
525
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200526 return retval;
527}
528
529/*
530 * flash_is_busy - check to see if the flash is busy
531 *
532 * This routine checks the status of the chip and returns true if the
533 * chip is busy.
534 */
535static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
536{
537 int retval;
538
539 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400540 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 case CFI_CMDSET_INTEL_STANDARD:
542 case CFI_CMDSET_INTEL_EXTENDED:
543 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
544 break;
545 case CFI_CMDSET_AMD_STANDARD:
546 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100547#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200548 case CFI_CMDSET_AMD_LEGACY:
549#endif
550 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
551 break;
552 default:
553 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100554 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200555 debug ("flash_is_busy: %d\n", retval);
556 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100557}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200558
559/*-----------------------------------------------------------------------
560 * wait for XSR.7 to be set. Time out with an error if it does not.
561 * This routine does not set the flash to read-array mode.
562 */
563static int flash_status_check (flash_info_t * info, flash_sect_t sector,
564 ulong tout, char *prompt)
565{
566 ulong start;
567
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200568#if CONFIG_SYS_HZ != 1000
Renato Andreolac40c94a2010-03-24 23:00:47 +0800569 if ((ulong)CONFIG_SYS_HZ > 100000)
570 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
571 else
572 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200573#endif
574
575 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800576 reset_timer();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200577 start = get_timer (0);
578 while (flash_is_busy (info, sector)) {
579 if (get_timer (start) > tout) {
580 printf ("Flash %s timeout at address %lx data %lx\n",
581 prompt, info->start[sector],
582 flash_read_long (info, sector, 0));
583 flash_write_cmd (info, sector, 0, info->cmd_reset);
584 return ERR_TIMOUT;
585 }
586 udelay (1); /* also triggers watchdog */
587 }
588 return ERR_OK;
589}
590
591/*-----------------------------------------------------------------------
592 * Wait for XSR.7 to be set, if it times out print an error, otherwise
593 * do a full status check.
594 *
595 * This routine sets the flash to read-array mode.
596 */
597static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
598 ulong tout, char *prompt)
599{
600 int retcode;
601
602 retcode = flash_status_check (info, sector, tout, prompt);
603 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400604 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200605 case CFI_CMDSET_INTEL_EXTENDED:
606 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500607 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200608 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
609 retcode = ERR_INVAL;
610 printf ("Flash %s error at address %lx\n", prompt,
611 info->start[sector]);
612 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
613 FLASH_STATUS_PSLBS)) {
614 puts ("Command Sequence Error.\n");
615 } else if (flash_isset (info, sector, 0,
616 FLASH_STATUS_ECLBS)) {
617 puts ("Block Erase Error.\n");
618 retcode = ERR_NOT_ERASED;
619 } else if (flash_isset (info, sector, 0,
620 FLASH_STATUS_PSLBS)) {
621 puts ("Locking Error\n");
622 }
623 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
624 puts ("Block locked.\n");
625 retcode = ERR_PROTECTED;
626 }
627 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
628 puts ("Vpp Low Error.\n");
629 }
630 flash_write_cmd (info, sector, 0, info->cmd_reset);
631 break;
632 default:
633 break;
634 }
635 return retcode;
636}
637
Thomas Choue5720822010-03-26 08:17:00 +0800638static int use_flash_status_poll(flash_info_t *info)
639{
640#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
641 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
642 info->vendor == CFI_CMDSET_AMD_STANDARD)
643 return 1;
644#endif
645 return 0;
646}
647
648static int flash_status_poll(flash_info_t *info, void *src, void *dst,
649 ulong tout, char *prompt)
650{
651#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
652 ulong start;
653 int ready;
654
655#if CONFIG_SYS_HZ != 1000
656 if ((ulong)CONFIG_SYS_HZ > 100000)
657 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
658 else
659 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
660#endif
661
662 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800663 reset_timer();
Thomas Choue5720822010-03-26 08:17:00 +0800664 start = get_timer(0);
665 while (1) {
666 switch (info->portwidth) {
667 case FLASH_CFI_8BIT:
668 ready = flash_read8(dst) == flash_read8(src);
669 break;
670 case FLASH_CFI_16BIT:
671 ready = flash_read16(dst) == flash_read16(src);
672 break;
673 case FLASH_CFI_32BIT:
674 ready = flash_read32(dst) == flash_read32(src);
675 break;
676 case FLASH_CFI_64BIT:
677 ready = flash_read64(dst) == flash_read64(src);
678 break;
679 default:
680 ready = 0;
681 break;
682 }
683 if (ready)
684 break;
685 if (get_timer(start) > tout) {
686 printf("Flash %s timeout at address %lx data %lx\n",
687 prompt, (ulong)dst, (ulong)flash_read8(dst));
688 return ERR_TIMOUT;
689 }
690 udelay(1); /* also triggers watchdog */
691 }
692#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
693 return ERR_OK;
694}
695
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200696/*-----------------------------------------------------------------------
697 */
698static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
699{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200700#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200701 unsigned short w;
702 unsigned int l;
703 unsigned long long ll;
704#endif
705
706 switch (info->portwidth) {
707 case FLASH_CFI_8BIT:
708 cword->c = c;
709 break;
710 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200711#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200712 w = c;
713 w <<= 8;
714 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100715#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200716 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100717#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200718 break;
719 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200720#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200721 l = c;
722 l <<= 24;
723 cword->l = (cword->l >> 8) | l;
724#else
725 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200726#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200727 break;
728 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200729#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200730 ll = c;
731 ll <<= 56;
732 cword->ll = (cword->ll >> 8) | ll;
733#else
734 cword->ll = (cword->ll << 8) | c;
735#endif
736 break;
wdenk5653fc32004-02-08 22:55:38 +0000737 }
wdenk5653fc32004-02-08 22:55:38 +0000738}
739
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100740/*
741 * Loop through the sector table starting from the previously found sector.
742 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000743 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200744static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000745{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100746 static flash_sect_t saved_sector = 0; /* previously found sector */
747 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000748
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100749 while ((info->start[sector] < addr)
750 && (sector < info->sector_count - 1))
751 sector++;
752 while ((info->start[sector] > addr) && (sector > 0))
753 /*
754 * also decrements the sector in case of an overshot
755 * in the first loop
756 */
757 sector--;
758
759 saved_sector = sector;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200760 return sector;
wdenk7680c142005-05-16 15:23:22 +0000761}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200762
763/*-----------------------------------------------------------------------
764 */
765static int flash_write_cfiword (flash_info_t * info, ulong dest,
766 cfiword_t cword)
767{
Becky Bruce09ce9922009-02-02 16:34:51 -0600768 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200769 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100770 flash_sect_t sect = 0;
771 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200772
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200773 /* Check if Flash is (sufficiently) erased */
774 switch (info->portwidth) {
775 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100776 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200777 break;
778 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100779 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200780 break;
781 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100782 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200783 break;
784 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100785 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200786 break;
787 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100788 flag = 0;
789 break;
790 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600791 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100792 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200793
794 /* Disable interrupts which might cause a timeout here */
795 flag = disable_interrupts ();
796
797 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400798 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200799 case CFI_CMDSET_INTEL_EXTENDED:
800 case CFI_CMDSET_INTEL_STANDARD:
801 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
802 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
803 break;
804 case CFI_CMDSET_AMD_EXTENDED:
805 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500806 sect = find_sector(info, dest);
807 flash_unlock_seq (info, sect);
808 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100809 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200810 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800811#ifdef CONFIG_FLASH_CFI_LEGACY
812 case CFI_CMDSET_AMD_LEGACY:
813 sect = find_sector(info, dest);
814 flash_unlock_seq (info, 0);
815 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
816 sect_found = 1;
817 break;
818#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200819 }
820
821 switch (info->portwidth) {
822 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100823 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200824 break;
825 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100826 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200827 break;
828 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100829 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200830 break;
831 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100832 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200833 break;
834 }
835
836 /* re-enable interrupts if necessary */
837 if (flag)
838 enable_interrupts ();
839
Jens Gehrleina7292872008-12-16 17:25:54 +0100840 if (!sect_found)
841 sect = find_sector (info, dest);
842
Thomas Choue5720822010-03-26 08:17:00 +0800843 if (use_flash_status_poll(info))
844 return flash_status_poll(info, &cword, dstaddr,
845 info->write_tout, "write");
846 else
847 return flash_full_status_check(info, sect,
848 info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200849}
850
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200851#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200852
853static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
854 int len)
855{
856 flash_sect_t sector;
857 int cnt;
858 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100859 void *src = cp;
Stefan Roeseec21d5c2009-02-05 11:25:57 +0100860 void *dst = (void *)dest;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100861 void *dst2 = dst;
862 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200863 uint offset = 0;
864 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400865 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100866
Stefan Roese0dc80e22007-12-27 07:50:54 +0100867 switch (info->portwidth) {
868 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200869 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100870 break;
871 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200872 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100873 break;
874 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200875 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100876 break;
877 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200878 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100879 break;
880 default:
881 retcode = ERR_INVAL;
882 goto out_unmap;
883 }
884
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200885 cnt = len >> shift;
886
Stefan Roese0dc80e22007-12-27 07:50:54 +0100887 while ((cnt-- > 0) && (flag == 0)) {
888 switch (info->portwidth) {
889 case FLASH_CFI_8BIT:
890 flag = ((flash_read8(dst2) & flash_read8(src)) ==
891 flash_read8(src));
892 src += 1, dst2 += 1;
893 break;
894 case FLASH_CFI_16BIT:
895 flag = ((flash_read16(dst2) & flash_read16(src)) ==
896 flash_read16(src));
897 src += 2, dst2 += 2;
898 break;
899 case FLASH_CFI_32BIT:
900 flag = ((flash_read32(dst2) & flash_read32(src)) ==
901 flash_read32(src));
902 src += 4, dst2 += 4;
903 break;
904 case FLASH_CFI_64BIT:
905 flag = ((flash_read64(dst2) & flash_read64(src)) ==
906 flash_read64(src));
907 src += 8, dst2 += 8;
908 break;
909 }
910 }
911 if (!flag) {
912 retcode = ERR_NOT_ERASED;
913 goto out_unmap;
914 }
915
916 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100917 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200918
919 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400920 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200921 case CFI_CMDSET_INTEL_STANDARD:
922 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400923 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
924 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200925 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400926 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
927 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200928 retcode = flash_status_check (info, sector,
929 info->buffer_write_tout,
930 "write to buffer");
931 if (retcode == ERR_OK) {
932 /* reduce the number of loops by the width of
933 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200934 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400935 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200936 while (cnt-- > 0) {
937 switch (info->portwidth) {
938 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100939 flash_write8(flash_read8(src), dst);
940 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200941 break;
942 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100943 flash_write16(flash_read16(src), dst);
944 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200945 break;
946 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100947 flash_write32(flash_read32(src), dst);
948 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200949 break;
950 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100951 flash_write64(flash_read64(src), dst);
952 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200953 break;
954 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100955 retcode = ERR_INVAL;
956 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200957 }
958 }
959 flash_write_cmd (info, sector, 0,
960 FLASH_CMD_WRITE_BUFFER_CONFIRM);
961 retcode = flash_full_status_check (
962 info, sector, info->buffer_write_tout,
963 "buffer write");
964 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100965
966 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200967
968 case CFI_CMDSET_AMD_STANDARD:
969 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200970 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200971
972#ifdef CONFIG_FLASH_SPANSION_S29WS_N
973 offset = ((unsigned long)dst - info->start[sector]) >> shift;
974#endif
975 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
976 cnt = len >> shift;
John Schmoller7dedefd2009-08-12 10:55:47 -0500977 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200978
979 switch (info->portwidth) {
980 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100981 while (cnt-- > 0) {
982 flash_write8(flash_read8(src), dst);
983 src += 1, dst += 1;
984 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200985 break;
986 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100987 while (cnt-- > 0) {
988 flash_write16(flash_read16(src), dst);
989 src += 2, dst += 2;
990 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200991 break;
992 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100993 while (cnt-- > 0) {
994 flash_write32(flash_read32(src), dst);
995 src += 4, dst += 4;
996 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200997 break;
998 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100999 while (cnt-- > 0) {
1000 flash_write64(flash_read64(src), dst);
1001 src += 8, dst += 8;
1002 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001003 break;
1004 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001005 retcode = ERR_INVAL;
1006 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001007 }
1008
1009 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Choue5720822010-03-26 08:17:00 +08001010 if (use_flash_status_poll(info))
1011 retcode = flash_status_poll(info, src - (1 << shift),
1012 dst - (1 << shift),
1013 info->buffer_write_tout,
1014 "buffer write");
1015 else
1016 retcode = flash_full_status_check(info, sector,
1017 info->buffer_write_tout,
1018 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001019 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001020
1021 default:
1022 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001023 retcode = ERR_INVAL;
1024 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001025 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001026
1027out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001028 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001029}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001030#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001031
wdenk7680c142005-05-16 15:23:22 +00001032
1033/*-----------------------------------------------------------------------
1034 */
wdenkbf9e3b32004-02-12 00:47:09 +00001035int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001036{
1037 int rcode = 0;
1038 int prot;
1039 flash_sect_t sect;
Thomas Choue5720822010-03-26 08:17:00 +08001040 int st;
wdenk5653fc32004-02-08 22:55:38 +00001041
wdenkbf9e3b32004-02-12 00:47:09 +00001042 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001043 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001044 return 1;
1045 }
1046 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001047 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001048 return 1;
1049 }
1050
1051 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001052 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001053 if (info->protect[sect]) {
1054 prot++;
1055 }
1056 }
1057 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001058 printf ("- Warning: %d protected sectors will not be erased!\n",
1059 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001060 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001061 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001062 }
1063
1064
wdenkbf9e3b32004-02-12 00:47:09 +00001065 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001066 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001067 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001068 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001069 case CFI_CMDSET_INTEL_STANDARD:
1070 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001071 flash_write_cmd (info, sect, 0,
1072 FLASH_CMD_CLEAR_STATUS);
1073 flash_write_cmd (info, sect, 0,
1074 FLASH_CMD_BLOCK_ERASE);
1075 flash_write_cmd (info, sect, 0,
1076 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001077 break;
1078 case CFI_CMDSET_AMD_STANDARD:
1079 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001080 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001081 flash_write_cmd (info, sect,
1082 info->addr_unlock1,
1083 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001084 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001085 flash_write_cmd (info, sect, 0,
1086 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001087 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001088#ifdef CONFIG_FLASH_CFI_LEGACY
1089 case CFI_CMDSET_AMD_LEGACY:
1090 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001091 flash_write_cmd (info, 0, info->addr_unlock1,
1092 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001093 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001094 flash_write_cmd (info, sect, 0,
1095 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001096 break;
1097#endif
wdenk5653fc32004-02-08 22:55:38 +00001098 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001099 debug ("Unkown flash vendor %d\n",
1100 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001101 break;
1102 }
1103
Thomas Choue5720822010-03-26 08:17:00 +08001104 if (use_flash_status_poll(info)) {
1105 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1106 void *dest;
1107 dest = flash_map(info, sect, 0);
1108 st = flash_status_poll(info, &cword, dest,
1109 info->erase_blk_tout, "erase");
1110 flash_unmap(info, sect, 0, dest);
1111 } else
1112 st = flash_full_status_check(info, sect,
1113 info->erase_blk_tout,
1114 "erase");
1115 if (st)
wdenk5653fc32004-02-08 22:55:38 +00001116 rcode = 1;
Thomas Choue5720822010-03-26 08:17:00 +08001117 else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001118 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001119 }
1120 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001121
1122 if (flash_verbose)
1123 puts (" done\n");
1124
wdenk5653fc32004-02-08 22:55:38 +00001125 return rcode;
1126}
1127
Stefan Roese70084df2010-08-13 09:36:36 +02001128#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1129static int sector_erased(flash_info_t *info, int i)
1130{
1131 int k;
1132 int size;
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001133 u32 *flash;
Stefan Roese70084df2010-08-13 09:36:36 +02001134
1135 /*
1136 * Check if whole sector is erased
1137 */
1138 size = flash_sector_size(info, i);
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001139 flash = (u32 *)info->start[i];
Stefan Roese70084df2010-08-13 09:36:36 +02001140 /* divide by 4 for longword access */
1141 size = size >> 2;
1142
1143 for (k = 0; k < size; k++) {
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001144 if (flash_read32(flash++) != 0xffffffff)
Stefan Roese70084df2010-08-13 09:36:36 +02001145 return 0; /* not erased */
1146 }
1147
1148 return 1; /* erased */
1149}
1150#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1151
wdenkbf9e3b32004-02-12 00:47:09 +00001152void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001153{
1154 int i;
1155
1156 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001157 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001158 return;
1159 }
1160
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001161 printf ("%s FLASH (%d x %d)",
1162 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001163 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001164 if (info->size < 1024*1024)
1165 printf (" Size: %ld kB in %d Sectors\n",
1166 info->size >> 10, info->sector_count);
1167 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001168 printf (" Size: %ld MB in %d Sectors\n",
1169 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001170 printf (" ");
1171 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001172 case CFI_CMDSET_INTEL_PROG_REGIONS:
1173 printf ("Intel Prog Regions");
1174 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001175 case CFI_CMDSET_INTEL_STANDARD:
1176 printf ("Intel Standard");
1177 break;
1178 case CFI_CMDSET_INTEL_EXTENDED:
1179 printf ("Intel Extended");
1180 break;
1181 case CFI_CMDSET_AMD_STANDARD:
1182 printf ("AMD Standard");
1183 break;
1184 case CFI_CMDSET_AMD_EXTENDED:
1185 printf ("AMD Extended");
1186 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001187#ifdef CONFIG_FLASH_CFI_LEGACY
1188 case CFI_CMDSET_AMD_LEGACY:
1189 printf ("AMD Legacy");
1190 break;
1191#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001192 default:
1193 printf ("Unknown (%d)", info->vendor);
1194 break;
1195 }
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001196 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1197 info->manufacturer_id);
1198 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1199 info->device_id);
Stefan Roese260421a2006-11-13 13:55:24 +01001200 if (info->device_id == 0x7E) {
1201 printf("%04X", info->device_id2);
1202 }
1203 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001204 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001205 info->write_tout);
1206 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001207 printf (" Buffer write timeout: %ld ms, "
1208 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001209 info->buffer_write_tout,
1210 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001211 }
wdenk5653fc32004-02-08 22:55:38 +00001212
Stefan Roese260421a2006-11-13 13:55:24 +01001213 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001214 for (i = 0; i < info->sector_count; ++i) {
Kim Phillips2e973942010-07-26 18:35:39 -05001215 if (ctrlc())
Stefan Roese70084df2010-08-13 09:36:36 +02001216 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001217 if ((i % 5) == 0)
Stefan Roese70084df2010-08-13 09:36:36 +02001218 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001219#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001220 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001221 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001222 info->start[i],
Stefan Roese70084df2010-08-13 09:36:36 +02001223 sector_erased(info, i) ? 'E' : ' ',
Stefan Roese260421a2006-11-13 13:55:24 +01001224 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001225#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001226 printf (" %08lX %s ",
1227 info->start[i],
1228 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001229#endif
1230 }
wdenk4b9206e2004-03-23 22:14:11 +00001231 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001232 return;
1233}
1234
1235/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001236 * This is used in a few places in write_buf() to show programming
1237 * progress. Making it a function is nasty because it needs to do side
1238 * effect updates to digit and dots. Repeated code is nasty too, so
1239 * we define it once here.
1240 */
Stefan Roesef0105722008-03-19 07:09:26 +01001241#ifdef CONFIG_FLASH_SHOW_PROGRESS
1242#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001243 if (flash_verbose) { \
1244 dots -= dots_sub; \
1245 if ((scale > 0) && (dots <= 0)) { \
1246 if ((digit % 5) == 0) \
1247 printf ("%d", digit / 5); \
1248 else \
1249 putc ('.'); \
1250 digit--; \
1251 dots += scale; \
1252 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001253 }
Stefan Roesef0105722008-03-19 07:09:26 +01001254#else
1255#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1256#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001257
1258/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001259 * Copy memory to flash, returns:
1260 * 0 - OK
1261 * 1 - write timeout
1262 * 2 - Flash not erased
1263 */
wdenkbf9e3b32004-02-12 00:47:09 +00001264int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001265{
1266 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001267 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001268 int aln;
1269 cfiword_t cword;
1270 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001271#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001272 int buffered_size;
1273#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001274#ifdef CONFIG_FLASH_SHOW_PROGRESS
1275 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1276 int scale = 0;
1277 int dots = 0;
1278
1279 /*
1280 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1281 */
1282 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1283 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1284 CONFIG_FLASH_SHOW_PROGRESS);
1285 }
1286#endif
1287
wdenkbf9e3b32004-02-12 00:47:09 +00001288 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001289 wp = (addr & ~(info->portwidth - 1));
1290
1291 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001292 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001293 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001294 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001295 for (i = 0; i < aln; ++i)
1296 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001297
wdenkbf9e3b32004-02-12 00:47:09 +00001298 for (; (i < info->portwidth) && (cnt > 0); i++) {
1299 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001300 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001301 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001302 for (; (cnt == 0) && (i < info->portwidth); ++i)
1303 flash_add_byte (info, &cword, flash_read8(p + i));
1304
1305 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001306 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001307 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001308
1309 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001310 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001311 }
1312
wdenkbf9e3b32004-02-12 00:47:09 +00001313 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001314#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001315 buffered_size = (info->portwidth / info->chipwidth);
1316 buffered_size *= info->buffer_size;
1317 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001318 /* prohibit buffer write when buffer_size is 1 */
1319 if (info->buffer_size == 1) {
1320 cword.l = 0;
1321 for (i = 0; i < info->portwidth; i++)
1322 flash_add_byte (info, &cword, *src++);
1323 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1324 return rc;
1325 wp += info->portwidth;
1326 cnt -= info->portwidth;
1327 continue;
1328 }
1329
1330 /* write buffer until next buffered_size aligned boundary */
1331 i = buffered_size - (wp % buffered_size);
1332 if (i > cnt)
1333 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001334 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001335 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001336 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001337 wp += i;
1338 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001339 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001340 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001341 }
1342#else
wdenkbf9e3b32004-02-12 00:47:09 +00001343 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001344 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001345 for (i = 0; i < info->portwidth; i++) {
1346 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001347 }
wdenkbf9e3b32004-02-12 00:47:09 +00001348 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001349 return rc;
1350 wp += info->portwidth;
1351 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001352 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001353 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001354#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001355
wdenk5653fc32004-02-08 22:55:38 +00001356 if (cnt == 0) {
1357 return (0);
1358 }
1359
1360 /*
1361 * handle unaligned tail bytes
1362 */
1363 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001364 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001365 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001366 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001367 --cnt;
1368 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001369 for (; i < info->portwidth; ++i)
1370 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001371
wdenkbf9e3b32004-02-12 00:47:09 +00001372 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001373}
1374
1375/*-----------------------------------------------------------------------
1376 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001377#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001378
wdenkbf9e3b32004-02-12 00:47:09 +00001379int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001380{
1381 int retcode = 0;
1382
Rafael Camposbc9019e2008-07-31 10:22:20 +02001383 switch (info->vendor) {
1384 case CFI_CMDSET_INTEL_PROG_REGIONS:
1385 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001386 case CFI_CMDSET_INTEL_EXTENDED:
Philippe De Muyter54652992010-08-17 18:40:25 +02001387 /*
1388 * see errata called
1389 * "Numonyx Axcell P33/P30 Specification Update" :)
1390 */
1391 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1392 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1393 prot)) {
1394 /*
1395 * cmd must come before FLASH_CMD_PROTECT + 20us
1396 * Disable interrupts which might cause a timeout here.
1397 */
1398 int flag = disable_interrupts ();
1399 unsigned short cmd;
1400
1401 if (prot)
1402 cmd = FLASH_CMD_PROTECT_SET;
1403 else
1404 cmd = FLASH_CMD_PROTECT_CLEAR;
1405
Rafael Camposbc9019e2008-07-31 10:22:20 +02001406 flash_write_cmd (info, sector, 0,
Philippe De Muyter54652992010-08-17 18:40:25 +02001407 FLASH_CMD_PROTECT);
1408 flash_write_cmd (info, sector, 0, cmd);
1409 /* re-enable interrupts if necessary */
1410 if (flag)
1411 enable_interrupts ();
1412 }
Rafael Camposbc9019e2008-07-31 10:22:20 +02001413 break;
1414 case CFI_CMDSET_AMD_EXTENDED:
1415 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001416 /* U-Boot only checks the first byte */
1417 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1418 if (prot) {
1419 flash_unlock_seq (info, 0);
1420 flash_write_cmd (info, 0,
1421 info->addr_unlock1,
1422 ATM_CMD_SOFTLOCK_START);
1423 flash_unlock_seq (info, 0);
1424 flash_write_cmd (info, sector, 0,
1425 ATM_CMD_LOCK_SECT);
1426 } else {
1427 flash_write_cmd (info, 0,
1428 info->addr_unlock1,
1429 AMD_CMD_UNLOCK_START);
1430 if (info->device_id == ATM_ID_BV6416)
1431 flash_write_cmd (info, sector,
1432 0, ATM_CMD_UNLOCK_SECT);
1433 }
1434 }
1435 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001436#ifdef CONFIG_FLASH_CFI_LEGACY
1437 case CFI_CMDSET_AMD_LEGACY:
1438 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1439 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1440 if (prot)
1441 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1442 else
1443 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1444#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001445 };
wdenk5653fc32004-02-08 22:55:38 +00001446
Stefan Roesedf4e8132010-10-25 18:31:29 +02001447 /*
1448 * Flash needs to be in status register read mode for
1449 * flash_full_status_check() to work correctly
1450 */
1451 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
wdenkbf9e3b32004-02-12 00:47:09 +00001452 if ((retcode =
1453 flash_full_status_check (info, sector, info->erase_blk_tout,
1454 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001455
1456 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001457
1458 /*
1459 * On some of Intel's flash chips (marked via legacy_unlock)
1460 * unprotect unprotects all locking.
1461 */
1462 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001463 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001464
1465 for (i = 0; i < info->sector_count; i++) {
1466 if (info->protect[i])
1467 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001468 }
1469 }
1470 }
wdenk5653fc32004-02-08 22:55:38 +00001471 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001472}
1473
wdenk5653fc32004-02-08 22:55:38 +00001474/*-----------------------------------------------------------------------
1475 * flash_read_user_serial - read the OneTimeProgramming cells
1476 */
wdenkbf9e3b32004-02-12 00:47:09 +00001477void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1478 int len)
wdenk5653fc32004-02-08 22:55:38 +00001479{
wdenkbf9e3b32004-02-12 00:47:09 +00001480 uchar *src;
1481 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001482
1483 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001484 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001485 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1486 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001487 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001488 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001489}
wdenkbf9e3b32004-02-12 00:47:09 +00001490
wdenk5653fc32004-02-08 22:55:38 +00001491/*
1492 * flash_read_factory_serial - read the device Id from the protection area
1493 */
wdenkbf9e3b32004-02-12 00:47:09 +00001494void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1495 int len)
wdenk5653fc32004-02-08 22:55:38 +00001496{
wdenkbf9e3b32004-02-12 00:47:09 +00001497 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001498
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001499 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001500 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1501 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001502 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001503 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001504}
1505
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001506#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001507
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001508/*-----------------------------------------------------------------------
1509 * Reverse the order of the erase regions in the CFI QRY structure.
1510 * This is needed for chips that are either a) correctly detected as
1511 * top-boot, or b) buggy.
1512 */
1513static void cfi_reverse_geometry(struct cfi_qry *qry)
1514{
1515 unsigned int i, j;
1516 u32 tmp;
1517
1518 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1519 tmp = qry->erase_region_info[i];
1520 qry->erase_region_info[i] = qry->erase_region_info[j];
1521 qry->erase_region_info[j] = tmp;
1522 }
1523}
wdenk5653fc32004-02-08 22:55:38 +00001524
1525/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001526 * read jedec ids from device and set corresponding fields in info struct
1527 *
1528 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1529 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001530 */
1531static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1532{
1533 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1534 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1535 udelay(1000); /* some flash are slow to respond */
1536 info->manufacturer_id = flash_read_uchar (info,
1537 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001538 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1539 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1540 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001541 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1542}
1543
1544static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1545{
1546 info->cmd_reset = FLASH_CMD_RESET;
1547
1548 cmdset_intel_read_jedec_ids(info);
1549 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1550
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001551#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001552 /* read legacy lock/unlock bit from intel flash */
1553 if (info->ext_addr) {
1554 info->legacy_unlock = flash_read_uchar (info,
1555 info->ext_addr + 5) & 0x08;
1556 }
1557#endif
1558
1559 return 0;
1560}
1561
1562static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1563{
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001564 ushort bankId = 0;
1565 uchar manuId;
1566
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001567 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1568 flash_unlock_seq(info, 0);
1569 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1570 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001571
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001572 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1573 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1574 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1575 bankId += 0x100;
1576 manuId = flash_read_uchar (info,
1577 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1578 }
1579 info->manufacturer_id = manuId;
Tor Krill90447ec2008-03-28 11:29:10 +01001580
1581 switch (info->chipwidth){
1582 case FLASH_CFI_8BIT:
1583 info->device_id = flash_read_uchar (info,
1584 FLASH_OFFSET_DEVICE_ID);
1585 if (info->device_id == 0x7E) {
1586 /* AMD 3-byte (expanded) device ids */
1587 info->device_id2 = flash_read_uchar (info,
1588 FLASH_OFFSET_DEVICE_ID2);
1589 info->device_id2 <<= 8;
1590 info->device_id2 |= flash_read_uchar (info,
1591 FLASH_OFFSET_DEVICE_ID3);
1592 }
1593 break;
1594 case FLASH_CFI_16BIT:
1595 info->device_id = flash_read_word (info,
1596 FLASH_OFFSET_DEVICE_ID);
1597 break;
1598 default:
1599 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001600 }
1601 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1602}
1603
1604static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1605{
1606 info->cmd_reset = AMD_CMD_RESET;
1607
1608 cmdset_amd_read_jedec_ids(info);
1609 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1610
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001611 return 0;
1612}
1613
1614#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001615static void flash_read_jedec_ids (flash_info_t * info)
1616{
1617 info->manufacturer_id = 0;
1618 info->device_id = 0;
1619 info->device_id2 = 0;
1620
1621 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001622 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001623 case CFI_CMDSET_INTEL_STANDARD:
1624 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001625 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001626 break;
1627 case CFI_CMDSET_AMD_STANDARD:
1628 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001629 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001630 break;
1631 default:
1632 break;
1633 }
1634}
1635
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001636/*-----------------------------------------------------------------------
1637 * Call board code to request info about non-CFI flash.
1638 * board_flash_get_legacy needs to fill in at least:
1639 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1640 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001641static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001642{
1643 flash_info_t *info = &flash_info[banknum];
1644
1645 if (board_flash_get_legacy(base, banknum, info)) {
1646 /* board code may have filled info completely. If not, we
1647 use JEDEC ID probing. */
1648 if (!info->vendor) {
1649 int modes[] = {
1650 CFI_CMDSET_AMD_STANDARD,
1651 CFI_CMDSET_INTEL_STANDARD
1652 };
1653 int i;
1654
1655 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1656 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001657 info->start[0] =
1658 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001659 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001660 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001661 if (info->portwidth == FLASH_CFI_8BIT
1662 && info->interface == FLASH_CFI_X8X16) {
1663 info->addr_unlock1 = 0x2AAA;
1664 info->addr_unlock2 = 0x5555;
1665 } else {
1666 info->addr_unlock1 = 0x5555;
1667 info->addr_unlock2 = 0x2AAA;
1668 }
1669 flash_read_jedec_ids(info);
1670 debug("JEDEC PROBE: ID %x %x %x\n",
1671 info->manufacturer_id,
1672 info->device_id,
1673 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001674 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001675 break;
Becky Bruce09ce9922009-02-02 16:34:51 -06001676 else
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001677 unmap_physmem((void *)info->start[0],
Becky Bruce09ce9922009-02-02 16:34:51 -06001678 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001679 }
1680 }
1681
1682 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001683 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001684 case CFI_CMDSET_INTEL_STANDARD:
1685 case CFI_CMDSET_INTEL_EXTENDED:
1686 info->cmd_reset = FLASH_CMD_RESET;
1687 break;
1688 case CFI_CMDSET_AMD_STANDARD:
1689 case CFI_CMDSET_AMD_EXTENDED:
1690 case CFI_CMDSET_AMD_LEGACY:
1691 info->cmd_reset = AMD_CMD_RESET;
1692 break;
1693 }
1694 info->flash_id = FLASH_MAN_CFI;
1695 return 1;
1696 }
1697 return 0; /* use CFI */
1698}
1699#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001700static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001701{
1702 return 0; /* use CFI */
1703}
1704#endif
1705
Stefan Roese260421a2006-11-13 13:55:24 +01001706/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001707 * detect if flash is compatible with the Common Flash Interface (CFI)
1708 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001709 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001710static void flash_read_cfi (flash_info_t *info, void *buf,
1711 unsigned int start, size_t len)
1712{
1713 u8 *p = buf;
1714 unsigned int i;
1715
1716 for (i = 0; i < len; i++)
1717 p[i] = flash_read_uchar(info, start + i);
1718}
1719
Stefan Roesefa36ae72009-10-27 15:15:55 +01001720void __flash_cmd_reset(flash_info_t *info)
1721{
1722 /*
1723 * We do not yet know what kind of commandset to use, so we issue
1724 * the reset command in both Intel and AMD variants, in the hope
1725 * that AMD flash roms ignore the Intel command.
1726 */
1727 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1728 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1729}
1730void flash_cmd_reset(flash_info_t *info)
1731 __attribute__((weak,alias("__flash_cmd_reset")));
1732
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001733static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001734{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001735 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001736
Stefan Roesefa36ae72009-10-27 15:15:55 +01001737 /* Issue FLASH reset command */
1738 flash_cmd_reset(info);
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001739
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001740 for (cfi_offset=0;
1741 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1742 cfi_offset++) {
1743 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1744 FLASH_CMD_CFI);
1745 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1746 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1747 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001748 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1749 sizeof(struct cfi_qry));
1750 info->interface = le16_to_cpu(qry->interface_desc);
1751
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001752 info->cfi_offset = flash_offset_cfi[cfi_offset];
1753 debug ("device interface is %d\n",
1754 info->interface);
1755 debug ("found port %d chip %d ",
1756 info->portwidth, info->chipwidth);
1757 debug ("port %d bits chip %d bits\n",
1758 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1759 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1760
1761 /* calculate command offsets as in the Linux driver */
1762 info->addr_unlock1 = 0x555;
1763 info->addr_unlock2 = 0x2aa;
1764
1765 /*
1766 * modify the unlock address if we are
1767 * in compatibility mode
1768 */
1769 if ( /* x8/x16 in x8 mode */
1770 ((info->chipwidth == FLASH_CFI_BY8) &&
1771 (info->interface == FLASH_CFI_X8X16)) ||
1772 /* x16/x32 in x16 mode */
1773 ((info->chipwidth == FLASH_CFI_BY16) &&
1774 (info->interface == FLASH_CFI_X16X32)))
1775 {
1776 info->addr_unlock1 = 0xaaa;
1777 info->addr_unlock2 = 0x555;
1778 }
1779
1780 info->name = "CFI conformant";
1781 return 1;
1782 }
1783 }
1784
1785 return 0;
1786}
1787
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001788static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001789{
wdenkbf9e3b32004-02-12 00:47:09 +00001790 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001791
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001792 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001793 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1794 for (info->chipwidth = FLASH_CFI_BY8;
1795 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001796 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001797 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001798 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001799 }
wdenkbf9e3b32004-02-12 00:47:09 +00001800 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001801 return 0;
1802}
wdenkbf9e3b32004-02-12 00:47:09 +00001803
wdenk5653fc32004-02-08 22:55:38 +00001804/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001805 * Manufacturer-specific quirks. Add workarounds for geometry
1806 * reversal, etc. here.
1807 */
1808static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1809{
1810 /* check if flash geometry needs reversal */
1811 if (qry->num_erase_regions > 1) {
1812 /* reverse geometry if top boot part */
1813 if (info->cfi_version < 0x3131) {
1814 /* CFI < 1.1, try to guess from device id */
1815 if ((info->device_id & 0x80) != 0)
1816 cfi_reverse_geometry(qry);
1817 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1818 /* CFI >= 1.1, deduct from top/bottom flag */
1819 /* note: ext_addr is valid since cfi_version > 0 */
1820 cfi_reverse_geometry(qry);
1821 }
1822 }
1823}
1824
1825static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1826{
1827 int reverse_geometry = 0;
1828
1829 /* Check the "top boot" bit in the PRI */
1830 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1831 reverse_geometry = 1;
1832
1833 /* AT49BV6416(T) list the erase regions in the wrong order.
1834 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01001835 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001836 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001837 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1838 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001839
1840 if (reverse_geometry)
1841 cfi_reverse_geometry(qry);
1842}
1843
Richard Retanubune8eac432009-01-14 08:44:26 -05001844static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1845{
1846 /* check if flash geometry needs reversal */
1847 if (qry->num_erase_regions > 1) {
1848 /* reverse geometry if top boot part */
1849 if (info->cfi_version < 0x3131) {
Richard Retanubun7a886012009-03-06 10:09:37 -05001850 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1851 if (info->device_id == 0x22CA ||
1852 info->device_id == 0x2256) {
Richard Retanubune8eac432009-01-14 08:44:26 -05001853 cfi_reverse_geometry(qry);
1854 }
1855 }
1856 }
1857}
1858
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001859/*
wdenk5653fc32004-02-08 22:55:38 +00001860 * The following code cannot be run from FLASH!
1861 *
1862 */
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001863ulong flash_get_size (phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001864{
wdenkbf9e3b32004-02-12 00:47:09 +00001865 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001866 int i, j;
1867 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06001868 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00001869 unsigned long tmp;
1870 int size_ratio;
1871 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001872 int erase_region_size;
1873 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001874 struct cfi_qry qry;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001875 unsigned long max_size;
Stefan Roese260421a2006-11-13 13:55:24 +01001876
Kumar Galaf9796902008-05-15 15:13:08 -05001877 memset(&qry, 0, sizeof(qry));
1878
Stefan Roese260421a2006-11-13 13:55:24 +01001879 info->ext_addr = 0;
1880 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001881#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001882 info->legacy_unlock = 0;
1883#endif
wdenk5653fc32004-02-08 22:55:38 +00001884
Becky Bruce09ce9922009-02-02 16:34:51 -06001885 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001886
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001887 if (flash_detect_cfi (info, &qry)) {
1888 info->vendor = le16_to_cpu(qry.p_id);
1889 info->ext_addr = le16_to_cpu(qry.p_adr);
1890 num_erase_regions = qry.num_erase_regions;
1891
Stefan Roese260421a2006-11-13 13:55:24 +01001892 if (info->ext_addr) {
1893 info->cfi_version = (ushort) flash_read_uchar (info,
1894 info->ext_addr + 3) << 8;
1895 info->cfi_version |= (ushort) flash_read_uchar (info,
1896 info->ext_addr + 4);
1897 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001898
wdenkbf9e3b32004-02-12 00:47:09 +00001899#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001900 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001901#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001902
wdenkbf9e3b32004-02-12 00:47:09 +00001903 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001904 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001905 case CFI_CMDSET_INTEL_STANDARD:
1906 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001907 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001908 break;
1909 case CFI_CMDSET_AMD_STANDARD:
1910 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001911 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001912 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001913 default:
1914 printf("CFI: Unknown command set 0x%x\n",
1915 info->vendor);
1916 /*
1917 * Unfortunately, this means we don't know how
1918 * to get the chip back to Read mode. Might
1919 * as well try an Intel-style reset...
1920 */
1921 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1922 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001923 }
wdenkcd37d9e2004-02-10 00:03:41 +00001924
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001925 /* Do manufacturer-specific fixups */
1926 switch (info->manufacturer_id) {
1927 case 0x0001:
1928 flash_fixup_amd(info, &qry);
1929 break;
1930 case 0x001f:
1931 flash_fixup_atmel(info, &qry);
1932 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001933 case 0x0020:
1934 flash_fixup_stm(info, &qry);
1935 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001936 }
1937
wdenkbf9e3b32004-02-12 00:47:09 +00001938 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001939 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1940 debug ("device id is 0x%x\n", info->device_id);
1941 debug ("device id2 is 0x%x\n", info->device_id2);
1942 debug ("cfi version is 0x%04x\n", info->cfi_version);
1943
wdenk5653fc32004-02-08 22:55:38 +00001944 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001945 /* if the chip is x8/x16 reduce the ratio by half */
1946 if ((info->interface == FLASH_CFI_X8X16)
1947 && (info->chipwidth == FLASH_CFI_BY8)) {
1948 size_ratio >>= 1;
1949 }
wdenkbf9e3b32004-02-12 00:47:09 +00001950 debug ("size_ratio %d port %d bits chip %d bits\n",
1951 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1952 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001953 info->size = 1 << qry.dev_size;
1954 /* multiply the size by the number of chips */
1955 info->size *= size_ratio;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001956 max_size = cfi_flash_bank_size(banknum);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001957 if (max_size && (info->size > max_size)) {
1958 debug("[truncated from %ldMiB]", info->size >> 20);
1959 info->size = max_size;
1960 }
wdenkbf9e3b32004-02-12 00:47:09 +00001961 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001962 sect_cnt = 0;
1963 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001964 for (i = 0; i < num_erase_regions; i++) {
1965 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001966 printf ("%d erase regions found, only %d used\n",
1967 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001968 break;
1969 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001970
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001971 tmp = le32_to_cpu(qry.erase_region_info[i]);
1972 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001973
1974 erase_region_count = (tmp & 0xffff) + 1;
1975 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001976 erase_region_size =
1977 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001978 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001979 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001980 for (j = 0; j < erase_region_count; j++) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001981 if (sector - base >= info->size)
1982 break;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001983 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001984 printf("ERROR: too many flash sectors\n");
1985 break;
1986 }
Becky Bruce09ce9922009-02-02 16:34:51 -06001987 info->start[sect_cnt] =
1988 (ulong)map_physmem(sector,
1989 info->portwidth,
1990 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001991 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001992
1993 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001994 * Only read protection status from
1995 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00001996 */
1997 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001998 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00001999 case CFI_CMDSET_INTEL_EXTENDED:
2000 case CFI_CMDSET_INTEL_STANDARD:
Stefan Roesedf4e8132010-10-25 18:31:29 +02002001 /*
2002 * Set flash to read-id mode. Otherwise
2003 * reading protected status is not
2004 * guaranteed.
2005 */
2006 flash_write_cmd(info, sect_cnt, 0,
2007 FLASH_CMD_READ_ID);
wdenka1191902005-01-09 17:12:27 +00002008 info->protect[sect_cnt] =
2009 flash_isset (info, sect_cnt,
2010 FLASH_OFFSET_PROTECT,
2011 FLASH_STATUS_PROTECT);
2012 break;
2013 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002014 /* default: not protected */
2015 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00002016 }
2017
wdenk5653fc32004-02-08 22:55:38 +00002018 sect_cnt++;
2019 }
2020 }
2021
2022 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002023 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2024 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002025 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002026 (1 << qry.block_erase_timeout_max);
2027 tmp = (1 << qry.buf_write_timeout_typ) *
2028 (1 << qry.buf_write_timeout_max);
2029
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002030 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002031 info->buffer_write_tout = (tmp + 999) / 1000;
2032 tmp = (1 << qry.word_write_timeout_typ) *
2033 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002034 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002035 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00002036 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002037 if ((info->interface == FLASH_CFI_X8X16) &&
2038 (info->chipwidth == FLASH_CFI_BY8)) {
2039 /* XXX - Need to test on x8/x16 in parallel. */
2040 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00002041 }
Mike Frysinger22159872008-10-02 01:55:38 -04002042
2043 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00002044 }
2045
wdenkbf9e3b32004-02-12 00:47:09 +00002046 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00002047}
2048
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002049#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002050void flash_set_verbose(uint v)
2051{
2052 flash_verbose = v;
2053}
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002054#endif
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002055
Stefan Roese6f726f92010-10-25 18:31:48 +02002056static void cfi_flash_set_config_reg(u32 base, u16 val)
2057{
2058#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2059 /*
2060 * Only set this config register if really defined
2061 * to a valid value (0xffff is invalid)
2062 */
2063 if (val == 0xffff)
2064 return;
2065
2066 /*
2067 * Set configuration register. Data is "encrypted" in the 16 lower
2068 * address bits.
2069 */
2070 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2071 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2072
2073 /*
2074 * Finally issue reset-command to bring device back to
2075 * read-array mode
2076 */
2077 flash_write16(FLASH_CMD_RESET, (void *)base);
2078#endif
2079}
2080
wdenk5653fc32004-02-08 22:55:38 +00002081/*-----------------------------------------------------------------------
2082 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002083unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00002084{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002085 unsigned long size = 0;
2086 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002087#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002088 struct apl_s {
2089 ulong start;
2090 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002091 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002092#endif
wdenk5653fc32004-02-08 22:55:38 +00002093
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002094#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002095 /* read environment from EEPROM */
2096 char s[64];
Wolfgang Denkcdb74972010-07-24 21:55:43 +02002097 getenv_f("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002098#endif
wdenk5653fc32004-02-08 22:55:38 +00002099
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002100 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002101 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002102 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002103
Stefan Roese6f726f92010-10-25 18:31:48 +02002104 /* Optionally write flash configuration register */
2105 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2106 cfi_flash_config_reg(i));
2107
Stefan Roeseb00e19c2010-08-30 10:11:51 +02002108 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002109 flash_get_size(cfi_flash_bank_addr(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002110 size += flash_info[i].size;
2111 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002112#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002113 printf ("## Unknown FLASH on Bank %d "
2114 "- Size = 0x%08lx = %ld MB\n",
2115 i+1, flash_info[i].size,
John Schmoller0e3fa012010-09-29 13:49:05 -05002116 flash_info[i].size >> 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002117#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002118 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002119#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002120 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2121 /*
2122 * Only the U-Boot image and it's environment
2123 * is protected, all other sectors are
2124 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002125 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002126 * and the environment variable "unlock" is
2127 * set to "yes".
2128 */
2129 if (flash_info[i].legacy_unlock) {
2130 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002131
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002132 /*
2133 * Disable legacy_unlock temporarily,
2134 * since flash_real_protect would
2135 * relock all other sectors again
2136 * otherwise.
2137 */
2138 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002139
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002140 /*
2141 * Legacy unlocking (e.g. Intel J3) ->
2142 * unlock only one sector. This will
2143 * unlock all sectors.
2144 */
2145 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002146
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002147 flash_info[i].legacy_unlock = 1;
2148
2149 /*
2150 * Manually mark other sectors as
2151 * unlocked (unprotected)
2152 */
2153 for (k = 1; k < flash_info[i].sector_count; k++)
2154 flash_info[i].protect[k] = 0;
2155 } else {
2156 /*
2157 * No legancy unlocking -> unlock all sectors
2158 */
2159 flash_protect (FLAG_PROTECT_CLEAR,
2160 flash_info[i].start[0],
2161 flash_info[i].start[0]
2162 + flash_info[i].size - 1,
2163 &flash_info[i]);
2164 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002165 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002166#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002167 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002168
2169 /* Monitor protection ON by default */
Wolfgang Wegner8f9a2212010-03-02 10:59:19 +01002170#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2171 (!defined(CONFIG_MONITOR_IS_IN_RAM))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002172 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002173 CONFIG_SYS_MONITOR_BASE,
2174 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2175 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002176#endif
2177
2178 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002179#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002180 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002181 CONFIG_ENV_ADDR,
2182 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2183 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002184#endif
2185
2186 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002187#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002188 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002189 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denkdfcd7f22009-05-15 00:16:03 +02002190 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002191 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002192#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002193
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002194#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002195 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2196 debug("autoprotecting from %08x to %08x\n",
2197 apl[i].start, apl[i].start + apl[i].size - 1);
2198 flash_protect (FLAG_PROTECT_SET,
2199 apl[i].start,
2200 apl[i].start + apl[i].size - 1,
2201 flash_get_info(apl[i].start));
2202 }
2203#endif
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002204
2205#ifdef CONFIG_FLASH_CFI_MTD
2206 cfi_mtd_init();
2207#endif
2208
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002209 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002210}