blob: 6d5b81e05e161abb4fb7523cae9be187de33f229 [file] [log] [blame]
Michal Simek1d6c54e2018-04-12 17:39:46 +02001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
4 */
5
6#ifndef __CONFIG_ZYNQMP_R5_H
7#define __CONFIG_ZYNQMP_R5_H
8
9#define CONFIG_EXTRA_ENV_SETTINGS
10
11/* CPU clock */
12#define CONFIG_CPU_FREQ_HZ 500000000
13
14/* Serial drivers */
15/* The following table includes the supported baudrates */
16#define CONFIG_SYS_BAUDRATE_TABLE \
17 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
18
Michal Simek1d6c54e2018-04-12 17:39:46 +020019/* Boot configuration */
Michal Simek1d6c54e2018-04-12 17:39:46 +020020
21#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
22
Michal Simek1d6c54e2018-04-12 17:39:46 +020023#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
24#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
25#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
26 CONFIG_SYS_INIT_RAM_SIZE - \
27 GENERATED_GBL_DATA_SIZE)
28
29/* Extend size of kernel image for uncompression */
30#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
31
Michal Simek1d6c54e2018-04-12 17:39:46 +020032#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */