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Prabhakar Kushwaha41d91012013-01-14 18:26:57 +00001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Prabhakar Kushwaha41d91012013-01-14 18:26:57 +00005 */
6
7#include <common.h>
8#include <asm/fsl_law.h>
9#include <asm/mmu.h>
10
11struct law_entry law_table[] = {
Prabhakar Kushwaha41d91012013-01-14 18:26:57 +000012 SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_128M, LAW_TRGT_IF_IFC),
Prabhakar Kushwaha83e0c2b2013-04-16 13:28:40 +053013#ifdef CONFIG_SYS_NAND_BASE_PHYS
Prabhakar Kushwaha41d91012013-01-14 18:26:57 +000014 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
Prabhakar Kushwaha83e0c2b2013-04-16 13:28:40 +053015#endif
16#ifdef CONFIG_SYS_FPGA_BASE_PHYS
Prabhakar Kushwaha41d91012013-01-14 18:26:57 +000017 SET_LAW(CONFIG_SYS_FPGA_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
Prabhakar Kushwaha83e0c2b2013-04-16 13:28:40 +053018#endif
Prabhakar Kushwaha41d91012013-01-14 18:26:57 +000019};
20
21int num_law_entries = ARRAY_SIZE(law_table);