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wdenk47d1a6e2002-11-03 00:01:44 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk47d1a6e2002-11-03 00:01:44 +00006 */
7
8#include <common.h>
9#include <asm/processor.h>
Stefan Roeseb36df562010-09-09 19:18:00 +020010#include <asm/ppc4xx-i2c.h>
wdenk47d1a6e2002-11-03 00:01:44 +000011#include <command.h>
wdenk47d1a6e2002-11-03 00:01:44 +000012#include <rtc.h>
wdenk7f70e852003-05-20 14:25:27 +000013#include <post.h>
wdenk47d1a6e2002-11-03 00:01:44 +000014#include <net.h>
15#include <malloc.h>
16
17#define L1_MEMSIZE (32*1024*1024)
18
19/* the std. DHCP stufff */
20#define DHCP_ROUTER 3
21#define DHCP_NETMASK 1
22#define DHCP_BOOTFILE 67
23#define DHCP_ROOTPATH 17
24#define DHCP_HOSTNAME 12
25
26/* some extras used by CRAY
27 *
28 * on the server this looks like:
29 *
30 * option L1-initrd-image code 224 = string;
31 * option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
32 */
33#define DHCP_L1_INITRD 224
34
35/* new, [better?] way via official vendor-extensions, defining an option
36 * space.
37 * on the server this looks like:
38 *
wdenk7f70e852003-05-20 14:25:27 +000039 * option space CRAYL1;
40 * option CRAYL1.initrd code 3 = string;
41 * ..etc...
wdenk47d1a6e2002-11-03 00:01:44 +000042 */
43#define DHCP_VENDOR_SPECX 43
44#define DHCP_VX_INITRD 3
45#define DHCP_VX_BOOTCMD 4
wdenk7f70e852003-05-20 14:25:27 +000046#define DHCP_VX_BOOTARGS 5
wdenk47d1a6e2002-11-03 00:01:44 +000047#define DHCP_VX_ROOTDEV 6
wdenk7f70e852003-05-20 14:25:27 +000048#define DHCP_VX_FROMFLASH 7
49#define DHCP_VX_BOOTSCRIPT 8
50#define DHCP_VX_RCFILE 9
51#define DHCP_VX_MAGIC 10
wdenk47d1a6e2002-11-03 00:01:44 +000052
53/* Things DHCP server can tellme about. If there's no flash address, then
54 * they dont participate in 'update' to flash, and we force their values
55 * back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
56 * know this is a pain...
57 *
58 * If I get no bootfile, boot from flash. If rootpath, use that. If no
59 * rootpath use initrd in flash.
60 */
61typedef struct dhcp_item_s {
62 u8 dhcp_option;
63 u8 dhcp_vendor_option;
64 char *dhcpvalue;
65 char *envname;
66} dhcp_item_t;
67static dhcp_item_t Things[] = {
68 {DHCP_ROUTER, 0, NULL, "gateway"},
69 {DHCP_NETMASK, 0, NULL, "netmask"},
70 {DHCP_BOOTFILE, 0, NULL, "bootfile"},
71 {DHCP_ROOTPATH, 0, NULL, "rootpath"},
72 {DHCP_HOSTNAME, 0, NULL, "hostname"},
73 {DHCP_L1_INITRD, 0, NULL, "initrd"},
74/* and the other way.. */
75 {DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
76 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
wdenk7f70e852003-05-20 14:25:27 +000077 {DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
78 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
79 {DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
80 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
wdenk47d1a6e2002-11-03 00:01:44 +000081 {DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
wdenk7f70e852003-05-20 14:25:27 +000082 {DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
wdenk47d1a6e2002-11-03 00:01:44 +000083};
84
85#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
86
wdenk7f70e852003-05-20 14:25:27 +000087extern char bootscript[];
88
89/* Here is the boot logic as HUSH script. Overridden by any TFP provided
90 * bootscript file.
91 */
92
93static void init_sdram (void);
wdenk47d1a6e2002-11-03 00:01:44 +000094
95/* ------------------------------------------------------------------------- */
wdenkc837dcb2004-01-20 23:12:12 +000096int board_early_init_f (void)
wdenk47d1a6e2002-11-03 00:01:44 +000097{
wdenk7f70e852003-05-20 14:25:27 +000098 /* Running from ROM: global data is still READONLY */
99 init_sdram ();
Stefan Roese952e7762009-09-24 09:55:50 +0200100 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
101 mtdcr (UIC0ER, 0x00000000); /* disable all ints */
102 mtdcr (UIC0CR, 0x00000020); /* set all but FPGA SMI to be non-critical */
103 mtdcr (UIC0PR, 0xFFFFFFE0); /* set int polarities */
104 mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
105 mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
106 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
wdenk47d1a6e2002-11-03 00:01:44 +0000107 return 0;
108}
109
110/* ------------------------------------------------------------------------- */
111int checkboard (void)
112{
113 return (0);
114}
wdenk7f70e852003-05-20 14:25:27 +0000115/* ------------------------------------------------------------------------- */
wdenk47d1a6e2002-11-03 00:01:44 +0000116
117/* ------------------------------------------------------------------------- */
118int misc_init_r (void)
119{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200120 char *s, *e;
wdenk47d1a6e2002-11-03 00:01:44 +0000121 image_header_t *hdr;
122 time_t timestamp;
123 struct rtc_time tm;
wdenk7f70e852003-05-20 14:25:27 +0000124 char bootcmd[32];
wdenk47d1a6e2002-11-03 00:01:44 +0000125
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126 hdr = (image_header_t *) (CONFIG_SYS_MONITOR_BASE - image_get_header_size ());
Marian Balakowiczd5934ad2008-02-04 08:28:09 +0100127#if defined(CONFIG_FIT)
Marian Balakowicz9a4daad2008-02-29 14:58:34 +0100128 if (genimg_get_format ((void *)hdr) != IMAGE_FORMAT_LEGACY) {
Marian Balakowiczd5934ad2008-02-04 08:28:09 +0100129 puts ("Non legacy image format not supported\n");
130 return -1;
131 }
132#endif
133
Marian Balakowiczb97a2a02008-01-08 18:14:09 +0100134 timestamp = (time_t)image_get_time (hdr);
wdenk47d1a6e2002-11-03 00:01:44 +0000135 to_tm (timestamp, &tm);
136 printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
137
138#define FACTORY_SETTINGS 0xFFFC0000
139 if ((s = getenv ("ethaddr")) == NULL) {
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200140 e = (char *) (FACTORY_SETTINGS);
wdenk47d1a6e2002-11-03 00:01:44 +0000141 if (*(e + 0) != '0'
142 || *(e + 1) != '0'
143 || *(e + 2) != ':'
144 || *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
145 printf ("No valid MAC address in flash location 0x3C0000!\n");
146 } else {
147 printf ("Factory MAC: %s\n", e);
148 setenv ("ethaddr", e);
149 }
150 }
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200151 sprintf (bootcmd,"source %X",(unsigned)bootscript);
wdenk7f70e852003-05-20 14:25:27 +0000152 setenv ("bootcmd", bootcmd);
wdenk47d1a6e2002-11-03 00:01:44 +0000153 return (0);
154}
155
156/* ------------------------------------------------------------------------- */
wdenk47d1a6e2002-11-03 00:01:44 +0000157/* stubs so we can print dates w/o any nvram RTC.*/
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300158int rtc_get (struct rtc_time *tmp)
wdenk47d1a6e2002-11-03 00:01:44 +0000159{
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300160 return 0;
wdenk47d1a6e2002-11-03 00:01:44 +0000161}
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200162int rtc_set (struct rtc_time *tmp)
wdenk47d1a6e2002-11-03 00:01:44 +0000163{
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200164 return 0;
wdenk47d1a6e2002-11-03 00:01:44 +0000165}
166void rtc_reset (void)
167{
168 return;
169}
170
171/* ------------------------------------------------------------------------- */
wdenk7f70e852003-05-20 14:25:27 +0000172/* Do sdram bank init in C so I can read it..no console to print to yet!
wdenk47d1a6e2002-11-03 00:01:44 +0000173 */
wdenk7f70e852003-05-20 14:25:27 +0000174static void init_sdram (void)
wdenk47d1a6e2002-11-03 00:01:44 +0000175{
wdenk7f70e852003-05-20 14:25:27 +0000176 unsigned long tmp;
wdenk47d1a6e2002-11-03 00:01:44 +0000177
178 /* write SDRAM bank 0 register */
Stefan Roese95b602b2009-09-24 13:59:57 +0200179 mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200180 mtdcr (SDRAM0_CFGDATA, 0x00062001);
wdenk47d1a6e2002-11-03 00:01:44 +0000181
182/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
183/* To set the appropriate timings, we need to know the SDRAM speed. */
184/* We can use the PLB speed since the SDRAM speed is the same as */
185/* the PLB speed. The PLB speed is the FBK divider times the */
Wolfgang Denk8ed44d92008-10-19 02:35:50 +0200186/* 405GP reference clock, which on the L1 is 25MHz. */
187/* Thus, if FBK div is 2, SDRAM is 50MHz; if FBK div is 3, SDRAM is */
188/* 150MHz; if FBK is 3, SDRAM is 150MHz. */
wdenk47d1a6e2002-11-03 00:01:44 +0000189
190 /* divisor = ((mfdcr(strap)>> 28) & 0x3); */
191
Wolfgang Denk8ed44d92008-10-19 02:35:50 +0200192/* write SDRAM timing for 100MHz. */
Stefan Roese95b602b2009-09-24 13:59:57 +0200193 mtdcr (SDRAM0_CFGADDR, SDRAM0_TR);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200194 mtdcr (SDRAM0_CFGDATA, 0x0086400D);
wdenk47d1a6e2002-11-03 00:01:44 +0000195
196/* write SDRAM refresh interval register */
Stefan Roese95b602b2009-09-24 13:59:57 +0200197 mtdcr (SDRAM0_CFGADDR, SDRAM0_RTR);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200198 mtdcr (SDRAM0_CFGDATA, 0x05F00000);
wdenk47d1a6e2002-11-03 00:01:44 +0000199 udelay (200);
200
201/* sdram controller.*/
Stefan Roese95b602b2009-09-24 13:59:57 +0200202 mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200203 mtdcr (SDRAM0_CFGDATA, 0x90800000);
wdenk47d1a6e2002-11-03 00:01:44 +0000204 udelay (200);
205
wdenk7f70e852003-05-20 14:25:27 +0000206/* initially, disable ECC on all banks */
207 udelay (200);
Stefan Roese95b602b2009-09-24 13:59:57 +0200208 mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200209 tmp = mfdcr (SDRAM0_CFGDATA);
wdenk47d1a6e2002-11-03 00:01:44 +0000210 tmp &= 0xff0fffff;
Stefan Roese95b602b2009-09-24 13:59:57 +0200211 mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200212 mtdcr (SDRAM0_CFGDATA, tmp);
wdenk47d1a6e2002-11-03 00:01:44 +0000213
wdenk7f70e852003-05-20 14:25:27 +0000214 return;
215}
216
217extern int memory_post_test (int flags);
218
219int testdram (void)
220{
221 unsigned long tmp;
222 uint *pstart = (uint *) 0x00000000;
223 uint *pend = (uint *) L1_MEMSIZE;
224 uint *p;
225
Wolfgang Denkcdb74972010-07-24 21:55:43 +0200226 if (getenv_f("booted",NULL,0) <= 0)
wdenk7f70e852003-05-20 14:25:27 +0000227 {
228 printf ("testdram..");
229 /*AA*/
230 for (p = pstart; p < pend; p++)
231 *p = 0xaaaaaaaa;
232 for (p = pstart; p < pend; p++) {
233 if (*p != 0xaaaaaaaa) {
wdenk8bde7f72003-06-27 21:31:46 +0000234 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
wdenk7f70e852003-05-20 14:25:27 +0000235 (uint) p, *p, 0xaaaaaaaa);
236 return 1;
237 }
238 }
239 /*55*/
240 for (p = pstart; p < pend; p++)
241 *p = 0x55555555;
242 for (p = pstart; p < pend; p++) {
243 if (*p != 0x55555555) {
wdenk8bde7f72003-06-27 21:31:46 +0000244 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
wdenk7f70e852003-05-20 14:25:27 +0000245 (uint) p, *p, 0x55555555);
246 return 1;
247 }
248 }
249 /*addr*/
250 for (p = pstart; p < pend; p++)
251 *p = (unsigned)p;
252 for (p = pstart; p < pend; p++) {
253 if (*p != (unsigned)p) {
wdenk8bde7f72003-06-27 21:31:46 +0000254 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
wdenk7f70e852003-05-20 14:25:27 +0000255 (uint) p, *p, (uint)p);
256 return 1;
257 }
258 }
259 printf ("Success. ");
260 }
261 printf ("Enable ECC..");
262
Stefan Roese95b602b2009-09-24 13:59:57 +0200263 mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200264 tmp = (mfdcr (SDRAM0_CFGDATA) & ~0xFFE00000) | 0x90800000;
Stefan Roese95b602b2009-09-24 13:59:57 +0200265 mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200266 mtdcr (SDRAM0_CFGDATA, tmp);
wdenk47d1a6e2002-11-03 00:01:44 +0000267 udelay (600);
wdenk7f70e852003-05-20 14:25:27 +0000268 for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
269 ;
wdenk47d1a6e2002-11-03 00:01:44 +0000270 udelay (400);
Stefan Roese95b602b2009-09-24 13:59:57 +0200271 mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200272 tmp = mfdcr (SDRAM0_CFGDATA);
wdenk47d1a6e2002-11-03 00:01:44 +0000273 tmp |= 0x00800000;
Stefan Roesed1c3b272009-09-09 16:25:29 +0200274 mtdcr (SDRAM0_CFGDATA, tmp);
wdenk47d1a6e2002-11-03 00:01:44 +0000275 udelay (400);
wdenk7f70e852003-05-20 14:25:27 +0000276 printf ("enabled.\n");
277 return (0);
wdenk47d1a6e2002-11-03 00:01:44 +0000278}
279
280/* ------------------------------------------------------------------------- */
281static u8 *dhcp_env_update (u8 thing, u8 * pop)
282{
283 u8 i, oplen;
284
285 oplen = *(pop + 1);
286
287 if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
288 printf ("Whoops! failed to malloc space for DHCP thing %s\n",
289 Things[thing].envname);
290 return NULL;
291 }
292 for (i = 0; (i < oplen); i++)
293 if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
294 break;
295 *(Things[thing].dhcpvalue + i) = '\0';
296
297/* set env. */
298 if (Things[thing].envname)
wdenk7f70e852003-05-20 14:25:27 +0000299 {
wdenk47d1a6e2002-11-03 00:01:44 +0000300 setenv (Things[thing].envname, Things[thing].dhcpvalue);
wdenk7f70e852003-05-20 14:25:27 +0000301 }
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200302 return ((u8 *)(Things[thing].dhcpvalue));
wdenk47d1a6e2002-11-03 00:01:44 +0000303}
304
305/* ------------------------------------------------------------------------- */
306u8 *dhcp_vendorex_prep (u8 * e)
307{
308 u8 thing;
309
310/* ask for the things I want. */
311 *e++ = 55; /* Parameter Request List */
312 *e++ = N_THINGS;
313 for (thing = 0; thing < N_THINGS; thing++)
314 *e++ = Things[thing].dhcp_option;
315 *e++ = 255;
316
317 return e;
318}
319
320/* ------------------------------------------------------------------------- */
321/* .. return NULL means it wasnt mine, non-null means I got it..*/
322u8 *dhcp_vendorex_proc (u8 * pop)
323{
324 u8 oplen, *sub_op, sub_oplen, *retval;
325 u8 thing = 0;
326
327 retval = NULL;
328 oplen = *(pop + 1);
329/* if pop is vender spec indicator, there are sub-options. */
330 if (*pop == DHCP_VENDOR_SPECX) {
331 for (sub_op = pop + 2;
332 oplen && (sub_oplen = *(sub_op + 1));
333 oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
334 for (thing = 0; thing < N_THINGS; thing++) {
335 if (*sub_op == Things[thing].dhcp_vendor_option) {
wdenk7f70e852003-05-20 14:25:27 +0000336 if (!(retval = dhcp_env_update (thing, sub_op))) {
337 return NULL;
338 }
wdenk47d1a6e2002-11-03 00:01:44 +0000339 }
340 }
341 }
342 } else {
343 for (thing = 0; thing < N_THINGS; thing++) {
344 if (*pop == Things[thing].dhcp_option)
345 if (!(retval = dhcp_env_update (thing, pop)))
346 return NULL;
347 }
348 }
wdenk7f70e852003-05-20 14:25:27 +0000349 return (pop);
wdenk47d1a6e2002-11-03 00:01:44 +0000350}