blob: 4ae955d9cac639ec8cd1c09aaaffa4c23cd894a8 [file] [log] [blame]
Parthiban Nallathambid2d11912019-04-10 16:35:32 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Board configuration file for Phytec phyBOARD-i.MX6ULL-Segin SBC
4 * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
5 *
6 * Based on include/configs/xpress.h:
7 * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
8 */
9#ifndef __PCL063_ULL_H
10#define __PCL063_ULL_H
11
12#include <linux/sizes.h>
Simon Glass1af3c7f2020-05-10 11:40:09 -060013#include <linux/stringify.h>
Parthiban Nallathambid2d11912019-04-10 16:35:32 +020014#include "mx6_common.h"
15
16/* SPL options */
17#include "imx6_spl.h"
18
19#define CONFIG_SYS_FSL_USDHC_NUM 2
20
21/* Size of malloc() pool */
22#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
23
24/* Environment settings */
Parthiban Nallathambid2d11912019-04-10 16:35:32 +020025
26/* Environment in SD */
27#define CONFIG_SYS_MMC_ENV_DEV 0
28#define CONFIG_SYS_MMC_ENV_PART 0
29#define MMC_ROOTFS_DEV 0
30#define MMC_ROOTFS_PART 2
31
32/* Console configs */
33#define CONFIG_MXC_UART_BASE UART1_BASE
34
35/* MMC Configs */
Parthiban Nallathambid2d11912019-04-10 16:35:32 +020036
37#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
38#define CONFIG_SUPPORT_EMMC_BOOT
39
40/* I2C configs */
41#ifdef CONFIG_CMD_I2C
42#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43#define CONFIG_SYS_I2C_SPEED 100000
44#endif
45
46/* Miscellaneous configurable options */
Parthiban Nallathambid2d11912019-04-10 16:35:32 +020047
48#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
49#define CONFIG_SYS_HZ 1000
50
51/* Physical Memory Map */
52#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
53#define PHYS_SDRAM_SIZE SZ_256M
54
55#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
56#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
57#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
58
59#define CONFIG_SYS_INIT_SP_OFFSET \
60 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
61#define CONFIG_SYS_INIT_SP_ADDR \
62 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
63
64/* NAND */
65#define CONFIG_SYS_MAX_NAND_DEVICE 1
66#define CONFIG_SYS_NAND_BASE 0x40000000
67
68/* USB Configs */
69#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
70#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
71#define CONFIG_MXC_USB_FLAGS 0
72#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
73
74#define CONFIG_IMX_THERMAL
75
76#define ENV_MMC \
77 "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
78 "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
79 "fitpart=1\0" \
80 "bootdelay=3\0" \
81 "silent=1\0" \
82 "optargs=rw rootwait\0" \
83 "mmcautodetect=yes\0" \
84 "mmcrootfstype=ext4\0" \
85 "mmcfit_name=fitImage\0" \
86 "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
87 "${mmcfit_name}\0" \
88 "mmcargs=setenv bootargs " \
89 "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
90 "console=${console} rootfstype=${mmcrootfstype}\0" \
91 "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
92
93/* Default environment */
94#define CONFIG_EXTRA_ENV_SETTINGS \
95 "fdt_high=0xffffffff\0" \
96 "console=ttymxc0,115200n8\0" \
97 "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
98 "fit_addr=0x82000000\0" \
99 ENV_MMC
100
101#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
102
103#define BOOT_TARGET_DEVICES(func) \
104 func(MMC, mmc, 0) \
105 func(MMC, mmc, 1) \
106 func(DHCP, dhcp, na)
107
108#include <config_distro_bootcmd.h>
109
110#endif /* __PCL063_ULL_H */