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Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +02001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Albert ARIBAUD37098442016-01-27 08:46:11 +010012#define CONFIG_SYS_CACHELINE_SIZE 32
13
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020014#include <asm/arch/imx-regs.h>
15
16#define CONFIG_VF610
17
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020018#define CONFIG_DISPLAY_CPUINFO
19#define CONFIG_DISPLAY_BOARDINFO
20#define CONFIG_SYS_THUMB_BUILD
21
22#define CONFIG_SKIP_LOWLEVEL_INIT
23
24/* Enable passing of ATAGs */
25#define CONFIG_CMDLINE_TAG
26
27/* Size of malloc() pool */
28#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
29
30#define CONFIG_BOARD_EARLY_INIT_F
31
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020032/* Allow to overwrite serial and ethaddr */
33#define CONFIG_ENV_OVERWRITE
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020034#define CONFIG_BAUDRATE 115200
35
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020036/* NAND support */
37#define CONFIG_CMD_NAND
38#define CONFIG_CMD_NAND_TRIMFFS
39#define CONFIG_SYS_NAND_ONFI_DETECTION
40
41#ifdef CONFIG_CMD_NAND
42#define CONFIG_USE_ARCH_MEMCPY
43#define CONFIG_SYS_MAX_NAND_DEVICE 1
44#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
45
46#define CONFIG_JFFS2_NAND
47
48/* UBI */
49#define CONFIG_CMD_UBI
50#define CONFIG_CMD_UBIFS
51#define CONFIG_RBTREE
52#define CONFIG_LZO
53
54/* Dynamic MTD partition support */
55#define CONFIG_CMD_MTDPARTS
56#define CONFIG_MTD_PARTITIONS
57#define CONFIG_MTD_DEVICE
Albert ARIBAUD (3ADEV)040ef8f2015-10-11 20:06:39 +020058#define MTDIDS_DEFAULT "nand0=NAND"
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020059#define MTDPARTS_DEFAULT "mtdparts=NAND:256k(spare)"\
60 ",384k(bootloader)"\
61 ",128k(env1)"\
62 ",128k(env2)"\
Albert ARIBAUD (3ADEV)040ef8f2015-10-11 20:06:39 +020063 ",128k(dtb)"\
64 ",6144k(kernel)"\
65 ",65536k(ramdisk)"\
66 ",450944k(root)"
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020067#endif
68
69#define CONFIG_MMC
70#define CONFIG_FSL_ESDHC
71#define CONFIG_SYS_FSL_ESDHC_ADDR 0
72#define CONFIG_SYS_FSL_ESDHC_NUM 1
73
74/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
75#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
76#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
77#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
78
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020079#define CONFIG_GENERIC_MMC
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020080#define CONFIG_DOS_PARTITION
81
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020082#define CONFIG_FEC_MXC
83#define CONFIG_MII
84#define IMX_FEC_BASE ENET_BASE_ADDR
85#define CONFIG_FEC_XCV_TYPE RMII
86#define CONFIG_FEC_MXC_PHYADDR 0
87#define CONFIG_PHYLIB
88#define CONFIG_PHY_MICREL
89
90/* QSPI Configs*/
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020091
92#ifdef CONFIG_FSL_QSPI
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020093#define CONFIG_SPI_FLASH
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +020094#define FSL_QSPI_FLASH_SIZE (1 << 24)
95#define FSL_QSPI_FLASH_NUM 2
96#define CONFIG_SYS_FSL_QSPI_LE
97#endif
98
99/* I2C Configs */
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200100#define CONFIG_SYS_I2C
101#define CONFIG_SYS_I2C_MXC_I2C3
102#define CONFIG_SYS_I2C_MXC
103
104/* RTC (actually an RV-4162 but M41T62-compatible) */
105#define CONFIG_CMD_DATE
106#define CONFIG_RTC_M41T62
107#define CONFIG_SYS_I2C_RTC_ADDR 0x68
108#define CONFIG_SYS_RTC_BUS_NUM 2
109
110/* EEPROM (24FC256) */
111#define CONFIG_CMD_EEPROM
112#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
113#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
114#define CONFIG_SYS_I2C_EEPROM_BUS 2
115
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200116
117#define CONFIG_LOADADDR 0x82000000
118
119/* We boot from the gfxRAM area of the OCRAM. */
120#define CONFIG_SYS_TEXT_BASE 0x3f408000
121#define CONFIG_BOARD_SIZE_LIMIT 524288
122
123#define CONFIG_BOOTCOMMAND "run bootcmd_sd"
Albert ARIBAUD (3ADEV)040ef8f2015-10-11 20:06:39 +0200124#define CONFIG_EXTRA_ENV_SETTINGS \
125 "fdt_high=0xffffffff\0" \
126 "initrd_high=0xffffffff\0" \
127 "blimg_file=u-boot.imx\0" \
128 "blsec_addr=0x81000000\0" \
129 "blimg_addr=0x81000400\0" \
130 "kernel_file=zImage\0" \
131 "kernel_addr=0x82000000\0" \
132 "fdt_file=vf610-pcm052.dtb\0" \
133 "fdt_addr=0x81000000\0" \
134 "ram_file=uRamdisk\0" \
135 "ram_addr=0x83000000\0" \
136 "filesys=rootfs.ubifs\0" \
137 "sys_addr=0x81000000\0" \
138 "tftploc=/path/to/tftp/directory/\0" \
139 "nfs_root=/path/to/nfs/root\0" \
140 "tftptimeout=1000\0" \
141 "tftptimeoutcountmax=1000000\0" \
142 "mtdparts=" MTDPARTS_DEFAULT "\0" \
143 "bootargs_base=setenv bootargs rw mem=256M " \
144 "console=ttyLP1,115200n8\0" \
145 "bootargs_sd=setenv bootargs ${bootargs} " \
146 "root=/dev/mmcblk0p2 rootwait\0" \
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200147 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
Albert ARIBAUD (3ADEV)040ef8f2015-10-11 20:06:39 +0200148 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
149 "bootargs_nand=setenv bootargs ${bootargs} " \
150 "ubi.mtd=6 rootfstype=ubifs root=ubi0:rootfs\0" \
151 "bootargs_ram=setenv bootargs ${bootargs} " \
152 "root=/dev/ram rw initrd=${ram_addr}\0" \
153 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
154 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
155 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
156 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
157 "bootz ${kernel_addr} - ${fdt_addr}\0" \
158 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
159 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
160 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
161 "bootz ${kernel_addr} - ${fdt_addr}\0" \
162 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
163 "nand read ${fdt_addr} dtb; " \
164 "nand read ${kernel_addr} kernel; " \
165 "bootz ${kernel_addr} - ${fdt_addr}\0" \
166 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
167 "nand read ${fdt_addr} dtb; " \
168 "nand read ${kernel_addr} kernel; " \
169 "nand read ${ram_addr} ramdisk; " \
170 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
171 "update_bootloader_from_tftp=mtdparts default; " \
172 "nand read ${blsec_addr} bootloader; " \
173 "mw.b ${blimg_addr} 0xff 0x5FC00; " \
174 "if tftp ${blimg_addr} ${tftpdir}${blimg_file}; then " \
175 "nand erase.part bootloader; " \
176 "nand write ${blsec_addr} bootloader ${filesize}; fi\0" \
177 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
178 "${kernel_file}; " \
179 "then mtdparts default; " \
180 "nand erase.part kernel; " \
181 "nand write ${kernel_addr} kernel ${filesize}; " \
182 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
183 "nand erase.part dtb; " \
184 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
185 "update_kernel_from_tftp=if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
186 "then setenv fdtsize ${filesize}; " \
187 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
188 "mtdparts default; " \
189 "nand erase.part dtb; " \
190 "nand write ${fdt_addr} dtb ${fdtsize}; " \
191 "nand erase.part kernel; " \
192 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
193 "update_rootfs_from_tftp=if tftp ${sys_addr} ${tftpdir}${filesys}; " \
194 "then mtdparts default; " \
195 "nand erase.part root; " \
196 "ubi part root; " \
197 "ubi create rootfs; " \
198 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
199 "update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
200 "then mtdparts default; " \
201 "nand erase.part ramdisk; " \
202 "nand write ${ram_addr} ramdisk ${filesize}; fi\0"
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200203
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200204/* Miscellaneous configurable options */
205#define CONFIG_SYS_LONGHELP /* undef to save memory */
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200206#define CONFIG_AUTO_COMPLETE
207#define CONFIG_CMDLINE_EDITING
208#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
209#define CONFIG_SYS_PBSIZE \
210 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
211#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
212#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
213
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200214#define CONFIG_SYS_MEMTEST_START 0x80010000
215#define CONFIG_SYS_MEMTEST_END 0x87C00000
216
217#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
218
219/*
220 * Stack sizes
221 * The stack sizes are set up in start.S using the settings below
222 */
223#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
224
225/* Physical memory map */
226#define CONFIG_NR_DRAM_BANKS 1
227#define PHYS_SDRAM (0x80000000)
228#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
229
230#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
231#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
232#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
233
234#define CONFIG_SYS_INIT_SP_OFFSET \
235 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
236#define CONFIG_SYS_INIT_SP_ADDR \
237 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
238
239/* FLASH and environment organization */
240#define CONFIG_SYS_NO_FLASH
241
242#ifdef CONFIG_ENV_IS_IN_MMC
243#define CONFIG_ENV_SIZE (8 * 1024)
244
245#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
246#define CONFIG_SYS_MMC_ENV_DEV 0
247#endif
248
249#ifdef CONFIG_ENV_IS_IN_NAND
250#define CONFIG_ENV_SECT_SIZE (128 * 1024)
251#define CONFIG_ENV_SIZE (8 * 1024)
Albert ARIBAUD (3ADEV)040ef8f2015-10-11 20:06:39 +0200252#define CONFIG_ENV_OFFSET 0xA0000
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200253#define CONFIG_ENV_SIZE_REDUND (8 * 1024)
Albert ARIBAUD (3ADEV)040ef8f2015-10-11 20:06:39 +0200254#define CONFIG_ENV_OFFSET_REDUND 0xC0000
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200255#endif
256
Albert ARIBAUD \(3ADEV\)931a1d22015-09-21 22:43:39 +0200257#endif