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Andrew Davis854d4892023-04-11 13:24:58 -05001// SPDX-License-Identifier: GPL-2.0-only
Tom Rini57cd6812015-07-31 19:55:12 -04002/*
Andrew Davis854d4892023-04-11 13:24:58 -05003 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
Tom Rini57cd6812015-07-31 19:55:12 -04004 */
Lokesh Vutla7aa1a402016-11-23 13:25:29 +05305#include "dra72-evm-common.dtsi"
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +05306#include "dra72x-mmc-iodelay.dtsi"
Tom Rini57cd6812015-07-31 19:55:12 -04007/ {
8 model = "TI DRA722";
Tom Rini57cd6812015-07-31 19:55:12 -04009
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053010 memory@0 {
Tom Rini57cd6812015-07-31 19:55:12 -040011 device_type = "memory";
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053012 reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
Tom Rini57cd6812015-07-31 19:55:12 -040013 };
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053014
15 evm_1v8_sw: fixedregulator-evm_1v8 {
16 compatible = "regulator-fixed";
17 regulator-name = "evm_1v8";
18 regulator-min-microvolt = <1800000>;
19 regulator-max-microvolt = <1800000>;
20 vin-supply = <&smps4_reg>;
21 regulator-always-on;
22 regulator-boot-on;
23 };
Tom Rini57cd6812015-07-31 19:55:12 -040024};
25
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053026&i2c1 {
27 tps65917: tps65917@58 {
28 reg = <0x58>;
Tom Rini57cd6812015-07-31 19:55:12 -040029
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053030 interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
31 };
Tom Rini57cd6812015-07-31 19:55:12 -040032};
33
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053034#include "dra72-evm-tps65917.dtsi"
Tom Rini57cd6812015-07-31 19:55:12 -040035
36&hdmi {
Tom Rini57cd6812015-07-31 19:55:12 -040037 vdda-supply = <&ldo3_reg>;
Mugunthan V Ne8131382016-09-27 13:01:41 +053038};
Tom Rini57cd6812015-07-31 19:55:12 -040039
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053040&pcf_gpio_21 {
41 interrupt-parent = <&gpio6>;
42 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
43};
44
Mugunthan V Ne8131382016-09-27 13:01:41 +053045&mac {
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053046 slaves = <1>;
47 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
48};
49
50&cpsw_emac0 {
Grygorii Strashko68d875d2019-08-31 10:30:32 +030051 phy-handle = <&ethphy0>;
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053052 phy-mode = "rgmii";
Tom Rini57cd6812015-07-31 19:55:12 -040053};
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053054
Grygorii Strashko68d875d2019-08-31 10:30:32 +030055&davinci_mdio {
56 ethphy0: ethernet-phy@3 {
57 reg = <3>;
58 };
59};
60
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053061&mmc1 {
62 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
63 pinctrl-0 = <&mmc1_pins_default>;
64 pinctrl-1 = <&mmc1_pins_hs>;
65 pinctrl-2 = <&mmc1_pins_sdr12>;
66 pinctrl-3 = <&mmc1_pins_sdr25>;
67 pinctrl-4 = <&mmc1_pins_sdr50>;
68 pinctrl-5 = <&mmc1_pins_ddr50_rev10>;
69 pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev10_conf>;
70 vqmmc-supply = <&ldo1_reg>;
71};
72
73&mmc2 {
74 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
75 pinctrl-0 = <&mmc2_pins_default>;
76 pinctrl-1 = <&mmc2_pins_hs>;
77 pinctrl-2 = <&mmc2_pins_ddr_rev10>;
78 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev10_conf>;
79 vmmc-supply = <&evm_1v8_sw>;
80};