| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ZYNQMP_R5=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x10000000 |
| Tom Rini | a09fea1 | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 4 | CONFIG_ENV_SIZE=0x20000 |
| Tom Rini | d168bcb | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 5 | CONFIG_NR_DRAM_BANKS=1 |
| Michal Simek | dcd8a10 | 2018-06-04 08:33:30 +0200 | [diff] [blame] | 6 | CONFIG_DEBUG_UART_BASE=0xff010000 |
| 7 | CONFIG_DEBUG_UART_CLOCK=100000000 |
| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 8 | CONFIG_DEBUG_UART=y |
| Michal Simek | 56c0e64 | 2018-04-18 14:03:56 +0200 | [diff] [blame] | 9 | CONFIG_BOOTSTAGE=y |
| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 10 | # CONFIG_DISPLAY_CPUINFO is not set |
| 11 | CONFIG_SYS_PROMPT="ZynqMP r5> " |
| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 12 | # CONFIG_CMD_SETEXPR is not set |
| Michal Simek | 56c0e64 | 2018-04-18 14:03:56 +0200 | [diff] [blame] | 13 | CONFIG_CMD_BOOTSTAGE=y |
| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 14 | CONFIG_OF_EMBED=y |
| Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 15 | CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" |
| Tom Rini | 8d8ee47 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 16 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 17 | CONFIG_DEBUG_UART_ZYNQ=y |
| Michal Simek | 1d6c54e | 2018-04-12 17:39:46 +0200 | [diff] [blame] | 18 | CONFIG_ZYNQ_SERIAL=y |
| 19 | CONFIG_TIMER=y |
| 20 | CONFIG_CADENCE_TTC_TIMER=y |