blob: e9efdb98315a75ab8b460de4dec2f2a921f59310 [file] [log] [blame]
Ye Li25baafc2018-06-27 20:23:16 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 */
5
Peng Fanae076052019-08-01 06:02:49 +00006&{/aliases} {
7 u-boot,dm-pre-reloc;
8 display0 = &lcdif;
9};
10
Ye Li25baafc2018-06-27 20:23:16 -070011&qspi {
12 flash0: n25q256a@0 {
Neil Armstrongffd4c7c2019-02-10 10:16:20 +000013 compatible = "jedec,spi-nor";
Ye Li25baafc2018-06-27 20:23:16 -070014 };
Peng Fanae076052019-08-01 06:02:49 +000015};
16
17&{/soc} {
18 u-boot,dm-pre-reloc;
19};
20
21&aips2 {
22 u-boot,dm-pre-reloc;
23};
24
25&iomuxc {
26 u-boot,dm-pre-reloc;
27};
28
29&lcdif {
30 display = <&display0>;
31 u-boot,dm-pre-reloc;
32
33 display0: display@0 {
34 bits-per-pixel = <16>;
35 bus-width = <24>;
36
37 display-timings {
38 native-mode = <&timing0>;
39
40 timing0: timing0 {
41 clock-frequency = <9200000>;
42 hactive = <480>;
43 vactive = <272>;
44 hfront-porch = <8>;
45 hback-porch = <4>;
46 hsync-len = <41>;
47 vback-porch = <2>;
48 vfront-porch = <4>;
49 vsync-len = <10>;
50 hsync-active = <0>;
51 vsync-active = <0>;
52 de-active = <1>;
53 pixelclk-active = <0>;
54 };
55 };
56 };
57};