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wdenkc6097192002-11-03 00:24:07 +00001#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02002# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00003# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02005# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006#
7
8Summary:
9========
10
wdenk24ee89b2002-11-03 17:56:27 +000011This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000012Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
wdenkc6097192002-11-03 00:24:07 +000016
17The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000018the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000020support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000034Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000035"working". In fact, many of them are used in production systems.
36
Robert P. J. Day7207b362015-12-19 07:16:10 -050037In case of problems see the CHANGELOG file to find out who contributed
38the specific port. In addition, there are various MAINTAINERS files
39scattered throughout the U-Boot source identifying the people or
40companies responsible for various boards and subsystems.
wdenkc6097192002-11-03 00:24:07 +000041
Robert P. J. Day7207b362015-12-19 07:16:10 -050042Note: As of August, 2010, there is no longer a CHANGELOG file in the
43actual U-Boot source tree; however, it can be created dynamically
44from the Git log using:
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000045
46 make CHANGELOG
47
wdenkc6097192002-11-03 00:24:07 +000048
49Where to get help:
50==================
51
wdenk24ee89b2002-11-03 17:56:27 +000052In case you have questions about, problems with or contributions for
Robert P. J. Day7207b362015-12-19 07:16:10 -050053U-Boot, you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050054<u-boot@lists.denx.de>. There is also an archive of previous traffic
55on the mailing list - please search the archive before asking FAQ's.
56Please see http://lists.denx.de/pipermail/u-boot and
57http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000058
59
Wolfgang Denk218ca722008-03-26 10:40:12 +010060Where to get source code:
61=========================
62
Robert P. J. Day7207b362015-12-19 07:16:10 -050063The U-Boot source code is maintained in the Git repository at
Wolfgang Denk218ca722008-03-26 10:40:12 +010064git://www.denx.de/git/u-boot.git ; you can browse it online at
65http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
66
67The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020068any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010069available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
70directory.
71
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010072Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010073ftp://ftp.denx.de/pub/u-boot/images/
74
75
wdenkc6097192002-11-03 00:24:07 +000076Where we come from:
77===================
78
79- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000080- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000081- clean up code
82- make it easier to add custom boards
83- make it possible to add other [PowerPC] CPUs
84- extend functions, especially:
85 * Provide extended interface to Linux boot loader
86 * S-Record download
87 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020088 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000089- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000090- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000091- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020092- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000093
94
95Names and Spelling:
96===================
97
98The "official" name of this project is "Das U-Boot". The spelling
99"U-Boot" shall be used in all written text (documentation, comments
100in source files etc.). Example:
101
102 This is the README file for the U-Boot project.
103
104File names etc. shall be based on the string "u-boot". Examples:
105
106 include/asm-ppc/u-boot.h
107
108 #include <asm/u-boot.h>
109
110Variable names, preprocessor constants etc. shall be either based on
111the string "u_boot" or on "U_BOOT". Example:
112
113 U_BOOT_VERSION u_boot_logo
114 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000115
116
wdenk93f19cc2002-12-17 17:55:09 +0000117Versioning:
118===========
119
Thomas Weber360d8832010-09-28 08:06:25 +0200120Starting with the release in October 2008, the names of the releases
121were changed from numerical release numbers without deeper meaning
122into a time stamp based numbering. Regular releases are identified by
123names consisting of the calendar year and month of the release date.
124Additional fields (if present) indicate release candidates or bug fix
125releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000126
Thomas Weber360d8832010-09-28 08:06:25 +0200127Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000128 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200129 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
Jelle van der Waa0de21ec2016-10-30 17:30:30 +0100130 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000131
132
wdenkc6097192002-11-03 00:24:07 +0000133Directory Hierarchy:
134====================
135
Peter Tyser8d321b82010-04-12 22:28:21 -0500136/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900137 /arc Files generic to ARC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500138 /arm Files generic to ARM architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /avr32 Files generic to AVR32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500140 /m68k Files generic to m68k architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500141 /microblaze Files generic to microblaze architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500142 /mips Files generic to MIPS architecture
Macpaul Linafc1ce82011-10-19 20:41:11 +0000143 /nds32 Files generic to NDS32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500144 /nios2 Files generic to Altera NIOS2 architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400145 /openrisc Files generic to OpenRISC architecture
Stefan Roesea47a12b2010-04-15 16:07:28 +0200146 /powerpc Files generic to PowerPC architecture
Robert P. J. Day7207b362015-12-19 07:16:10 -0500147 /sandbox Files generic to HW-independent "sandbox"
Peter Tyser8d321b82010-04-12 22:28:21 -0500148 /sh Files generic to SH architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400149 /x86 Files generic to x86 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500150/api Machine/arch independent API for external apps
151/board Board dependent files
Xu Ziyuan740f7e52016-08-26 19:54:49 +0800152/cmd U-Boot commands functions
Peter Tyser8d321b82010-04-12 22:28:21 -0500153/common Misc architecture independent functions
Robert P. J. Day7207b362015-12-19 07:16:10 -0500154/configs Board default configuration files
Peter Tyser8d321b82010-04-12 22:28:21 -0500155/disk Code for disk drive partition handling
156/doc Documentation (don't expect too much)
157/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400158/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500159/examples Example code for standalone applications, etc.
160/fs Filesystem code (cramfs, ext2, jffs2, etc.)
161/include Header Files
Robert P. J. Day7207b362015-12-19 07:16:10 -0500162/lib Library routines generic to all architectures
163/Licenses Various license files
Peter Tyser8d321b82010-04-12 22:28:21 -0500164/net Networking code
165/post Power On Self Test
Robert P. J. Day7207b362015-12-19 07:16:10 -0500166/scripts Various build scripts and Makefiles
167/test Various unit test files
Peter Tyser8d321b82010-04-12 22:28:21 -0500168/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000169
wdenkc6097192002-11-03 00:24:07 +0000170Software Configuration:
171=======================
172
173Configuration is usually done using C preprocessor defines; the
174rationale behind that is to avoid dead code whenever possible.
175
176There are two classes of configuration variables:
177
178* Configuration _OPTIONS_:
179 These are selectable by the user and have names beginning with
180 "CONFIG_".
181
182* Configuration _SETTINGS_:
183 These depend on the hardware etc. and should not be meddled with if
184 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000186
Robert P. J. Day7207b362015-12-19 07:16:10 -0500187Previously, all configuration was done by hand, which involved creating
188symbolic links and editing configuration files manually. More recently,
189U-Boot has added the Kbuild infrastructure used by the Linux kernel,
190allowing you to use the "make menuconfig" command to configure your
191build.
wdenkc6097192002-11-03 00:24:07 +0000192
193
194Selection of Processor Architecture and Board Type:
195---------------------------------------------------
196
197For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200198configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000199
200Example: For a TQM823L module type:
201
202 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200203 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000204
Robert P. J. Day7207b362015-12-19 07:16:10 -0500205Note: If you're looking for the default configuration file for a board
206you're sure used to be there but is now missing, check the file
207doc/README.scrapyard for a list of no longer supported boards.
wdenkc6097192002-11-03 00:24:07 +0000208
Simon Glass75b3c3a2014-03-22 17:12:59 -0600209Sandbox Environment:
210--------------------
211
212U-Boot can be built natively to run on a Linux host using the 'sandbox'
213board. This allows feature development which is not board- or architecture-
214specific to be undertaken on a native platform. The sandbox is also used to
215run some of U-Boot's tests.
216
Jagannadha Sutradharudu Teki6b1978f2014-08-31 21:19:43 +0530217See board/sandbox/README.sandbox for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600218
219
Simon Glassdb910352015-03-03 08:03:00 -0700220Board Initialisation Flow:
221--------------------------
222
223This is the intended start-up flow for boards. This should apply for both
Robert P. J. Day7207b362015-12-19 07:16:10 -0500224SPL and U-Boot proper (i.e. they both follow the same rules).
Simon Glassdb910352015-03-03 08:03:00 -0700225
Robert P. J. Day7207b362015-12-19 07:16:10 -0500226Note: "SPL" stands for "Secondary Program Loader," which is explained in
227more detail later in this file.
228
229At present, SPL mostly uses a separate code path, but the function names
230and roles of each function are the same. Some boards or architectures
231may not conform to this. At least most ARM boards which use
232CONFIG_SPL_FRAMEWORK conform to this.
233
234Execution typically starts with an architecture-specific (and possibly
235CPU-specific) start.S file, such as:
236
237 - arch/arm/cpu/armv7/start.S
238 - arch/powerpc/cpu/mpc83xx/start.S
239 - arch/mips/cpu/start.S
240
241and so on. From there, three functions are called; the purpose and
242limitations of each of these functions are described below.
Simon Glassdb910352015-03-03 08:03:00 -0700243
244lowlevel_init():
245 - purpose: essential init to permit execution to reach board_init_f()
246 - no global_data or BSS
247 - there is no stack (ARMv7 may have one but it will soon be removed)
248 - must not set up SDRAM or use console
249 - must only do the bare minimum to allow execution to continue to
250 board_init_f()
251 - this is almost never needed
252 - return normally from this function
253
254board_init_f():
255 - purpose: set up the machine ready for running board_init_r():
256 i.e. SDRAM and serial UART
257 - global_data is available
258 - stack is in SRAM
259 - BSS is not available, so you cannot use global/static variables,
260 only stack variables and global_data
261
262 Non-SPL-specific notes:
263 - dram_init() is called to set up DRAM. If already done in SPL this
264 can do nothing
265
266 SPL-specific notes:
267 - you can override the entire board_init_f() function with your own
268 version as needed.
269 - preloader_console_init() can be called here in extremis
270 - should set up SDRAM, and anything needed to make the UART work
271 - these is no need to clear BSS, it will be done by crt0.S
272 - must return normally from this function (don't call board_init_r()
273 directly)
274
275Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
276this point the stack and global_data are relocated to below
277CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
278memory.
279
280board_init_r():
281 - purpose: main execution, common code
282 - global_data is available
283 - SDRAM is available
284 - BSS is available, all static/global variables can be used
285 - execution eventually continues to main_loop()
286
287 Non-SPL-specific notes:
288 - U-Boot is relocated to the top of memory and is now running from
289 there.
290
291 SPL-specific notes:
292 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
293 CONFIG_SPL_STACK_R_ADDR points into SDRAM
294 - preloader_console_init() can be called here - typically this is
295 done by defining CONFIG_SPL_BOARD_INIT and then supplying a
296 spl_board_init() function containing this call
297 - loads U-Boot or (in falcon mode) Linux
298
299
300
wdenkc6097192002-11-03 00:24:07 +0000301Configuration Options:
302----------------------
303
304Configuration depends on the combination of board and CPU type; all
305such information is kept in a configuration file
306"include/configs/<board_name>.h".
307
308Example: For a TQM823L module, all configuration settings are in
309"include/configs/TQM823L.h".
310
311
wdenk7f6c2cb2002-11-10 22:06:23 +0000312Many of the options are named exactly as the corresponding Linux
313kernel configuration options. The intention is to make it easier to
314build a config tool - later.
315
316
wdenkc6097192002-11-03 00:24:07 +0000317The following options need to be configured:
318
Kim Phillips26281142007-08-10 13:28:25 -0500319- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000320
Kim Phillips26281142007-08-10 13:28:25 -0500321- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200322
323- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Haavard Skinnemoen09ea0de2007-11-01 12:44:20 +0100324 Define exactly one, e.g. CONFIG_ATSTK1002
wdenkc6097192002-11-03 00:24:07 +0000325
Lei Wencf946c62011-02-09 18:06:58 +0530326- Marvell Family Member
327 CONFIG_SYS_MVFS - define it if you want to enable
328 multiple fs option at one time
329 for marvell soc family
330
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200331- 8xx CPU Options: (if using an MPC8xx CPU)
wdenk66ca92a2004-09-28 17:59:53 +0000332 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
333 get_gclk_freq() cannot work
wdenk5da627a2003-10-09 20:09:04 +0000334 e.g. if there is no 32KHz
335 reference PIT/RTC clock
wdenk66ca92a2004-09-28 17:59:53 +0000336 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
337 or XTAL/EXTAL)
wdenkc6097192002-11-03 00:24:07 +0000338
wdenk66ca92a2004-09-28 17:59:53 +0000339- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200340 CONFIG_SYS_8xx_CPUCLK_MIN
341 CONFIG_SYS_8xx_CPUCLK_MAX
wdenk66ca92a2004-09-28 17:59:53 +0000342 CONFIG_8xx_CPUCLK_DEFAULT
wdenk75d1ea72004-01-31 20:06:54 +0000343 See doc/README.MPC866
344
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200345 CONFIG_SYS_MEASURE_CPUCLK
wdenk75d1ea72004-01-31 20:06:54 +0000346
wdenkba56f622004-02-06 23:19:44 +0000347 Define this to measure the actual CPU clock instead
348 of relying on the correctness of the configured
349 values. Mostly useful for board bringup to make sure
350 the PLL is locked at the intended frequency. Note
351 that this requires a (stable) reference clock (32 kHz
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200352 RTC clock or CONFIG_SYS_8XX_XIN)
wdenk75d1ea72004-01-31 20:06:54 +0000353
Heiko Schocher506f3912009-03-12 07:37:15 +0100354 CONFIG_SYS_DELAYED_ICACHE
355
356 Define this option if you want to enable the
357 ICache only when Code runs from RAM.
358
Kumar Gala66412c62011-02-18 05:40:54 -0600359- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000360 CONFIG_SYS_PPC64
361
362 Specifies that the core is a 64-bit PowerPC implementation (implements
363 the "64" category of the Power ISA). This is necessary for ePAPR
364 compliance, among other possible reasons.
365
Kumar Gala66412c62011-02-18 05:40:54 -0600366 CONFIG_SYS_FSL_TBCLK_DIV
367
368 Defines the core time base clock divider ratio compared to the
369 system clock. On most PQ3 devices this is 8, on newer QorIQ
370 devices it can be 16 or 32. The ratio varies from SoC to Soc.
371
Kumar Gala8f290842011-05-20 00:39:21 -0500372 CONFIG_SYS_FSL_PCIE_COMPAT
373
374 Defines the string to utilize when trying to match PCIe device
375 tree nodes for the given platform.
376
Scott Wood33eee332012-08-14 10:14:53 +0000377 CONFIG_SYS_FSL_ERRATUM_A004510
378
379 Enables a workaround for erratum A004510. If set,
380 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
381 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
382
383 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
384 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
385
386 Defines one or two SoC revisions (low 8 bits of SVR)
387 for which the A004510 workaround should be applied.
388
389 The rest of SVR is either not relevant to the decision
390 of whether the erratum is present (e.g. p2040 versus
391 p2041) or is implied by the build target, which controls
392 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
393
394 See Freescale App Note 4493 for more information about
395 this erratum.
396
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530397 CONFIG_A003399_NOR_WORKAROUND
398 Enables a workaround for IFC erratum A003399. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800399 required during NOR boot.
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530400
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530401 CONFIG_A008044_WORKAROUND
402 Enables a workaround for T1040/T1042 erratum A008044. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800403 required during NAND boot and valid for Rev 1.0 SoC revision
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530404
Scott Wood33eee332012-08-14 10:14:53 +0000405 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
406
407 This is the value to write into CCSR offset 0x18600
408 according to the A004510 workaround.
409
Priyanka Jain64501c62013-07-02 09:21:04 +0530410 CONFIG_SYS_FSL_DSP_DDR_ADDR
411 This value denotes start offset of DDR memory which is
412 connected exclusively to the DSP cores.
413
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530414 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
415 This value denotes start offset of M2 memory
416 which is directly connected to the DSP core.
417
Priyanka Jain64501c62013-07-02 09:21:04 +0530418 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
419 This value denotes start offset of M3 memory which is directly
420 connected to the DSP core.
421
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530422 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
423 This value denotes start offset of DSP CCSR space.
424
Priyanka Jainb1359912013-12-17 14:25:52 +0530425 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
426 Single Source Clock is clocking mode present in some of FSL SoC's.
427 In this mode, a single differential clock is used to supply
428 clocks to the sysclock, ddrclock and usbclock.
429
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530430 CONFIG_SYS_CPC_REINIT_F
431 This CONFIG is defined when the CPC is configured as SRAM at the
Bin Menga1875592016-02-05 19:30:11 -0800432 time of U-Boot entry and is required to be re-initialized.
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530433
Tang Yuantianaade2002014-04-17 15:33:46 +0800434 CONFIG_DEEP_SLEEP
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800435 Indicates this SoC supports deep sleep feature. If deep sleep is
Tang Yuantianaade2002014-04-17 15:33:46 +0800436 supported, core will start to execute uboot when wakes up.
437
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000438- Generic CPU options:
York Sun2a1680e2014-05-02 17:28:04 -0700439 CONFIG_SYS_GENERIC_GLOBAL_DATA
440 Defines global data is initialized in generic board board_init_f().
441 If this macro is defined, global data is created and cleared in
442 generic board board_init_f(). Without this macro, architecture/board
443 should initialize global data before calling board_init_f().
444
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000445 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
446
447 Defines the endianess of the CPU. Implementation of those
448 values is arch specific.
449
York Sun5614e712013-09-30 09:22:09 -0700450 CONFIG_SYS_FSL_DDR
451 Freescale DDR driver in use. This type of DDR controller is
452 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
453 SoCs.
454
455 CONFIG_SYS_FSL_DDR_ADDR
456 Freescale DDR memory-mapped register base.
457
458 CONFIG_SYS_FSL_DDR_EMU
459 Specify emulator support for DDR. Some DDR features such as
460 deskew training are not available.
461
462 CONFIG_SYS_FSL_DDRC_GEN1
463 Freescale DDR1 controller.
464
465 CONFIG_SYS_FSL_DDRC_GEN2
466 Freescale DDR2 controller.
467
468 CONFIG_SYS_FSL_DDRC_GEN3
469 Freescale DDR3 controller.
470
York Sun34e026f2014-03-27 17:54:47 -0700471 CONFIG_SYS_FSL_DDRC_GEN4
472 Freescale DDR4 controller.
473
York Sun9ac4ffb2013-09-30 14:20:51 -0700474 CONFIG_SYS_FSL_DDRC_ARM_GEN3
475 Freescale DDR3 controller for ARM-based SoCs.
476
York Sun5614e712013-09-30 09:22:09 -0700477 CONFIG_SYS_FSL_DDR1
478 Board config to use DDR1. It can be enabled for SoCs with
479 Freescale DDR1 or DDR2 controllers, depending on the board
480 implemetation.
481
482 CONFIG_SYS_FSL_DDR2
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -0400483 Board config to use DDR2. It can be enabled for SoCs with
York Sun5614e712013-09-30 09:22:09 -0700484 Freescale DDR2 or DDR3 controllers, depending on the board
485 implementation.
486
487 CONFIG_SYS_FSL_DDR3
488 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700489 Freescale DDR3 or DDR3L controllers.
490
491 CONFIG_SYS_FSL_DDR3L
492 Board config to use DDR3L. It can be enabled for SoCs with
493 DDR3L controllers.
494
495 CONFIG_SYS_FSL_DDR4
496 Board config to use DDR4. It can be enabled for SoCs with
497 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700498
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530499 CONFIG_SYS_FSL_IFC_BE
500 Defines the IFC controller register space as Big Endian
501
502 CONFIG_SYS_FSL_IFC_LE
503 Defines the IFC controller register space as Little Endian
504
Prabhakar Kushwaha1c407072017-02-02 15:01:26 +0530505 CONFIG_SYS_FSL_IFC_CLK_DIV
506 Defines divider of platform clock(clock input to IFC controller).
507
Prabhakar Kushwahaadd63f92017-02-02 15:02:00 +0530508 CONFIG_SYS_FSL_LBC_CLK_DIV
509 Defines divider of platform clock(clock input to eLBC controller).
510
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530511 CONFIG_SYS_FSL_PBL_PBI
512 It enables addition of RCW (Power on reset configuration) in built image.
513 Please refer doc/README.pblimage for more details
514
515 CONFIG_SYS_FSL_PBL_RCW
516 It adds PBI(pre-boot instructions) commands in u-boot build image.
517 PBI commands can be used to configure SoC before it starts the execution.
518 Please refer doc/README.pblimage for more details
519
Prabhakar Kushwaha89ad7be2014-04-08 19:13:34 +0530520 CONFIG_SPL_FSL_PBL
521 It adds a target to create boot binary having SPL binary in PBI format
522 concatenated with u-boot binary.
523
York Sun4e5b1bd2014-02-10 13:59:42 -0800524 CONFIG_SYS_FSL_DDR_BE
525 Defines the DDR controller register space as Big Endian
526
527 CONFIG_SYS_FSL_DDR_LE
528 Defines the DDR controller register space as Little Endian
529
York Sun6b9e3092014-02-10 13:59:43 -0800530 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
531 Physical address from the view of DDR controllers. It is the
532 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
533 it could be different for ARM SoCs.
534
York Sun6b1e1252014-02-10 13:59:44 -0800535 CONFIG_SYS_FSL_DDR_INTLV_256B
536 DDR controller interleaving on 256-byte. This is a special
537 interleaving mode, handled by Dickens for Freescale layerscape
538 SoCs with ARM core.
539
York Sun1d71efb2014-08-01 15:51:00 -0700540 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
541 Number of controllers used as main memory.
542
543 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
544 Number of controllers used for other than main memory.
545
Prabhakar Kushwaha44937212015-11-09 16:42:07 +0530546 CONFIG_SYS_FSL_HAS_DP_DDR
547 Defines the SoC has DP-DDR used for DPAA.
548
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530549 CONFIG_SYS_FSL_SEC_BE
550 Defines the SEC controller register space as Big Endian
551
552 CONFIG_SYS_FSL_SEC_LE
553 Defines the SEC controller register space as Little Endian
554
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200555- MIPS CPU options:
556 CONFIG_SYS_INIT_SP_OFFSET
557
558 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
559 pointer. This is needed for the temporary stack before
560 relocation.
561
562 CONFIG_SYS_MIPS_CACHE_MODE
563
564 Cache operation mode for the MIPS CPU.
565 See also arch/mips/include/asm/mipsregs.h.
566 Possible values are:
567 CONF_CM_CACHABLE_NO_WA
568 CONF_CM_CACHABLE_WA
569 CONF_CM_UNCACHED
570 CONF_CM_CACHABLE_NONCOHERENT
571 CONF_CM_CACHABLE_CE
572 CONF_CM_CACHABLE_COW
573 CONF_CM_CACHABLE_CUW
574 CONF_CM_CACHABLE_ACCELERATED
575
576 CONFIG_SYS_XWAY_EBU_BOOTCFG
577
578 Special option for Lantiq XWAY SoCs for booting from NOR flash.
579 See also arch/mips/cpu/mips32/start.S.
580
581 CONFIG_XWAY_SWAP_BYTES
582
583 Enable compilation of tools/xway-swap-bytes needed for Lantiq
584 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
585 be swapped if a flash programmer is used.
586
Christian Rieschb67d8812012-02-02 00:44:39 +0000587- ARM options:
588 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
589
590 Select high exception vectors of the ARM core, e.g., do not
591 clear the V bit of the c1 register of CP15.
592
York Sun207774b2015-03-20 19:28:08 -0700593 COUNTER_FREQUENCY
594 Generic timer clock source frequency.
595
596 COUNTER_FREQUENCY_REAL
597 Generic timer clock source frequency if the real clock is
598 different from COUNTER_FREQUENCY, and can only be determined
599 at run time.
600
Stephen Warren73c38932015-01-19 16:25:52 -0700601- Tegra SoC options:
602 CONFIG_TEGRA_SUPPORT_NON_SECURE
603
604 Support executing U-Boot in non-secure (NS) mode. Certain
605 impossible actions will be skipped if the CPU is in NS mode,
606 such as ARM architectural timer initialization.
607
wdenk5da627a2003-10-09 20:09:04 +0000608- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000609 CONFIG_CLOCKS_IN_MHZ
610
611 U-Boot stores all clock information in Hz
612 internally. For binary compatibility with older Linux
613 kernels (which expect the clocks passed in the
614 bd_info data to be in MHz) the environment variable
615 "clocks_in_mhz" can be defined so that U-Boot
616 converts clock data to MHZ before passing it to the
617 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000618 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100619 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000620 default environment.
621
wdenk5da627a2003-10-09 20:09:04 +0000622 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
623
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800624 When transferring memsize parameter to Linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000625 expect it to be in bytes, others in MB.
626 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
627
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400628 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200629
630 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400631 passed using flattened device trees (based on open firmware
632 concepts).
633
634 CONFIG_OF_LIBFDT
635 * New libfdt-based support
636 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500637 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400638
Marcel Ziswilerb55ae402009-09-09 21:18:41 +0200639 OF_CPU - The proper name of the cpus node (only required for
640 MPC512X and MPC5xxx based boards).
641 OF_SOC - The proper name of the soc node (only required for
642 MPC512X and MPC5xxx based boards).
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200643 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600644 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200645
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200646 boards with QUICC Engines require OF_QE to set UCC MAC
647 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500648
Kumar Gala4e253132006-01-11 13:54:17 -0600649 CONFIG_OF_BOARD_SETUP
650
651 Board code has addition modification that it wants to make
652 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000653
Simon Glassc654b512014-10-23 18:58:54 -0600654 CONFIG_OF_SYSTEM_SETUP
655
656 Other code has addition modification that it wants to make
657 to the flat device tree before handing it off to the kernel.
658 This causes ft_system_setup() to be called before booting
659 the kernel.
660
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200661 CONFIG_OF_IDE_FIXUP
662
663 U-Boot can detect if an IDE device is present or not.
664 If not, and this new config option is activated, U-Boot
665 removes the ATA node from the DTS before booting Linux,
666 so the Linux IDE driver does not probe the device and
667 crash. This is needed for buggy hardware (uc101) where
668 no pull down resistor is connected to the signal IDE5V_DD7.
669
Igor Grinberg7eb29392011-07-14 05:45:07 +0000670 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
671
672 This setting is mandatory for all boards that have only one
673 machine type and must be used to specify the machine type
674 number as it appears in the ARM machine registry
675 (see http://www.arm.linux.org.uk/developer/machines/).
676 Only boards that have multiple machine types supported
677 in a single configuration file and the machine type is
678 runtime discoverable, do not have to use this setting.
679
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100680- vxWorks boot parameters:
681
682 bootvx constructs a valid bootline using the following
Bin Meng9e98b7e2015-10-07 20:19:17 -0700683 environments variables: bootdev, bootfile, ipaddr, netmask,
684 serverip, gatewayip, hostname, othbootargs.
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100685 It loads the vxWorks image pointed bootfile.
686
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100687 Note: If a "bootargs" environment is defined, it will overwride
688 the defaults discussed just above.
689
Aneesh V2c451f72011-06-16 23:30:47 +0000690- Cache Configuration:
691 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
692 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
693 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
694
Aneesh V93bc2192011-06-16 23:30:51 +0000695- Cache Configuration for ARM:
696 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
697 controller
698 CONFIG_SYS_PL310_BASE - Physical base address of PL310
699 controller register space
700
wdenk6705d812004-08-02 23:22:59 +0000701- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200702 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000703
704 Define this if you want support for Amba PrimeCell PL010 UARTs.
705
Andreas Engel48d01922008-09-08 14:30:53 +0200706 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000707
708 Define this if you want support for Amba PrimeCell PL011 UARTs.
709
710 CONFIG_PL011_CLOCK
711
712 If you have Amba PrimeCell PL011 UARTs, set this variable to
713 the clock speed of the UARTs.
714
715 CONFIG_PL01x_PORTS
716
717 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
718 define this to a list of base addresses for each (supported)
719 port. See e.g. include/configs/versatile.h
720
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400721 CONFIG_SERIAL_HW_FLOW_CONTROL
722
723 Define this variable to enable hw flow control in serial driver.
724 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000725
wdenkc6097192002-11-03 00:24:07 +0000726- Console Interface:
wdenk43d96162003-03-06 00:02:04 +0000727 Depending on board, define exactly one serial port
728 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
729 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
730 console by defining CONFIG_8xx_CONS_NONE
wdenkc6097192002-11-03 00:24:07 +0000731
732 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
733 port routines must be defined elsewhere
734 (i.e. serial_init(), serial_getc(), ...)
735
wdenkc6097192002-11-03 00:24:07 +0000736- Console Baudrate:
737 CONFIG_BAUDRATE - in bps
738 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200739 CONFIG_SYS_BAUDRATE_TABLE, see below.
740 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
wdenkc6097192002-11-03 00:24:07 +0000741
Heiko Schocherc92fac92009-01-30 12:55:38 +0100742- Console Rx buffer length
743 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
744 the maximum receive buffer length for the SMC.
Heiko Schocher2b3f12c2009-02-10 09:31:47 +0100745 This option is actual only for 82xx and 8xx possible.
Heiko Schocherc92fac92009-01-30 12:55:38 +0100746 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
747 must be defined, to setup the maximum idle timeout for
748 the SMC.
749
wdenkc6097192002-11-03 00:24:07 +0000750- Autoboot Command:
751 CONFIG_BOOTCOMMAND
752 Only needed when CONFIG_BOOTDELAY is enabled;
753 define a command string that is automatically executed
754 when no character is read on the console interface
755 within "Boot Delay" after reset.
756
757 CONFIG_BOOTARGS
wdenk43d96162003-03-06 00:02:04 +0000758 This can be used to pass arguments to the bootm
759 command. The value of CONFIG_BOOTARGS goes into the
760 environment value "bootargs".
wdenkc6097192002-11-03 00:24:07 +0000761
762 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000763 The value of these goes into the environment as
764 "ramboot" and "nfsboot" respectively, and can be used
765 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200766 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000767
Heiko Schochereda0ba32013-11-04 14:04:59 +0100768- Bootcount:
769 CONFIG_BOOTCOUNT_LIMIT
770 Implements a mechanism for detecting a repeating reboot
771 cycle, see:
772 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
773
774 CONFIG_BOOTCOUNT_ENV
775 If no softreset save registers are found on the hardware
776 "bootcount" is stored in the environment. To prevent a
777 saveenv on all reboots, the environment variable
778 "upgrade_available" is used. If "upgrade_available" is
779 0, "bootcount" is always 0, if "upgrade_available" is
780 1 "bootcount" is incremented in the environment.
781 So the Userspace Applikation must set the "upgrade_available"
782 and "bootcount" variable to 0, if a boot was successfully.
783
wdenkc6097192002-11-03 00:24:07 +0000784- Pre-Boot Commands:
785 CONFIG_PREBOOT
786
787 When this option is #defined, the existence of the
788 environment variable "preboot" will be checked
789 immediately before starting the CONFIG_BOOTDELAY
790 countdown and/or running the auto-boot command resp.
791 entering interactive mode.
792
793 This feature is especially useful when "preboot" is
794 automatically generated or modified. For an example
795 see the LWMON board specific code: here "preboot" is
796 modified when the user holds down a certain
797 combination of keys on the (special) keyboard when
798 booting the systems
799
800- Serial Download Echo Mode:
801 CONFIG_LOADS_ECHO
802 If defined to 1, all characters received during a
803 serial download (using the "loads" command) are
804 echoed back. This might be needed by some terminal
805 emulations (like "cu"), but may as well just take
806 time on others. This setting #define's the initial
807 value of the "loads_echo" environment variable.
808
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500809- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000810 CONFIG_KGDB_BAUDRATE
811 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200812 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000813
814- Monitor Functions:
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500815 Monitor commands can be included or excluded
816 from the build by using the #include files
Stephen Warrenc6c621b2012-08-05 16:07:19 +0000817 <config_cmd_all.h> and #undef'ing unwanted
Joe Hershbergeref0f2f52015-06-22 16:15:30 -0500818 commands, or adding #define's for wanted commands.
wdenkc6097192002-11-03 00:24:07 +0000819
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500820 The default command configuration includes all commands
821 except those marked below with a "*".
wdenkc6097192002-11-03 00:24:07 +0000822
Marek Vasutb401b732014-03-05 19:58:39 +0100823 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500824 CONFIG_CMD_ASKENV * ask for env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500825 CONFIG_CMD_BDI bdinfo
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500826 CONFIG_CMD_BOOTD bootd
Tom Rinid2b2ffe2014-08-14 06:42:36 -0400827 CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500828 CONFIG_CMD_CACHE * icache, dcache
829 CONFIG_CMD_CONSOLE coninfo
Mike Frysinger710b9932010-12-21 14:19:51 -0500830 CONFIG_CMD_CRC32 * crc32
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500831 CONFIG_CMD_DHCP * DHCP support
832 CONFIG_CMD_DIAG * Diagnostics
Peter Tysera7c93102008-12-17 16:36:22 -0600833 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
834 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
835 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
836 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500837 CONFIG_CMD_DTT * Digital Therm and Thermostat
838 CONFIG_CMD_ECHO echo arguments
Peter Tyser246c6922009-10-25 15:12:56 -0500839 CONFIG_CMD_EDITENV edit env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500840 CONFIG_CMD_EEPROM * EEPROM read/write support
Nikita Kiryanovaa9e6042016-04-16 17:55:03 +0300841 CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500842 CONFIG_CMD_ELF * bootelf, bootvx
Joe Hershberger5e2b3e02012-12-11 22:16:25 -0600843 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
Joe Hershbergerfffad712012-12-11 22:16:33 -0600844 CONFIG_CMD_ENV_FLAGS * display details about env flags
Andrew Ruder88733e22013-10-22 19:07:34 -0500845 CONFIG_CMD_ENV_EXISTS * check existence of env variable
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500846 CONFIG_CMD_EXPORTENV * export the environment
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000847 CONFIG_CMD_EXT2 * ext2 command support
848 CONFIG_CMD_EXT4 * ext4 command support
Stephen Warren16f4d932014-01-24 20:46:37 -0700849 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
850 that work for multiple fs types
Christian Gmeiner59e890e2014-11-12 14:35:04 +0100851 CONFIG_CMD_FS_UUID * Look up a filesystem UUID
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500852 CONFIG_CMD_SAVEENV saveenv
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500853 CONFIG_CMD_FDC * Floppy Disk Support
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000854 CONFIG_CMD_FAT * FAT command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500855 CONFIG_CMD_FLASH flinfo, erase, protect
856 CONFIG_CMD_FPGA FPGA device initialization support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200857 CONFIG_CMD_FUSE * Device fuse support
Anton Staaf53fdc7e2012-12-05 14:46:29 +0000858 CONFIG_CMD_GETTIME * Get time since boot
Mike Frysingera641b972010-12-26 23:32:22 -0500859 CONFIG_CMD_GO * the 'go' command (exec code)
Kim Phillipsa000b792011-04-05 07:15:14 +0000860 CONFIG_CMD_GREPENV * search environment
Simon Glassbf36c5d2012-12-05 14:46:38 +0000861 CONFIG_CMD_HASH * calculate hash / digest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500862 CONFIG_CMD_I2C * I2C serial bus support
863 CONFIG_CMD_IDE * IDE harddisk support
864 CONFIG_CMD_IMI iminfo
Vipin Kumar8fdf1e02012-12-16 22:32:48 +0000865 CONFIG_CMD_IMLS List all images found in NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200866 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500867 CONFIG_CMD_IMMAP * IMMR dump support
Simon Glassaa532332014-06-11 23:29:41 -0600868 CONFIG_CMD_IOTRACE * I/O tracing for debugging
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500869 CONFIG_CMD_IMPORTENV * import an environment
Joe Hershbergerc167cc02012-10-03 11:15:51 +0000870 CONFIG_CMD_INI * import data from an ini file into the env
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500871 CONFIG_CMD_IRQ * irqinfo
872 CONFIG_CMD_ITEST Integer/string test of 2 values
873 CONFIG_CMD_JFFS2 * JFFS2 Support
874 CONFIG_CMD_KGDB * kgdb
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200875 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
Joe Hershbergerd22c3382012-05-23 08:00:12 +0000876 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
877 (169.254.*.*)
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500878 CONFIG_CMD_LOADB loadb
879 CONFIG_CMD_LOADS loads
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200880 CONFIG_CMD_MD5SUM * print md5 message digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400881 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
Simon Glass15a33e42012-11-30 13:01:20 +0000882 CONFIG_CMD_MEMINFO * Display detailed memory information
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500883 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
Wolfgang Denka2681702013-03-08 10:51:32 +0000884 loop, loopw
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200885 CONFIG_CMD_MEMTEST * mtest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500886 CONFIG_CMD_MISC Misc functions like sleep etc
887 CONFIG_CMD_MMC * MMC memory mapped support
888 CONFIG_CMD_MII * MII utility commands
Stefan Roese68d7d652009-03-19 13:30:36 +0100889 CONFIG_CMD_MTDPARTS * MTD partition support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500890 CONFIG_CMD_NAND * NAND support
891 CONFIG_CMD_NET bootp, tftpboot, rarpboot
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200892 CONFIG_CMD_NFS NFS support
Peter Tysere92739d2008-12-17 16:36:21 -0600893 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000894 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500895 CONFIG_CMD_PCI * pciinfo
896 CONFIG_CMD_PCMCIA * PCMCIA support
897 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
898 host
899 CONFIG_CMD_PORTIO * Port I/O
Kenneth Watersff048ea2012-12-05 14:46:30 +0000900 CONFIG_CMD_READ * Read raw data from partition
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500901 CONFIG_CMD_REGINFO * Register dump
902 CONFIG_CMD_RUN run command in env variable
Simon Glassd3049312012-12-26 09:53:36 +0000903 CONFIG_CMD_SANDBOX * sb command to access sandbox features
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500904 CONFIG_CMD_SAVES * save S record dump
Simon Glassc649e3c2016-05-01 11:36:02 -0600905 CONFIG_SCSI * SCSI Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500906 CONFIG_CMD_SDRAM * print SDRAM configuration information
907 (requires CONFIG_CMD_I2C)
908 CONFIG_CMD_SETGETDCR Support for DCR Register access
909 (4xx only)
Eric Nelsonf61ec452012-01-31 10:52:08 -0700910 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200911 CONFIG_CMD_SHA1SUM * print sha1 memory digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400912 (requires CONFIG_CMD_MEMORY)
Bob Liu7d861d92013-02-05 19:05:41 +0800913 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200914 CONFIG_CMD_SOURCE "source" command Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500915 CONFIG_CMD_SPI * SPI serial bus support
Luca Ceresoli7a83af02011-05-17 00:03:40 +0000916 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
Simon Glass1fb7cd42011-10-24 18:00:07 +0000917 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
Joe Hershbergerda83bcd2012-10-03 12:14:57 +0000918 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
919 CONFIG_CMD_TIMER * access to the system tick timer
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500920 CONFIG_CMD_USB * USB support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500921 CONFIG_CMD_CDP * Cisco Discover Protocol support
Marek Vasutc8339f52012-03-31 07:47:16 +0000922 CONFIG_CMD_MFSL * Microblaze FSL support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200923 CONFIG_CMD_XIMG Load part of Multi Image
Przemyslaw Marczak89c82302014-04-02 10:20:05 +0200924 CONFIG_CMD_UUID * Generate random UUID or GUID string
wdenkc6097192002-11-03 00:24:07 +0000925
926 EXAMPLE: If you want all functions except of network
927 support you can write:
928
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500929 #include "config_cmd_all.h"
930 #undef CONFIG_CMD_NET
wdenkc6097192002-11-03 00:24:07 +0000931
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400932 Other Commands:
933 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
wdenkc6097192002-11-03 00:24:07 +0000934
935 Note: Don't enable the "icache" and "dcache" commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500936 (configuration option CONFIG_CMD_CACHE) unless you know
wdenk43d96162003-03-06 00:02:04 +0000937 what you (and your U-Boot users) are doing. Data
938 cache cannot be enabled on systems like the 8xx or
939 8260 (where accesses to the IMMR region must be
940 uncached), and it cannot be disabled on all other
941 systems where we (mis-) use the data cache to hold an
942 initial stack and some data.
wdenkc6097192002-11-03 00:24:07 +0000943
944
945 XXX - this list needs to get updated!
946
Simon Glass302a6482016-03-13 19:07:28 -0600947- Removal of commands
948 If no commands are needed to boot, you can disable
949 CONFIG_CMDLINE to remove them. In this case, the command line
950 will not be available, and when U-Boot wants to execute the
951 boot command (on start-up) it will call board_run_command()
952 instead. This can reduce image size significantly for very
953 simple boot procedures.
954
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000955- Regular expression support:
956 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +0200957 If this variable is defined, U-Boot is linked against
958 the SLRE (Super Light Regular Expression) library,
959 which adds regex support to some commands, as for
960 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000961
Simon Glass45ba8072011-10-15 05:48:20 +0000962- Device tree:
963 CONFIG_OF_CONTROL
964 If this variable is defined, U-Boot will use a device tree
965 to configure its devices, instead of relying on statically
966 compiled #defines in the board file. This option is
967 experimental and only available on a few boards. The device
968 tree is available in the global data as gd->fdt_blob.
969
Simon Glass2c0f79e2011-10-24 19:15:31 +0000970 U-Boot needs to get its device tree from somewhere. This can
Alex Deymo82f766d2017-04-02 01:25:20 -0700971 be done using one of the three options below:
Simon Glassbbb0b122011-10-15 05:48:21 +0000972
973 CONFIG_OF_EMBED
974 If this variable is defined, U-Boot will embed a device tree
975 binary in its image. This device tree file should be in the
976 board directory and called <soc>-<board>.dts. The binary file
977 is then picked up in board_init_f() and made available through
978 the global data structure as gd->blob.
Simon Glass45ba8072011-10-15 05:48:20 +0000979
Simon Glass2c0f79e2011-10-24 19:15:31 +0000980 CONFIG_OF_SEPARATE
981 If this variable is defined, U-Boot will build a device tree
982 binary. It will be called u-boot.dtb. Architecture-specific
983 code will locate it at run-time. Generally this works by:
984
985 cat u-boot.bin u-boot.dtb >image.bin
986
987 and in fact, U-Boot does this for you, creating a file called
988 u-boot-dtb.bin which is useful in the common case. You can
989 still use the individual files if you need something more
990 exotic.
991
Alex Deymo82f766d2017-04-02 01:25:20 -0700992 CONFIG_OF_BOARD
993 If this variable is defined, U-Boot will use the device tree
994 provided by the board at runtime instead of embedding one with
995 the image. Only boards defining board_fdt_blob_setup() support
996 this option (see include/fdtdec.h file).
997
wdenkc6097192002-11-03 00:24:07 +0000998- Watchdog:
999 CONFIG_WATCHDOG
1000 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +00001001 support for the SoC. There must be support in the SoC
1002 specific code for a watchdog. For the 8xx and 8260
1003 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1004 register. When supported for a specific SoC is
1005 available, then no further board specific code should
1006 be needed to use it.
1007
1008 CONFIG_HW_WATCHDOG
1009 When using a watchdog circuitry external to the used
1010 SoC, then define this variable and provide board
1011 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +00001012
Heiko Schocher7bae0d62015-01-21 08:38:22 +01001013 CONFIG_AT91_HW_WDT_TIMEOUT
1014 specify the timeout in seconds. default 2 seconds.
1015
stroesec1551ea2003-04-04 15:53:41 +00001016- U-Boot Version:
1017 CONFIG_VERSION_VARIABLE
1018 If this variable is defined, an environment variable
1019 named "ver" is created by U-Boot showing the U-Boot
1020 version as printed by the "version" command.
Benoît Thébaudeaua1ea8e52012-08-13 15:01:14 +02001021 Any change to this variable will be reverted at the
1022 next reset.
stroesec1551ea2003-04-04 15:53:41 +00001023
wdenkc6097192002-11-03 00:24:07 +00001024- Real-Time Clock:
1025
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001026 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +00001027 has to be selected, too. Define exactly one of the
1028 following options:
1029
1030 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1031 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +00001032 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +00001033 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +00001034 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +00001035 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +00001036 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +02001037 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +00001038 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +01001039 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +00001040 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001041 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +02001042 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1043 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +00001044
wdenkb37c7e52003-06-30 16:24:52 +00001045 Note that if the RTC uses I2C, then the I2C interface
1046 must also be configured. See I2C Support, below.
1047
Peter Tysere92739d2008-12-17 16:36:21 -06001048- GPIO Support:
1049 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -06001050
Chris Packham5dec49c2010-12-19 10:12:13 +00001051 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1052 chip-ngpio pairs that tell the PCA953X driver the number of
1053 pins supported by a particular chip.
1054
Peter Tysere92739d2008-12-17 16:36:21 -06001055 Note that if the GPIO device uses I2C, then the I2C interface
1056 must also be configured. See I2C Support, below.
1057
Simon Glassaa532332014-06-11 23:29:41 -06001058- I/O tracing:
1059 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1060 accesses and can checksum them or write a list of them out
1061 to memory. See the 'iotrace' command for details. This is
1062 useful for testing device drivers since it can confirm that
1063 the driver behaves the same way before and after a code
1064 change. Currently this is supported on sandbox and arm. To
1065 add support for your architecture, add '#include <iotrace.h>'
1066 to the bottom of arch/<arch>/include/asm/io.h and test.
1067
1068 Example output from the 'iotrace stats' command is below.
1069 Note that if the trace buffer is exhausted, the checksum will
1070 still continue to operate.
1071
1072 iotrace is enabled
1073 Start: 10000000 (buffer start address)
1074 Size: 00010000 (buffer size)
1075 Offset: 00000120 (current buffer offset)
1076 Output: 10000120 (start + offset)
1077 Count: 00000018 (number of trace records)
1078 CRC32: 9526fb66 (CRC32 of all trace records)
1079
wdenkc6097192002-11-03 00:24:07 +00001080- Timestamp Support:
1081
wdenk43d96162003-03-06 00:02:04 +00001082 When CONFIG_TIMESTAMP is selected, the timestamp
1083 (date and time) of an image is printed by image
1084 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001085 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +00001086
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001087- Partition Labels (disklabels) Supported:
1088 Zero or more of the following:
1089 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1090 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1091 Intel architecture, USB sticks, etc.
1092 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1093 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1094 bootloader. Note 2TB partition limit; see
1095 disk/part_efi.c
1096 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +00001097
Wolfgang Denk218ca722008-03-26 10:40:12 +01001098 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
Simon Glassc649e3c2016-05-01 11:36:02 -06001099 CONFIG_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001100 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +00001101
1102- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +00001103 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1104 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +00001105
wdenk4d13cba2004-03-14 14:09:05 +00001106 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1107 be performed by calling the function
1108 ide_set_reset(int reset)
1109 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +00001110
1111- ATAPI Support:
1112 CONFIG_ATAPI
1113
1114 Set this to enable ATAPI support.
1115
wdenkc40b2952004-03-13 23:29:43 +00001116- LBA48 Support
1117 CONFIG_LBA48
1118
1119 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001120 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +00001121 Whithout these , LBA48 support uses 32bit variables and will 'only'
1122 support disks up to 2.1TB.
1123
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001124 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +00001125 When enabled, makes the IDE subsystem use 64bit sector addresses.
1126 Default is 32bit.
1127
wdenkc6097192002-11-03 00:24:07 +00001128- SCSI Support:
1129 At the moment only there is only support for the
1130 SYM53C8XX SCSI controller; define
1131 CONFIG_SCSI_SYM53C8XX to enable it.
1132
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001133 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1134 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1135 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +00001136 maximum numbers of LUNs, SCSI ID's and target
1137 devices.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001138 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
wdenkc6097192002-11-03 00:24:07 +00001139
Wolfgang Denk93e14592013-10-04 17:43:24 +02001140 The environment variable 'scsidevs' is set to the number of
1141 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +00001142
wdenkc6097192002-11-03 00:24:07 +00001143- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +00001144 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +00001145 Support for Intel 8254x/8257x gigabit chips.
1146
1147 CONFIG_E1000_SPI
1148 Utility code for direct access to the SPI bus on Intel 8257x.
1149 This does not do anything useful unless you set at least one
1150 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1151
1152 CONFIG_E1000_SPI_GENERIC
1153 Allow generic access to the SPI bus on the Intel 8257x, for
1154 example with the "sspi" command.
1155
1156 CONFIG_CMD_E1000
1157 Management command for E1000 devices. When used on devices
1158 with SPI support you can reprogram the EEPROM from U-Boot.
stroese53cf9432003-06-05 15:39:44 +00001159
wdenkc6097192002-11-03 00:24:07 +00001160 CONFIG_EEPRO100
1161 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001162 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +00001163 write routine for first time initialisation.
1164
1165 CONFIG_TULIP
1166 Support for Digital 2114x chips.
1167 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1168 modem chip initialisation (KS8761/QS6611).
1169
1170 CONFIG_NATSEMI
1171 Support for National dp83815 chips.
1172
1173 CONFIG_NS8382X
1174 Support for National dp8382[01] gigabit chips.
1175
wdenk45219c42003-05-12 21:50:16 +00001176- NETWORK Support (other):
1177
Jens Scharsigc041e9d2010-01-23 12:03:45 +01001178 CONFIG_DRIVER_AT91EMAC
1179 Support for AT91RM9200 EMAC.
1180
1181 CONFIG_RMII
1182 Define this to use reduced MII inteface
1183
1184 CONFIG_DRIVER_AT91EMAC_QUIET
1185 If this defined, the driver is quiet.
1186 The driver doen't show link status messages.
1187
Rob Herringefdd7312011-12-15 11:15:49 +00001188 CONFIG_CALXEDA_XGMAC
1189 Support for the Calxeda XGMAC device
1190
Ashok3bb46d22012-10-15 06:20:47 +00001191 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +00001192 Support for SMSC's LAN91C96 chips.
1193
wdenk45219c42003-05-12 21:50:16 +00001194 CONFIG_LAN91C96_USE_32_BIT
1195 Define this to enable 32 bit addressing
1196
Ashok3bb46d22012-10-15 06:20:47 +00001197 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +00001198 Support for SMSC's LAN91C111 chip
1199
1200 CONFIG_SMC91111_BASE
1201 Define this to hold the physical address
1202 of the device (I/O space)
1203
1204 CONFIG_SMC_USE_32_BIT
1205 Define this if data bus is 32 bits
1206
1207 CONFIG_SMC_USE_IOFUNCS
1208 Define this to use i/o functions instead of macros
1209 (some hardware wont work with macros)
1210
Heiko Schocherdc02bad2011-11-15 10:00:04 -05001211 CONFIG_DRIVER_TI_EMAC
1212 Support for davinci emac
1213
1214 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1215 Define this if you have more then 3 PHYs.
1216
Macpaul Linb3dbf4a52010-12-21 16:59:46 +08001217 CONFIG_FTGMAC100
1218 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1219
1220 CONFIG_FTGMAC100_EGIGA
1221 Define this to use GE link update with gigabit PHY.
1222 Define this if FTGMAC100 is connected to gigabit PHY.
1223 If your system has 10/100 PHY only, it might not occur
1224 wrong behavior. Because PHY usually return timeout or
1225 useless data when polling gigabit status and gigabit
1226 control registers. This behavior won't affect the
1227 correctnessof 10/100 link speed update.
1228
Mike Rapoportc2fff332009-11-11 10:03:03 +02001229 CONFIG_SMC911X
Jens Gehrlein557b3772008-05-05 14:06:11 +02001230 Support for SMSC's LAN911x and LAN921x chips
1231
Mike Rapoportc2fff332009-11-11 10:03:03 +02001232 CONFIG_SMC911X_BASE
Jens Gehrlein557b3772008-05-05 14:06:11 +02001233 Define this to hold the physical address
1234 of the device (I/O space)
1235
Mike Rapoportc2fff332009-11-11 10:03:03 +02001236 CONFIG_SMC911X_32_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001237 Define this if data bus is 32 bits
1238
Mike Rapoportc2fff332009-11-11 10:03:03 +02001239 CONFIG_SMC911X_16_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001240 Define this if data bus is 16 bits. If your processor
1241 automatically converts one 32 bit word to two 16 bit
Mike Rapoportc2fff332009-11-11 10:03:03 +02001242 words you may also try CONFIG_SMC911X_32_BIT.
Jens Gehrlein557b3772008-05-05 14:06:11 +02001243
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001244 CONFIG_SH_ETHER
1245 Support for Renesas on-chip Ethernet controller
1246
1247 CONFIG_SH_ETHER_USE_PORT
1248 Define the number of ports to be used
1249
1250 CONFIG_SH_ETHER_PHY_ADDR
1251 Define the ETH PHY's address
1252
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001253 CONFIG_SH_ETHER_CACHE_WRITEBACK
1254 If this option is set, the driver enables cache flush.
1255
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001256- PWM Support:
1257 CONFIG_PWM_IMX
Robert P. J. Day5052e812016-09-13 08:35:18 -04001258 Support for PWM module on the imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001259
Vadim Bendebury5e124722011-10-17 08:36:14 +00001260- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001261 CONFIG_TPM
1262 Support TPM devices.
1263
Christophe Ricard0766ad22015-10-06 22:54:41 +02001264 CONFIG_TPM_TIS_INFINEON
1265 Support for Infineon i2c bus TPM devices. Only one device
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001266 per system is supported at this time.
1267
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001268 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1269 Define the burst count bytes upper limit
1270
Christophe Ricard3aa74082016-01-21 23:27:13 +01001271 CONFIG_TPM_ST33ZP24
1272 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
1273
1274 CONFIG_TPM_ST33ZP24_I2C
1275 Support for STMicroelectronics ST33ZP24 I2C devices.
1276 Requires TPM_ST33ZP24 and I2C.
1277
Christophe Ricardb75fdc12016-01-21 23:27:14 +01001278 CONFIG_TPM_ST33ZP24_SPI
1279 Support for STMicroelectronics ST33ZP24 SPI devices.
1280 Requires TPM_ST33ZP24 and SPI.
1281
Dirk Eibachc01939c2013-06-26 15:55:15 +02001282 CONFIG_TPM_ATMEL_TWI
1283 Support for Atmel TWI TPM device. Requires I2C support.
1284
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001285 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001286 Support for generic parallel port TPM devices. Only one device
1287 per system is supported at this time.
1288
1289 CONFIG_TPM_TIS_BASE_ADDRESS
1290 Base address where the generic TPM device is mapped
1291 to. Contemporary x86 systems usually map it at
1292 0xfed40000.
1293
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001294 CONFIG_CMD_TPM
1295 Add tpm monitor functions.
1296 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1297 provides monitor access to authorized functions.
1298
1299 CONFIG_TPM
1300 Define this to enable the TPM support library which provides
1301 functional interfaces to some TPM commands.
1302 Requires support for a TPM device.
1303
1304 CONFIG_TPM_AUTH_SESSIONS
1305 Define this to enable authorized functions in the TPM library.
1306 Requires CONFIG_TPM and CONFIG_SHA1.
1307
wdenkc6097192002-11-03 00:24:07 +00001308- USB Support:
1309 At the moment only the UHCI host controller is
wdenk4d13cba2004-03-14 14:09:05 +00001310 supported (PIP405, MIP405, MPC5200); define
wdenkc6097192002-11-03 00:24:07 +00001311 CONFIG_USB_UHCI to enable it.
1312 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001313 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001314 storage devices.
1315 Note:
1316 Supported are USB Keyboards and USB Floppy drives
1317 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001318 MPC5200 USB requires additional defines:
1319 CONFIG_USB_CLOCK
1320 for 528 MHz Clock: 0x0001bbbb
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001321 CONFIG_PSC3_USB
1322 for USB on PSC3
wdenk4d13cba2004-03-14 14:09:05 +00001323 CONFIG_USB_CONFIG
1324 for differential drivers: 0x00001000
1325 for single ended drivers: 0x00005000
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001326 for differential drivers on PSC3: 0x00000100
1327 for single ended drivers on PSC3: 0x00004100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001328 CONFIG_SYS_USB_EVENT_POLL
Zhang Weifdcfaa12007-06-06 10:08:13 +02001329 May be defined to allow interrupt polling
1330 instead of using asynchronous interrupts
wdenk4d13cba2004-03-14 14:09:05 +00001331
Simon Glass9ab4ce22012-02-27 10:52:47 +00001332 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1333 txfilltuning field in the EHCI controller on reset.
1334
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001335 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1336 HW module registers.
1337
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001338- USB Device:
1339 Define the below if you wish to use the USB console.
1340 Once firmware is rebuilt from a serial console issue the
1341 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001342 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001343 it has found a new device. The environment variable usbtty
1344 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001345 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001346 Common Device Class Abstract Control Model serial device.
1347 If you select usbtty = gserial you should be able to enumerate
1348 a Linux host by
1349 # modprobe usbserial vendor=0xVendorID product=0xProductID
1350 else if using cdc_acm, simply setting the environment
1351 variable usbtty to be cdc_acm should suffice. The following
1352 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001353
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001354 CONFIG_USB_DEVICE
1355 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001356
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001357 CONFIG_USB_TTY
1358 Define this to have a tty type of device available to
1359 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001360
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301361 CONFIG_USBD_HS
1362 Define this to enable the high speed support for usb
1363 device and usbtty. If this feature is enabled, a routine
1364 int is_usbd_high_speed(void)
1365 also needs to be defined by the driver to dynamically poll
1366 whether the enumeration has succeded at high speed or full
1367 speed.
1368
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001369 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001370 Define this if you want stdin, stdout &/or stderr to
1371 be set to usbtty.
1372
1373 mpc8xx:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001374 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001375 Derive USB clock from external clock "blah"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001376 - CONFIG_SYS_USB_EXTC_CLK 0x02
Wolfgang Denk386eda02006-06-14 18:14:56 +02001377
Wolfgang Denk386eda02006-06-14 18:14:56 +02001378 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001379 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001380 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001381 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1382 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1383 should pretend to be a Linux device to it's target host.
1384
1385 CONFIG_USBD_MANUFACTURER
1386 Define this string as the name of your company for
1387 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001388
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001389 CONFIG_USBD_PRODUCT_NAME
1390 Define this string as the name of your product
1391 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1392
1393 CONFIG_USBD_VENDORID
1394 Define this as your assigned Vendor ID from the USB
1395 Implementors Forum. This *must* be a genuine Vendor ID
1396 to avoid polluting the USB namespace.
1397 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001398
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001399 CONFIG_USBD_PRODUCTID
1400 Define this as the unique Product ID
1401 for your device
1402 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001403
Igor Grinbergd70a5602011-12-12 12:08:35 +02001404- ULPI Layer Support:
1405 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1406 the generic ULPI layer. The generic layer accesses the ULPI PHY
1407 via the platform viewport, so you need both the genric layer and
1408 the viewport enabled. Currently only Chipidea/ARC based
1409 viewport is supported.
1410 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1411 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001412 If your ULPI phy needs a different reference clock than the
1413 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1414 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001415
1416- MMC Support:
1417 The MMC controller on the Intel PXA is supported. To
1418 enable this define CONFIG_MMC. The MMC can be
1419 accessed from the boot prompt by mapping the device
1420 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001421 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1422 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001423
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001424 CONFIG_SH_MMCIF
1425 Support for Renesas on-chip MMCIF controller
1426
1427 CONFIG_SH_MMCIF_ADDR
1428 Define the base address of MMCIF registers
1429
1430 CONFIG_SH_MMCIF_CLK
1431 Define the clock frequency for MMCIF
1432
Pierre Aubert1fd93c62014-04-24 10:30:08 +02001433 CONFIG_SUPPORT_EMMC_BOOT
1434 Enable some additional features of the eMMC boot partitions.
1435
1436 CONFIG_SUPPORT_EMMC_RPMB
1437 Enable the commands for reading, writing and programming the
1438 key for the Replay Protection Memory Block partition in eMMC.
1439
Tom Rinib3ba6e92013-03-14 05:32:47 +00001440- USB Device Firmware Update (DFU) class support:
Paul Kocialkowski01acd6a2015-06-12 19:56:58 +02001441 CONFIG_USB_FUNCTION_DFU
Tom Rinib3ba6e92013-03-14 05:32:47 +00001442 This enables the USB portion of the DFU USB class
1443
1444 CONFIG_CMD_DFU
1445 This enables the command "dfu" which is used to have
1446 U-Boot create a DFU class device via USB. This command
1447 requires that the "dfu_alt_info" environment variable be
1448 set and define the alt settings to expose to the host.
1449
1450 CONFIG_DFU_MMC
1451 This enables support for exposing (e)MMC devices via DFU.
1452
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001453 CONFIG_DFU_NAND
1454 This enables support for exposing NAND devices via DFU.
1455
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301456 CONFIG_DFU_RAM
1457 This enables support for exposing RAM via DFU.
1458 Note: DFU spec refer to non-volatile memory usage, but
1459 allow usages beyond the scope of spec - here RAM usage,
1460 one that would help mostly the developer.
1461
Heiko Schochere7e75c72013-06-12 06:05:51 +02001462 CONFIG_SYS_DFU_DATA_BUF_SIZE
1463 Dfu transfer uses a buffer before writing data to the
1464 raw storage device. Make the size (in bytes) of this buffer
1465 configurable. The size of this buffer is also configurable
1466 through the "dfu_bufsiz" environment variable.
1467
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001468 CONFIG_SYS_DFU_MAX_FILE_SIZE
1469 When updating files rather than the raw storage device,
1470 we use a static buffer to copy the file into and then write
1471 the buffer once we've been given the whole file. Define
1472 this to the maximum filesize (in bytes) for the buffer.
1473 Default is 4 MiB if undefined.
1474
Heiko Schocher001a8312014-03-18 08:09:56 +01001475 DFU_DEFAULT_POLL_TIMEOUT
1476 Poll timeout [ms], is the timeout a device can send to the
1477 host. The host must wait for this timeout before sending
1478 a subsequent DFU_GET_STATUS request to the device.
1479
1480 DFU_MANIFEST_POLL_TIMEOUT
1481 Poll timeout [ms], which the device sends to the host when
1482 entering dfuMANIFEST state. Host waits this timeout, before
1483 sending again an USB request to the device.
1484
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001485- USB Device Android Fastboot support:
Paul Kocialkowski17da3c02015-06-12 19:56:59 +02001486 CONFIG_USB_FUNCTION_FASTBOOT
1487 This enables the USB part of the fastboot gadget
1488
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001489 CONFIG_CMD_FASTBOOT
1490 This enables the command "fastboot" which enables the Android
1491 fastboot mode for the platform's USB device. Fastboot is a USB
1492 protocol for downloading images, flashing and device control
1493 used on Android devices.
1494 See doc/README.android-fastboot for more information.
1495
1496 CONFIG_ANDROID_BOOT_IMAGE
1497 This enables support for booting images which use the Android
1498 image format header.
1499
Paul Kocialkowskia588d992015-07-20 12:38:22 +02001500 CONFIG_FASTBOOT_BUF_ADDR
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001501 The fastboot protocol requires a large memory buffer for
1502 downloads. Define this to the starting RAM address to use for
1503 downloaded images.
1504
Paul Kocialkowskia588d992015-07-20 12:38:22 +02001505 CONFIG_FASTBOOT_BUF_SIZE
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001506 The fastboot protocol requires a large memory buffer for
1507 downloads. This buffer should be as large as possible for a
1508 platform. Define this to the size available RAM for fastboot.
1509
Steve Raed1b5ed02014-08-26 11:47:28 -07001510 CONFIG_FASTBOOT_FLASH
1511 The fastboot protocol includes a "flash" command for writing
1512 the downloaded image to a non-volatile storage device. Define
1513 this to enable the "fastboot flash" command.
1514
1515 CONFIG_FASTBOOT_FLASH_MMC_DEV
1516 The fastboot "flash" command requires additional information
1517 regarding the non-volatile storage device. Define this to
1518 the eMMC device that fastboot should use to store the image.
1519
Steve Rae0ff7e582014-12-12 15:51:54 -08001520 CONFIG_FASTBOOT_GPT_NAME
1521 The fastboot "flash" command supports writing the downloaded
1522 image to the Protective MBR and the Primary GUID Partition
1523 Table. (Additionally, this downloaded image is post-processed
1524 to generate and write the Backup GUID Partition Table.)
1525 This occurs when the specified "partition name" on the
1526 "fastboot flash" command line matches this value.
Petr Kulhavy6f6c8632016-09-09 10:27:18 +02001527 The default is "gpt" if undefined.
Steve Rae0ff7e582014-12-12 15:51:54 -08001528
Petr Kulhavyb6dd69a2016-09-09 10:27:16 +02001529 CONFIG_FASTBOOT_MBR_NAME
1530 The fastboot "flash" command supports writing the downloaded
1531 image to DOS MBR.
1532 This occurs when the "partition name" specified on the
1533 "fastboot flash" command line matches this value.
1534 If not defined the default value "mbr" is used.
1535
wdenk6705d812004-08-02 23:22:59 +00001536- Journaling Flash filesystem support:
Simon Glassb2482df2016-10-02 18:00:59 -06001537 CONFIG_JFFS2_NAND
wdenk6705d812004-08-02 23:22:59 +00001538 Define these for a default partition on a NAND device
1539
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001540 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1541 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001542 Define these for a default partition on a NOR device
1543
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001544- FAT(File Allocation Table) filesystem write function support:
1545 CONFIG_FAT_WRITE
Donggeun Kim656f4c62012-03-22 04:38:56 +00001546
1547 Define this to enable support for saving memory data as a
1548 file in FAT formatted partition.
1549
1550 This will also enable the command "fatwrite" enabling the
1551 user to write files to FAT.
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001552
Siva Durga Prasad Paladugu4f0d1a22014-05-26 19:18:37 +05301553- FAT(File Allocation Table) filesystem cluster size:
1554 CONFIG_FS_FAT_MAX_CLUSTSIZE
1555
1556 Define the max cluster size for fat operations else
1557 a default value of 65536 will be defined.
1558
wdenkc6097192002-11-03 00:24:07 +00001559- Keyboard Support:
Simon Glass39f615e2015-11-11 10:05:47 -07001560 See Kconfig help for available keyboard drivers.
1561
1562 CONFIG_KEYBOARD
1563
1564 Define this to enable a custom keyboard support.
1565 This simply calls drv_keyboard_init() which must be
1566 defined in your board-specific files. This option is deprecated
1567 and is only used by novena. For new boards, use driver model
1568 instead.
wdenkc6097192002-11-03 00:24:07 +00001569
1570- Video support:
Timur Tabi7d3053f2011-02-15 17:09:19 -06001571 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001572 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001573 SOCs that have a DIU should define this macro to enable DIU
1574 support, and should also define these other macros:
1575
1576 CONFIG_SYS_DIU_ADDR
1577 CONFIG_VIDEO
Timur Tabi7d3053f2011-02-15 17:09:19 -06001578 CONFIG_CFB_CONSOLE
1579 CONFIG_VIDEO_SW_CURSOR
1580 CONFIG_VGA_AS_SINGLE_DEVICE
1581 CONFIG_VIDEO_LOGO
1582 CONFIG_VIDEO_BMP_LOGO
1583
Timur Tabiba8e76b2011-04-11 14:18:22 -05001584 The DIU driver will look for the 'video-mode' environment
1585 variable, and if defined, enable the DIU as a console during
Fabio Estevam8eca9432016-04-02 11:53:18 -03001586 boot. See the documentation file doc/README.video for a
Timur Tabiba8e76b2011-04-11 14:18:22 -05001587 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001588
wdenkc6097192002-11-03 00:24:07 +00001589- LCD Support: CONFIG_LCD
1590
1591 Define this to enable LCD support (for output to LCD
1592 display); also select one of the supported displays
1593 by defining one of these:
1594
Stelian Pop39cf4802008-05-09 21:57:18 +02001595 CONFIG_ATMEL_LCD:
1596
1597 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1598
wdenkfd3103b2003-11-25 16:55:19 +00001599 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001600
wdenkfd3103b2003-11-25 16:55:19 +00001601 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001602
wdenkfd3103b2003-11-25 16:55:19 +00001603 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001604
wdenkfd3103b2003-11-25 16:55:19 +00001605 NEC NL6448BC20-08. 6.5", 640x480.
1606 Active, color, single scan.
1607
1608 CONFIG_NEC_NL6448BC33_54
1609
1610 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001611 Active, color, single scan.
1612
1613 CONFIG_SHARP_16x9
1614
1615 Sharp 320x240. Active, color, single scan.
1616 It isn't 16x9, and I am not sure what it is.
1617
1618 CONFIG_SHARP_LQ64D341
1619
1620 Sharp LQ64D341 display, 640x480.
1621 Active, color, single scan.
1622
1623 CONFIG_HLD1045
1624
1625 HLD1045 display, 640x480.
1626 Active, color, single scan.
1627
1628 CONFIG_OPTREX_BW
1629
1630 Optrex CBL50840-2 NF-FW 99 22 M5
1631 or
1632 Hitachi LMG6912RPFC-00T
1633 or
1634 Hitachi SP14Q002
1635
1636 320x240. Black & white.
1637
Simon Glass676d3192012-10-17 13:24:54 +00001638 CONFIG_LCD_ALIGNMENT
1639
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001640 Normally the LCD is page-aligned (typically 4KB). If this is
Simon Glass676d3192012-10-17 13:24:54 +00001641 defined then the LCD will be aligned to this value instead.
1642 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1643 here, since it is cheaper to change data cache settings on
1644 a per-section basis.
1645
1646
Hannes Petermaier604c7d42015-03-27 08:01:38 +01001647 CONFIG_LCD_ROTATION
1648
1649 Sometimes, for example if the display is mounted in portrait
1650 mode or even if it's mounted landscape but rotated by 180degree,
1651 we need to rotate our content of the display relative to the
1652 framebuffer, so that user can read the messages which are
1653 printed out.
1654 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1655 initialized with a given rotation from "vl_rot" out of
1656 "vidinfo_t" which is provided by the board specific code.
1657 The value for vl_rot is coded as following (matching to
1658 fbcon=rotate:<n> linux-kernel commandline):
1659 0 = no rotation respectively 0 degree
1660 1 = 90 degree rotation
1661 2 = 180 degree rotation
1662 3 = 270 degree rotation
1663
1664 If CONFIG_LCD_ROTATION is not defined, the console will be
1665 initialized with 0degree rotation.
1666
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001667 CONFIG_LCD_BMP_RLE8
1668
1669 Support drawing of RLE8-compressed bitmaps on the LCD.
1670
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001671 CONFIG_I2C_EDID
1672
1673 Enables an 'i2c edid' command which can read EDID
1674 information over I2C from an attached LCD display.
1675
wdenk7152b1d2003-09-05 23:19:14 +00001676- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001677
wdenk8bde7f72003-06-27 21:31:46 +00001678 If this option is set, the environment is checked for
1679 a variable "splashimage". If found, the usual display
1680 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001681 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001682 specified in "splashimage" is loaded instead. The
1683 console is redirected to the "nulldev", too. This
1684 allows for a "silent" boot where a splash screen is
1685 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001686
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001687 CONFIG_SPLASHIMAGE_GUARD
1688
1689 If this option is set, then U-Boot will prevent the environment
1690 variable "splashimage" from being set to a problematic address
Fabio Estevamab5645f2016-03-23 12:46:12 -03001691 (see doc/README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001692 This option is useful for targets where, due to alignment
1693 restrictions, an improperly aligned BMP image will cause a data
1694 abort. If you think you will not have problems with unaligned
1695 accesses (for example because your toolchain prevents them)
1696 there is no need to set this option.
1697
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001698 CONFIG_SPLASH_SCREEN_ALIGN
1699
1700 If this option is set the splash image can be freely positioned
1701 on the screen. Environment variable "splashpos" specifies the
1702 position as "x,y". If a positive number is given it is used as
1703 number of pixel from left/top. If a negative number is given it
1704 is used as number of pixel from right/bottom. You can also
1705 specify 'm' for centering the image.
1706
1707 Example:
1708 setenv splashpos m,m
1709 => image at center of screen
1710
1711 setenv splashpos 30,20
1712 => image at x = 30 and y = 20
1713
1714 setenv splashpos -10,m
1715 => vertically centered image
1716 at x = dspWidth - bmpWidth - 9
1717
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001718- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1719
1720 If this option is set, additionally to standard BMP
1721 images, gzipped BMP images can be displayed via the
1722 splashscreen support or the bmp command.
1723
Anatolij Gustschind5011762010-03-15 14:50:25 +01001724- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1725
1726 If this option is set, 8-bit RLE compressed BMP images
1727 can be displayed via the splashscreen support or the
1728 bmp command.
1729
wdenkc29fdfc2003-08-29 20:57:53 +00001730- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001731 CONFIG_GZIP
1732
1733 Enabled by default to support gzip compressed images.
1734
wdenkc29fdfc2003-08-29 20:57:53 +00001735 CONFIG_BZIP2
1736
1737 If this option is set, support for bzip2 compressed
1738 images is included. If not, only uncompressed and gzip
1739 compressed images are supported.
1740
wdenk42d1f032003-10-15 23:53:47 +00001741 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001742 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001743 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001744
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001745 CONFIG_LZMA
1746
1747 If this option is set, support for lzma compressed
1748 images is included.
1749
1750 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1751 requires an amount of dynamic memory that is given by the
1752 formula:
1753
1754 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1755
1756 Where lc and lp stand for, respectively, Literal context bits
1757 and Literal pos bits.
1758
1759 This value is upper-bounded by 14MB in the worst case. Anyway,
1760 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1761 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1762 a very small buffer.
1763
1764 Use the lzmainfo tool to determinate the lc and lp values and
1765 then calculate the amount of needed dynamic memory (ensuring
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001766 the appropriate CONFIG_SYS_MALLOC_LEN value).
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001767
Kees Cook8ef70472013-08-16 07:59:12 -07001768 CONFIG_LZO
1769
1770 If this option is set, support for LZO compressed images
1771 is included.
1772
wdenk17ea1172004-06-06 21:51:03 +00001773- MII/PHY support:
1774 CONFIG_PHY_ADDR
1775
1776 The address of PHY on MII bus.
1777
1778 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1779
1780 The clock frequency of the MII bus
1781
1782 CONFIG_PHY_GIGE
1783
1784 If this option is set, support for speed/duplex
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001785 detection of gigabit PHY is included.
wdenk17ea1172004-06-06 21:51:03 +00001786
1787 CONFIG_PHY_RESET_DELAY
1788
1789 Some PHY like Intel LXT971A need extra delay after
1790 reset before any MII register access is possible.
1791 For such PHY, set this option to the usec delay
1792 required. (minimum 300usec for LXT971A)
1793
1794 CONFIG_PHY_CMD_DELAY (ppc4xx)
1795
1796 Some PHY like Intel LXT971A need extra delay after
1797 command issued before MII status register can be read
1798
wdenkc6097192002-11-03 00:24:07 +00001799- IP address:
1800 CONFIG_IPADDR
1801
1802 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001803 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001804 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001805 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001806
1807- Server IP address:
1808 CONFIG_SERVERIP
1809
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001810 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001811 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001812 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001813
Robin Getz97cfe862009-07-21 12:15:28 -04001814 CONFIG_KEEP_SERVERADDR
1815
1816 Keeps the server's MAC address, in the env 'serveraddr'
1817 for passing to bootargs (like Linux's netconsole option)
1818
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001819- Gateway IP address:
1820 CONFIG_GATEWAYIP
1821
1822 Defines a default value for the IP address of the
1823 default router where packets to other networks are
1824 sent to.
1825 (Environment variable "gatewayip")
1826
1827- Subnet mask:
1828 CONFIG_NETMASK
1829
1830 Defines a default value for the subnet mask (or
1831 routing prefix) which is used to determine if an IP
1832 address belongs to the local subnet or needs to be
1833 forwarded through a router.
1834 (Environment variable "netmask")
1835
David Updegraff53a5c422007-06-11 10:41:07 -05001836- Multicast TFTP Mode:
1837 CONFIG_MCAST_TFTP
1838
1839 Defines whether you want to support multicast TFTP as per
1840 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001841 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05001842 driver in use must provide a function: mcast() to join/leave a
1843 multicast group.
1844
wdenkc6097192002-11-03 00:24:07 +00001845- BOOTP Recovery Mode:
1846 CONFIG_BOOTP_RANDOM_DELAY
1847
1848 If you have many targets in a network that try to
1849 boot using BOOTP, you may want to avoid that all
1850 systems send out BOOTP requests at precisely the same
1851 moment (which would happen for instance at recovery
1852 from a power failure, when all systems will try to
1853 boot, thus flooding the BOOTP server. Defining
1854 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1855 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001856 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001857
1858 1st BOOTP request: delay 0 ... 1 sec
1859 2nd BOOTP request: delay 0 ... 2 sec
1860 3rd BOOTP request: delay 0 ... 4 sec
1861 4th and following
1862 BOOTP requests: delay 0 ... 8 sec
1863
Thierry Reding92ac8ac2014-08-19 10:21:24 +02001864 CONFIG_BOOTP_ID_CACHE_SIZE
1865
1866 BOOTP packets are uniquely identified using a 32-bit ID. The
1867 server will copy the ID from client requests to responses and
1868 U-Boot will use this to determine if it is the destination of
1869 an incoming response. Some servers will check that addresses
1870 aren't in use before handing them out (usually using an ARP
1871 ping) and therefore take up to a few hundred milliseconds to
1872 respond. Network congestion may also influence the time it
1873 takes for a response to make it back to the client. If that
1874 time is too long, U-Boot will retransmit requests. In order
1875 to allow earlier responses to still be accepted after these
1876 retransmissions, U-Boot's BOOTP client keeps a small cache of
1877 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1878 cache. The default is to keep IDs for up to four outstanding
1879 requests. Increasing this will allow U-Boot to accept offers
1880 from a BOOTP client in networks with unusually high latency.
1881
stroesefe389a82003-08-28 14:17:32 +00001882- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001883 You can fine tune the DHCP functionality by defining
1884 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001885
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001886 CONFIG_BOOTP_SUBNETMASK
1887 CONFIG_BOOTP_GATEWAY
1888 CONFIG_BOOTP_HOSTNAME
1889 CONFIG_BOOTP_NISDOMAIN
1890 CONFIG_BOOTP_BOOTPATH
1891 CONFIG_BOOTP_BOOTFILESIZE
1892 CONFIG_BOOTP_DNS
1893 CONFIG_BOOTP_DNS2
1894 CONFIG_BOOTP_SEND_HOSTNAME
1895 CONFIG_BOOTP_NTPSERVER
1896 CONFIG_BOOTP_TIMEOFFSET
1897 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001898 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001899
Wilson Callan5d110f02007-07-28 10:56:13 -04001900 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1901 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001902
Joe Hershberger2c00e092012-05-23 07:59:19 +00001903 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1904 after the configured retry count, the call will fail
1905 instead of starting over. This can be used to fail over
1906 to Link-local IP address configuration if the DHCP server
1907 is not available.
1908
stroesefe389a82003-08-28 14:17:32 +00001909 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1910 serverip from a DHCP server, it is possible that more
1911 than one DNS serverip is offered to the client.
1912 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1913 serverip will be stored in the additional environment
1914 variable "dnsip2". The first DNS serverip is always
1915 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001916 is defined.
stroesefe389a82003-08-28 14:17:32 +00001917
1918 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1919 to do a dynamic update of a DNS server. To do this, they
1920 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001921 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001922 of the "hostname" environment variable is passed as
1923 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001924
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001925 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1926
1927 A 32bit value in microseconds for a delay between
1928 receiving a "DHCP Offer" and sending the "DHCP Request".
1929 This fixes a problem with certain DHCP servers that don't
1930 respond 100% of the time to a "DHCP request". E.g. On an
1931 AT91RM9200 processor running at 180MHz, this delay needed
1932 to be *at least* 15,000 usec before a Windows Server 2003
1933 DHCP server would reply 100% of the time. I recommend at
1934 least 50,000 usec to be safe. The alternative is to hope
1935 that one of the retries will be successful but note that
1936 the DHCP timeout and retry process takes a longer than
1937 this delay.
1938
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001939 - Link-local IP address negotiation:
1940 Negotiate with other link-local clients on the local network
1941 for an address that doesn't require explicit configuration.
1942 This is especially useful if a DHCP server cannot be guaranteed
1943 to exist in all environments that the device must operate.
1944
1945 See doc/README.link-local for more information.
1946
wdenka3d991b2004-04-15 21:48:45 +00001947 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00001948 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00001949
1950 The device id used in CDP trigger frames.
1951
1952 CONFIG_CDP_DEVICE_ID_PREFIX
1953
1954 A two character string which is prefixed to the MAC address
1955 of the device.
1956
1957 CONFIG_CDP_PORT_ID
1958
1959 A printf format string which contains the ascii name of
1960 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001961 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00001962
1963 CONFIG_CDP_CAPABILITIES
1964
1965 A 32bit integer which indicates the device capabilities;
1966 0x00000010 for a normal host which does not forwards.
1967
1968 CONFIG_CDP_VERSION
1969
1970 An ascii string containing the version of the software.
1971
1972 CONFIG_CDP_PLATFORM
1973
1974 An ascii string containing the name of the platform.
1975
1976 CONFIG_CDP_TRIGGER
1977
1978 A 32bit integer sent on the trigger.
1979
1980 CONFIG_CDP_POWER_CONSUMPTION
1981
1982 A 16bit integer containing the power consumption of the
1983 device in .1 of milliwatts.
1984
1985 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1986
1987 A byte containing the id of the VLAN.
1988
Uri Mashiach79267ed2017-01-19 10:51:05 +02001989- Status LED: CONFIG_LED_STATUS
wdenkc6097192002-11-03 00:24:07 +00001990
1991 Several configurations allow to display the current
1992 status using a LED. For instance, the LED will blink
1993 fast while running U-Boot code, stop blinking as
1994 soon as a reply to a BOOTP request was received, and
1995 start blinking slow once the Linux kernel is running
1996 (supported by a status LED driver in the Linux
Uri Mashiach79267ed2017-01-19 10:51:05 +02001997 kernel). Defining CONFIG_LED_STATUS enables this
wdenkc6097192002-11-03 00:24:07 +00001998 feature in U-Boot.
1999
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002000 Additional options:
2001
Uri Mashiach79267ed2017-01-19 10:51:05 +02002002 CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002003 The status LED can be connected to a GPIO pin.
2004 In such cases, the gpio_led driver can be used as a
Uri Mashiach79267ed2017-01-19 10:51:05 +02002005 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002006 to include the gpio_led driver in the U-Boot binary.
2007
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02002008 CONFIG_GPIO_LED_INVERTED_TABLE
2009 Some GPIO connected LEDs may have inverted polarity in which
2010 case the GPIO high value corresponds to LED off state and
2011 GPIO low value corresponds to LED on state.
2012 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2013 with a list of GPIO LEDs that have inverted polarity.
2014
wdenkc6097192002-11-03 00:24:07 +00002015- CAN Support: CONFIG_CAN_DRIVER
2016
2017 Defining CONFIG_CAN_DRIVER enables CAN driver support
2018 on those systems that support this (optional)
2019 feature, like the TQM8xxL modules.
2020
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002021- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00002022
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002023 This enable the NEW i2c subsystem, and will allow you to use
2024 i2c commands at the u-boot command line (as long as you set
2025 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2026 based realtime clock chips or other i2c devices. See
2027 common/cmd_i2c.c for a description of the command line
2028 interface.
2029
2030 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01002031 - drivers/i2c/soft_i2c.c:
2032 - activate first bus with CONFIG_SYS_I2C_SOFT define
2033 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2034 for defining speed and slave address
2035 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2036 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2037 for defining speed and slave address
2038 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2039 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2040 for defining speed and slave address
2041 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2042 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2043 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002044
Heiko Schocher00f792e2012-10-24 13:48:22 +02002045 - drivers/i2c/fsl_i2c.c:
2046 - activate i2c driver with CONFIG_SYS_I2C_FSL
2047 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2048 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2049 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2050 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02002051 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02002052 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2053 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2054 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2055 second bus.
2056
Simon Glass1f2ba722012-10-30 07:28:53 +00002057 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09002058 - activate this driver with CONFIG_SYS_I2C_TEGRA
2059 - This driver adds 4 i2c buses with a fix speed from
2060 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00002061
Dirk Eibach880540d2013-04-25 02:40:01 +00002062 - drivers/i2c/ppc4xx_i2c.c
2063 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2064 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2065 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2066
tremfac96402013-09-21 18:13:35 +02002067 - drivers/i2c/i2c_mxc.c
2068 - activate this driver with CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02002069 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
2070 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
2071 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
2072 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
tremfac96402013-09-21 18:13:35 +02002073 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2074 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2075 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2076 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2077 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2078 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02002079 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
2080 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002081 If those defines are not set, default value is 100000
tremfac96402013-09-21 18:13:35 +02002082 for speed, and 0 for slave.
2083
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09002084 - drivers/i2c/rcar_i2c.c:
2085 - activate this driver with CONFIG_SYS_I2C_RCAR
2086 - This driver adds 4 i2c buses
2087
2088 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2089 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2090 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2091 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2092 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2093 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2094 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2095 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2096 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2097
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002098 - drivers/i2c/sh_i2c.c:
2099 - activate this driver with CONFIG_SYS_I2C_SH
2100 - This driver adds from 2 to 5 i2c buses
2101
2102 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2103 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2104 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2105 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2106 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2107 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2108 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2109 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2110 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2111 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002112 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002113
Heiko Schocher6789e842013-10-22 11:03:18 +02002114 - drivers/i2c/omap24xx_i2c.c
2115 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2116 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2117 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2118 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2119 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2120 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2121 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2122 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2123 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2124 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2125 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2126
Heiko Schocher0bdffe72013-11-08 07:30:53 +01002127 - drivers/i2c/zynq_i2c.c
2128 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2129 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2130 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2131
Naveen Krishna Che717fc62013-12-06 12:12:38 +05302132 - drivers/i2c/s3c24x0_i2c.c:
2133 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2134 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2135 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2136 with a fix speed from 100000 and the slave addr 0!
2137
Dirk Eibachb46226b2014-07-03 09:28:18 +02002138 - drivers/i2c/ihs_i2c.c
2139 - activate this driver with CONFIG_SYS_I2C_IHS
2140 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2141 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2142 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2143 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2144 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2145 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2146 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2147 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2148 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2149 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2150 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2151 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
Dirk Eibach071be892015-10-28 11:46:22 +01002152 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
2153 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
2154 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
2155 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
2156 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
2157 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
2158 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
2159 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
2160 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
Dirk Eibachb46226b2014-07-03 09:28:18 +02002161
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002162 additional defines:
2163
2164 CONFIG_SYS_NUM_I2C_BUSES
Simon Glass945a18e2016-10-02 18:01:05 -06002165 Hold the number of i2c buses you want to use.
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002166
2167 CONFIG_SYS_I2C_DIRECT_BUS
2168 define this, if you don't use i2c muxes on your hardware.
2169 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2170 omit this define.
2171
2172 CONFIG_SYS_I2C_MAX_HOPS
2173 define how many muxes are maximal consecutively connected
2174 on one i2c bus. If you not use i2c muxes, omit this
2175 define.
2176
2177 CONFIG_SYS_I2C_BUSES
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002178 hold a list of buses you want to use, only used if
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002179 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2180 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2181 CONFIG_SYS_NUM_I2C_BUSES = 9:
2182
2183 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2184 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2185 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2186 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2187 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2188 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2189 {1, {I2C_NULL_HOP}}, \
2190 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2191 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2192 }
2193
2194 which defines
2195 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002196 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2197 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2198 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2199 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2200 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002201 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002202 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2203 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002204
2205 If you do not have i2c muxes on your board, omit this define.
2206
Heiko Schocherea818db2013-01-29 08:53:15 +01002207- Legacy I2C Support: CONFIG_HARD_I2C
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002208
2209 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2210 provides the following compelling advantages:
2211
2212 - more than one i2c adapter is usable
2213 - approved multibus support
2214 - better i2c mux support
2215
2216 ** Please consider updating your I2C driver now. **
2217
Heiko Schocherea818db2013-01-29 08:53:15 +01002218 These enable legacy I2C serial bus commands. Defining
2219 CONFIG_HARD_I2C will include the appropriate I2C driver
2220 for the selected CPU.
wdenkc6097192002-11-03 00:24:07 +00002221
wdenk945af8d2003-07-16 21:53:01 +00002222 This will allow you to use i2c commands at the u-boot
Jon Loeliger602ad3b2007-06-11 19:03:39 -05002223 command line (as long as you set CONFIG_CMD_I2C in
wdenkb37c7e52003-06-30 16:24:52 +00002224 CONFIG_COMMANDS) and communicate with i2c based realtime
2225 clock chips. See common/cmd_i2c.c for a description of the
wdenk43d96162003-03-06 00:02:04 +00002226 command line interface.
wdenkc6097192002-11-03 00:24:07 +00002227
Ben Warrenbb99ad62006-09-07 16:50:54 -04002228 CONFIG_HARD_I2C selects a hardware I2C controller.
wdenkc6097192002-11-03 00:24:07 +00002229
wdenk945af8d2003-07-16 21:53:01 +00002230 There are several other quantities that must also be
Heiko Schocherea818db2013-01-29 08:53:15 +01002231 defined when you define CONFIG_HARD_I2C.
wdenkc6097192002-11-03 00:24:07 +00002232
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002233 In both cases you will need to define CONFIG_SYS_I2C_SPEED
wdenk945af8d2003-07-16 21:53:01 +00002234 to be the frequency (in Hz) at which you wish your i2c bus
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002235 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002236 the CPU's i2c node address).
wdenk945af8d2003-07-16 21:53:01 +00002237
Peter Tyser8d321b82010-04-12 22:28:21 -05002238 Now, the u-boot i2c code for the mpc8xx
Stefan Roesea47a12b2010-04-15 16:07:28 +02002239 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
Peter Tyser8d321b82010-04-12 22:28:21 -05002240 and so its address should therefore be cleared to 0 (See,
2241 eg, MPC823e User's Manual p.16-473). So, set
2242 CONFIG_SYS_I2C_SLAVE to 0.
wdenkc6097192002-11-03 00:24:07 +00002243
Eric Millbrandt5da71ef2009-09-03 08:09:44 -05002244 CONFIG_SYS_I2C_INIT_MPC5XXX
2245
2246 When a board is reset during an i2c bus transfer
2247 chips might think that the current transfer is still
2248 in progress. Reset the slave devices by sending start
2249 commands until the slave device responds.
2250
wdenk945af8d2003-07-16 21:53:01 +00002251 That's all that's required for CONFIG_HARD_I2C.
wdenkb37c7e52003-06-30 16:24:52 +00002252
Heiko Schocherea818db2013-01-29 08:53:15 +01002253 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00002254 then the following macros need to be defined (examples are
2255 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00002256
2257 I2C_INIT
2258
wdenkb37c7e52003-06-30 16:24:52 +00002259 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00002260 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00002261
wdenkba56f622004-02-06 23:19:44 +00002262 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00002263
wdenkc6097192002-11-03 00:24:07 +00002264 I2C_PORT
2265
wdenk43d96162003-03-06 00:02:04 +00002266 (Only for MPC8260 CPU). The I/O port to use (the code
2267 assumes both bits are on the same port). Valid values
2268 are 0..3 for ports A..D.
wdenkc6097192002-11-03 00:24:07 +00002269
2270 I2C_ACTIVE
2271
2272 The code necessary to make the I2C data line active
2273 (driven). If the data line is open collector, this
2274 define can be null.
2275
wdenkb37c7e52003-06-30 16:24:52 +00002276 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2277
wdenkc6097192002-11-03 00:24:07 +00002278 I2C_TRISTATE
2279
2280 The code necessary to make the I2C data line tri-stated
2281 (inactive). If the data line is open collector, this
2282 define can be null.
2283
wdenkb37c7e52003-06-30 16:24:52 +00002284 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2285
wdenkc6097192002-11-03 00:24:07 +00002286 I2C_READ
2287
York Sun472d5462013-04-01 11:29:11 -07002288 Code that returns true if the I2C data line is high,
2289 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00002290
wdenkb37c7e52003-06-30 16:24:52 +00002291 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2292
wdenkc6097192002-11-03 00:24:07 +00002293 I2C_SDA(bit)
2294
York Sun472d5462013-04-01 11:29:11 -07002295 If <bit> is true, sets the I2C data line high. If it
2296 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002297
wdenkb37c7e52003-06-30 16:24:52 +00002298 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00002299 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00002300 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00002301
wdenkc6097192002-11-03 00:24:07 +00002302 I2C_SCL(bit)
2303
York Sun472d5462013-04-01 11:29:11 -07002304 If <bit> is true, sets the I2C clock line high. If it
2305 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002306
wdenkb37c7e52003-06-30 16:24:52 +00002307 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00002308 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00002309 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00002310
wdenkc6097192002-11-03 00:24:07 +00002311 I2C_DELAY
2312
2313 This delay is invoked four times per clock cycle so this
2314 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00002315 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00002316 like:
2317
wdenkb37c7e52003-06-30 16:24:52 +00002318 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00002319
Mike Frysinger793b5722010-07-21 13:38:02 -04002320 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2321
2322 If your arch supports the generic GPIO framework (asm/gpio.h),
2323 then you may alternatively define the two GPIOs that are to be
2324 used as SCL / SDA. Any of the previous I2C_xxx macros will
2325 have GPIO-based defaults assigned to them as appropriate.
2326
2327 You should define these to the GPIO value as given directly to
2328 the generic GPIO functions.
2329
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002330 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00002331
wdenk8bde7f72003-06-27 21:31:46 +00002332 When a board is reset during an i2c bus transfer
2333 chips might think that the current transfer is still
2334 in progress. On some boards it is possible to access
2335 the i2c SCLK line directly, either by using the
2336 processor pin as a GPIO or by having a second pin
2337 connected to the bus. If this option is defined a
2338 custom i2c_init_board() routine in boards/xxx/board.c
2339 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00002340
Richard Retanubun26a33502010-04-12 15:08:17 -04002341 CONFIG_SYS_I2C_BOARD_LATE_INIT
2342
2343 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2344 defined a custom i2c_board_late_init() routine in
2345 boards/xxx/board.c is run AFTER the operations in i2c_init()
2346 is completed. This callpoint can be used to unreset i2c bus
2347 using CPU i2c controller register accesses for CPUs whose i2c
2348 controller provide such a method. It is called at the end of
2349 i2c_init() to allow i2c_init operations to setup the i2c bus
2350 controller on the CPU (e.g. setting bus speed & slave address).
2351
wdenk17ea1172004-06-06 21:51:03 +00002352 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2353
2354 This option enables configuration of bi_iic_fast[] flags
2355 in u-boot bd_info structure based on u-boot environment
2356 variable "i2cfast". (see also i2cfast)
2357
Ben Warrenbb99ad62006-09-07 16:50:54 -04002358 CONFIG_I2C_MULTI_BUS
2359
2360 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002361 must have a controller. At any point in time, only one bus is
2362 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04002363 Note that bus numbering is zero-based.
2364
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002365 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04002366
2367 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002368 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05002369 is set, specify a list of bus-device pairs. Otherwise, specify
2370 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04002371
2372 e.g.
2373 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002374 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002375
2376 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2377
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002378 #define CONFIG_I2C_MULTI_BUS
Simon Glass945a18e2016-10-02 18:01:05 -06002379 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002380
2381 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2382
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002383 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06002384
2385 If defined, then this indicates the I2C bus number for DDR SPD.
2386 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2387
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002388 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002389
2390 If defined, then this indicates the I2C bus number for the RTC.
2391 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2392
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002393 CONFIG_SYS_DTT_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002394
2395 If defined, then this indicates the I2C bus number for the DTT.
2396 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2397
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002398 CONFIG_SYS_I2C_DTT_ADDR:
Victor Gallardo9ebbb542008-09-09 15:13:29 -07002399
2400 If defined, specifies the I2C address of the DTT device.
2401 If not defined, then U-Boot uses predefined value for
2402 specified DTT device.
2403
Andrew Dyer2ac69852008-12-29 17:36:01 -06002404 CONFIG_SOFT_I2C_READ_REPEATED_START
2405
2406 defining this will force the i2c_read() function in
2407 the soft_i2c driver to perform an I2C repeated start
2408 between writing the address pointer and reading the
2409 data. If this define is omitted the default behaviour
2410 of doing a stop-start sequence will be used. Most I2C
2411 devices can use either method, but some require one or
2412 the other.
Timur Tabibe5e6182006-11-03 19:15:00 -06002413
wdenkc6097192002-11-03 00:24:07 +00002414- SPI Support: CONFIG_SPI
2415
2416 Enables SPI driver (so far only tested with
2417 SPI EEPROM, also an instance works with Crystal A/D and
2418 D/As on the SACSng board)
2419
Yoshihiro Shimoda66395622011-01-31 16:50:43 +09002420 CONFIG_SH_SPI
2421
2422 Enables the driver for SPI controller on SuperH. Currently
2423 only SH7757 is supported.
2424
wdenkc6097192002-11-03 00:24:07 +00002425 CONFIG_SOFT_SPI
2426
wdenk43d96162003-03-06 00:02:04 +00002427 Enables a software (bit-bang) SPI driver rather than
2428 using hardware support. This is a general purpose
2429 driver that only requires three general I/O port pins
2430 (two outputs, one input) to function. If this is
2431 defined, the board configuration must define several
2432 SPI configuration items (port pins to use, etc). For
2433 an example, see include/configs/sacsng.h.
wdenkc6097192002-11-03 00:24:07 +00002434
Ben Warren04a9e112008-01-16 22:37:35 -05002435 CONFIG_HARD_SPI
2436
2437 Enables a hardware SPI driver for general-purpose reads
2438 and writes. As with CONFIG_SOFT_SPI, the board configuration
2439 must define a list of chip-select function pointers.
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002440 Currently supported on some MPC8xxx processors. For an
Ben Warren04a9e112008-01-16 22:37:35 -05002441 example, see include/configs/mpc8349emds.h.
2442
Guennadi Liakhovetski38254f42008-04-15 14:14:25 +02002443 CONFIG_MXC_SPI
2444
2445 Enables the driver for the SPI controllers on i.MX and MXC
Fabio Estevam2e3cd1c2011-10-28 08:57:46 +00002446 SoCs. Currently i.MX31/35/51 are supported.
Guennadi Liakhovetski38254f42008-04-15 14:14:25 +02002447
Heiko Schocherf659b572014-07-14 10:22:11 +0200