Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef _CONFIG_DB_88F6820_GP_H |
| 8 | #define _CONFIG_DB_88F6820_GP_H |
| 9 | |
| 10 | /* |
| 11 | * High Level Configuration Options (easy to change) |
| 12 | */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 13 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 14 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
| 15 | |
Stefan Roese | 2923c2d | 2015-08-06 14:27:36 +0200 | [diff] [blame] | 16 | /* |
| 17 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed |
| 18 | * for DDR ECC byte filling in the SPL before loading the main |
| 19 | * U-Boot into it. |
| 20 | */ |
| 21 | #define CONFIG_SYS_TEXT_BASE 0x00800000 |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 22 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 23 | |
| 24 | /* |
| 25 | * Commands configuration |
| 26 | */ |
| 27 | #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 28 | #define CONFIG_CMD_CACHE |
| 29 | #define CONFIG_CMD_DHCP |
| 30 | #define CONFIG_CMD_ENV |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 31 | #define CONFIG_CMD_EXT2 |
| 32 | #define CONFIG_CMD_EXT4 |
| 33 | #define CONFIG_CMD_FAT |
| 34 | #define CONFIG_CMD_FS_GENERIC |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 35 | #define CONFIG_CMD_I2C |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 36 | #define CONFIG_CMD_MMC |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 37 | #define CONFIG_CMD_PCI |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 38 | #define CONFIG_CMD_PING |
Stefan Roese | 4d991cb | 2015-06-29 14:58:13 +0200 | [diff] [blame] | 39 | #define CONFIG_CMD_SCSI |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 40 | #define CONFIG_CMD_SF |
| 41 | #define CONFIG_CMD_SPI |
| 42 | #define CONFIG_CMD_TFTPPUT |
| 43 | #define CONFIG_CMD_TIME |
| 44 | |
| 45 | /* I2C */ |
| 46 | #define CONFIG_SYS_I2C |
| 47 | #define CONFIG_SYS_I2C_MVTWSI |
| 48 | #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE |
| 49 | #define CONFIG_SYS_I2C_SLAVE 0x0 |
| 50 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 51 | |
| 52 | /* SPI NOR flash default params, used by sf commands */ |
| 53 | #define CONFIG_SF_DEFAULT_SPEED 1000000 |
| 54 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 55 | |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 56 | /* |
| 57 | * SDIO/MMC Card Configuration |
| 58 | */ |
| 59 | #define CONFIG_MMC |
| 60 | #define CONFIG_MMC_SDMA |
| 61 | #define CONFIG_GENERIC_MMC |
| 62 | #define CONFIG_SDHCI |
| 63 | #define CONFIG_MV_SDHCI |
| 64 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE |
| 65 | |
Stefan Roese | 7cbaff9 | 2015-06-29 14:58:14 +0200 | [diff] [blame] | 66 | /* |
| 67 | * SATA/SCSI/AHCI configuration |
| 68 | */ |
| 69 | #define CONFIG_LIBATA |
| 70 | #define CONFIG_SCSI_AHCI |
| 71 | #define CONFIG_SCSI_AHCI_PLAT |
| 72 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 |
| 73 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 74 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 75 | CONFIG_SYS_SCSI_MAX_LUN) |
| 76 | |
Stefan Roese | e80f1e8 | 2015-06-29 14:58:11 +0200 | [diff] [blame] | 77 | /* Partition support */ |
| 78 | #define CONFIG_DOS_PARTITION |
| 79 | #define CONFIG_EFI_PARTITION |
| 80 | |
| 81 | /* Additional FS support/configuration */ |
| 82 | #define CONFIG_SUPPORT_VFAT |
| 83 | |
Stefan Roese | 5956573 | 2015-06-29 14:58:16 +0200 | [diff] [blame] | 84 | /* USB/EHCI configuration */ |
Stefan Roese | 5956573 | 2015-06-29 14:58:16 +0200 | [diff] [blame] | 85 | #define CONFIG_EHCI_IS_TDI |
| 86 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 87 | /* Environment in SPI NOR flash */ |
| 88 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 89 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ |
| 90 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ |
| 91 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ |
| 92 | |
| 93 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 94 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
| 95 | |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 96 | /* PCIe support */ |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 97 | #ifndef CONFIG_SPL_BUILD |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 98 | #define CONFIG_PCI |
| 99 | #define CONFIG_PCI_MVEBU |
| 100 | #define CONFIG_PCI_PNP |
| 101 | #define CONFIG_PCI_SCAN_SHOW |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 102 | #endif |
Stefan Roese | ce2cb1d | 2015-08-11 12:50:58 +0200 | [diff] [blame] | 103 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 104 | #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ |
| 105 | #define CONFIG_SYS_ALT_MEMTEST |
| 106 | |
Kevin Smith | 3fd38af | 2015-05-18 16:09:46 +0000 | [diff] [blame] | 107 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
| 108 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 109 | "fdt_high=0x10000000\0" \ |
| 110 | "initrd_high=0x10000000\0" |
| 111 | |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 112 | /* SPL */ |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 113 | /* |
| 114 | * Select the boot device here |
| 115 | * |
| 116 | * Currently supported are: |
| 117 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash |
| 118 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) |
| 119 | */ |
| 120 | #define SPL_BOOT_SPI_NOR_FLASH 1 |
| 121 | #define SPL_BOOT_SDIO_MMC_CARD 2 |
| 122 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH |
| 123 | |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 124 | /* Defines for SPL */ |
| 125 | #define CONFIG_SPL_FRAMEWORK |
| 126 | #define CONFIG_SPL_SIZE (140 << 10) |
| 127 | #define CONFIG_SPL_TEXT_BASE 0x40000030 |
| 128 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) |
| 129 | |
| 130 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) |
| 131 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) |
| 132 | |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 133 | #ifdef CONFIG_SPL_BUILD |
| 134 | #define CONFIG_SYS_MALLOC_SIMPLE |
| 135 | #endif |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 136 | |
| 137 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) |
| 138 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) |
| 139 | |
| 140 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 141 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| 142 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 143 | #define CONFIG_SPL_I2C_SUPPORT |
| 144 | |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 145 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 146 | /* SPL related SPI defines */ |
| 147 | #define CONFIG_SPL_SPI_SUPPORT |
| 148 | #define CONFIG_SPL_SPI_FLASH_SUPPORT |
| 149 | #define CONFIG_SPL_SPI_LOAD |
| 150 | #define CONFIG_SPL_SPI_BUS 0 |
| 151 | #define CONFIG_SPL_SPI_CS 0 |
Stefan Roese | 09a54c0 | 2015-11-20 13:51:57 +0100 | [diff] [blame] | 152 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 |
Stefan Roese | 7853c50 | 2015-07-20 11:20:40 +0200 | [diff] [blame] | 153 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
| 154 | #endif |
| 155 | |
| 156 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD |
| 157 | /* SPL related MMC defines */ |
| 158 | #define CONFIG_SPL_MMC_SUPPORT |
| 159 | #define CONFIG_SPL_LIBDISK_SUPPORT |
| 160 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 |
| 161 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) |
| 162 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS |
| 163 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) |
| 164 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */ |
| 165 | #ifdef CONFIG_SPL_BUILD |
| 166 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ |
| 167 | #endif |
| 168 | #endif |
Stefan Roese | 9e30b31 | 2015-03-25 13:35:15 +0100 | [diff] [blame] | 169 | |
Stefan Roese | 2bae75a | 2015-04-25 06:29:56 +0200 | [diff] [blame] | 170 | /* |
| 171 | * mv-common.h should be defined after CMD configs since it used them |
| 172 | * to enable certain macros |
| 173 | */ |
| 174 | #include "mv-common.h" |
| 175 | |
| 176 | #endif /* _CONFIG_DB_88F6820_GP_H */ |