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Andreas Bießmannad7a1782011-06-30 22:03:20 +00001/*
2 * Copyright (C) 2011
3 * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
4 *
5 * Configuration settings for the grasshopper (ICnova AP7000) board
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andreas Bießmannad7a1782011-06-30 22:03:20 +00008 */
9#ifndef __GRASSHOPPER_CONFIG_H
10#define __GRASSHOPPER_CONFIG_H
11
12#include <asm/arch/hardware.h>
13
Andreas Bießmannad7a1782011-06-30 22:03:20 +000014#define CONFIG_AT32AP
15#define CONFIG_AT32AP7000
16
17/*
Andreas Bießmannad7a1782011-06-30 22:03:20 +000018 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
19 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
20 * PLL frequency.
21 * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
22 */
23#define CONFIG_PLL
24#define CONFIG_SYS_POWER_MANAGER
25#define CONFIG_SYS_OSC0_HZ 20000000
26#define CONFIG_SYS_PLL0_DIV 1
27#define CONFIG_SYS_PLL0_MUL 7
28#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
29/*
30 * Set the CPU running at:
31 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
32 */
33#define CONFIG_SYS_CLKDIV_CPU 0
34/*
35 * Set the HSB running at:
36 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
37 */
38#define CONFIG_SYS_CLKDIV_HSB 1
39/*
40 * Set the PBA running at:
41 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
42 */
43#define CONFIG_SYS_CLKDIV_PBA 2
44/*
45 * Set the PBB running at:
46 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
47 */
48#define CONFIG_SYS_CLKDIV_PBB 1
49
50/* Reserve VM regions for SDRAM and NOR flash */
51#define CONFIG_SYS_NR_VM_REGIONS 2
52
53/*
54 * The PLLOPT register controls the PLL like this:
55 * icp = PLLOPT<2>
56 * ivco = PLLOPT<1:0>
57 *
58 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
59 */
60#define CONFIG_SYS_PLL0_OPT 0x04
61
62#define CONFIG_USART_BASE ATMEL_BASE_USART1
63#define CONFIG_USART_ID 1
64
Andreas Bießmann573feec2015-02-06 23:06:49 +010065#define CONFIG_SYS_GENERIC_BOARD
66#define CONFIG_BOARD_EARLY_INIT_F
67#define CONFIG_BOARD_EARLY_INIT_R
68
Andreas Bießmannad7a1782011-06-30 22:03:20 +000069/* User serviceable stuff */
70#define CONFIG_CMDLINE_TAG
71#define CONFIG_SETUP_MEMORY_TAGS
72#define CONFIG_INITRD_TAG
73
74#define CONFIG_STACKSIZE (2048)
75
76#define CONFIG_BAUDRATE 115200
77
78/*
79 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
80 * data on the serial line may interrupt the boot sequence.
81 */
82#define CONFIG_BOOTDELAY 1
83#define CONFIG_AUTOBOOT
84#define CONFIG_AUTOBOOT_KEYED
85#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d" \
86 " seconds\n", bootdelay
87#define CONFIG_AUTOBOOT_DELAY_STR "d"
88#define CONFIG_AUTOBOOT_STOP_STR " "
89
90/*
91 * After booting the board for the first time, new ethernet addresses
92 * should be generated and assigned to the environment variables
93 * "ethaddr". This is normally done during production.
94 */
95#define CONFIG_OVERWRITE_ETHADDR_ONCE
Andreas Bießmannad7a1782011-06-30 22:03:20 +000096
97/*
98 * BOOTP options
99 */
100#define CONFIG_BOOTP_SUBNETMASK
101#define CONFIG_BOOTP_GATEWAY
102
103/*
104 * Command line configuration.
105 */
106#include <config_cmd_default.h>
107
108/* remove unneeded commands */
109#undef CONFIG_CMD_FPGA
110#undef CONFIG_CMD_SETGETDCR
111
112/* add useful commands */
113#define CONFIG_CMD_ASKENV
114#define CONFIG_CMD_DHCP
115#define CONFIG_CMD_JFFS2
116#define CONFIG_CMD_PING
117#define CONFIG_CMD_REGINFO
118
119#define CONFIG_SYS_HUSH_PARSER
120#define CONFIG_AUTO_COMPLETE
Andreas Bießmannad7a1782011-06-30 22:03:20 +0000121#define CONFIG_CMDLINE_EDITING
122
123#define CONFIG_ATMEL_USART
124#define CONFIG_MACB
125#define CONFIG_PORTMUX_PIO
126#define CONFIG_SYS_NR_PIOS 5
127#define CONFIG_SYS_HSDRAMC
128
129#define CONFIG_SYS_DCACHE_LINESZ 32
130#define CONFIG_SYS_ICACHE_LINESZ 32
131
132#define CONFIG_NR_DRAM_BANKS 1
133
134#define CONFIG_SYS_FLASH_CFI
135#define CONFIG_FLASH_CFI_DRIVER
136
137#define CONFIG_SYS_FLASH_BASE 0x00000000
138#define CONFIG_SYS_FLASH_SIZE 0x800000
139#define CONFIG_SYS_MAX_FLASH_BANKS 1
140#define CONFIG_SYS_MAX_FLASH_SECT 135
141
142#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
143#define CONFIG_SYS_TEXT_BASE 0x00000000
144
145#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
146#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
147#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
148
149#define CONFIG_ENV_IS_IN_FLASH
150/* place u-boot env in flash sector after u-boot */
151#define CONFIG_ENV_SIZE 0x10000
152#define CONFIG_ENV_ADDR 0x20000
153
154#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + \
155 CONFIG_SYS_INTRAM_SIZE)
156
157#define CONFIG_SYS_MALLOC_LEN (256*1024)
Andreas Bießmannad7a1782011-06-30 22:03:20 +0000158
159/* Allow 4MB for the kernel run-time image */
160#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
161#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
162
163/* Other configuration settings that shouldn't have to change all that often */
164#define CONFIG_SYS_PROMPT "U-Boot> "
165#define CONFIG_SYS_CBSIZE 256
166#define CONFIG_SYS_MAXARGS 16
167#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
168 sizeof(CONFIG_SYS_PROMPT) + 16)
169#define CONFIG_SYS_LONGHELP
170
171#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
172#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
Andreas Bießmannad7a1782011-06-30 22:03:20 +0000173
174#endif /* __GRASSHOPPER_CONFIG_H */
175/* vim: set ts=8 noet: */