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TsiChungLiew7af77512008-01-14 15:30:15 -06001/*
2 * FlexBus Internal Memory Map
3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __FLEXBUS_H
27#define __FLEXBUS_H
28
29/*********************************************************************
30* FlexBus Chip Selects (FBCS)
31*********************************************************************/
32
33typedef struct fbcs {
TsiChung Liew012522f2008-10-21 10:03:07 +000034 u32 csar0; /* Chip-select Address */
35 u32 csmr0; /* Chip-select Mask */
36 u32 cscr0; /* Chip-select Control */
37 u32 csar1;
38 u32 csmr1;
39 u32 cscr1;
40 u32 csar2;
41 u32 csmr2;
42 u32 cscr2;
43 u32 csar3;
44 u32 csmr3;
45 u32 cscr3;
46 u32 csar4;
47 u32 csmr4;
48 u32 cscr4;
49 u32 csar5;
50 u32 csmr5;
51 u32 cscr5;
52 u32 csar6;
53 u32 csmr6;
54 u32 cscr6;
55 u32 csar7;
56 u32 csmr7;
57 u32 cscr7;
TsiChungLiew7af77512008-01-14 15:30:15 -060058} fbcs_t;
59
TsiChung Liew012522f2008-10-21 10:03:07 +000060#define FBCS_CSAR_BA(x) ((x) & 0xFFFF0000)
TsiChungLiew7af77512008-01-14 15:30:15 -060061
TsiChung Liew012522f2008-10-21 10:03:07 +000062#define FBCS_CSMR_BAM(x) (((x) & 0xFFFF) << 16)
63#define FBCS_CSMR_BAM_MASK (0x0000FFFF)
TsiChungLiew7af77512008-01-14 15:30:15 -060064#define FBCS_CSMR_BAM_4G (0xFFFF0000)
65#define FBCS_CSMR_BAM_2G (0x7FFF0000)
66#define FBCS_CSMR_BAM_1G (0x3FFF0000)
67#define FBCS_CSMR_BAM_1024M (0x3FFF0000)
68#define FBCS_CSMR_BAM_512M (0x1FFF0000)
69#define FBCS_CSMR_BAM_256M (0x0FFF0000)
70#define FBCS_CSMR_BAM_128M (0x07FF0000)
71#define FBCS_CSMR_BAM_64M (0x03FF0000)
72#define FBCS_CSMR_BAM_32M (0x01FF0000)
73#define FBCS_CSMR_BAM_16M (0x00FF0000)
74#define FBCS_CSMR_BAM_8M (0x007F0000)
75#define FBCS_CSMR_BAM_4M (0x003F0000)
76#define FBCS_CSMR_BAM_2M (0x001F0000)
77#define FBCS_CSMR_BAM_1M (0x000F0000)
78#define FBCS_CSMR_BAM_1024K (0x000F0000)
79#define FBCS_CSMR_BAM_512K (0x00070000)
80#define FBCS_CSMR_BAM_256K (0x00030000)
81#define FBCS_CSMR_BAM_128K (0x00010000)
82#define FBCS_CSMR_BAM_64K (0x00000000)
83
TsiChung Liew012522f2008-10-21 10:03:07 +000084#ifdef CONFIG_M5249
85#define FBCS_CSMR_WP (0x00000080)
86#define FBCS_CSMR_AM (0x00000040)
87#define FBCS_CSMR_CI (0x00000020)
88#define FBCS_CSMR_SC (0x00000010)
89#define FBCS_CSMR_SD (0x00000008)
90#define FBCS_CSMR_UC (0x00000004)
91#define FBCS_CSMR_UD (0x00000002)
92#else
93#define FBCS_CSMR_WP (0x00000100)
94#endif
95#define FBCS_CSMR_V (0x00000001) /* Valid bit */
TsiChungLiew7af77512008-01-14 15:30:15 -060096
TsiChung Liew012522f2008-10-21 10:03:07 +000097#define FBCS_CSCR_SWS(x) (((x) & 0x3F) << 26)
98#define FBCS_CSCR_SWS_MASK (0x03FFFFFF)
99#define FBCS_CSCR_SWSEN (0x00800000)
100#define FBCS_CSCR_ASET(x) (((x) & 0x03) << 20)
101#define FBCS_CSCR_ASET_MASK (0xFFCFFFFF)
102#define FBCS_CSCR_RDAH(x) (((x) & 0x03) << 18)
103#define FBCS_CSCR_RDAH_MASK (0xFFF3FFFF)
104#define FBCS_CSCR_WRAH(x) (((x) & 0x03) << 16)
105#define FBCS_CSCR_WRAH_MASK (0xFFFCFFFF)
106#define FBCS_CSCR_WS(x) (((x) & 0x3F) << 10)
107#define FBCS_CSCR_WS_MASK (0xFFFF03FF)
108#define FBCS_CSCR_SBM (0x00000200)
109#define FBCS_CSCR_AA (0x00000100)
110#define FBCS_CSCR_PS(x) (((x) & 0x03) << 6)
111#define FBCS_CSCR_PS_MASK (0xFFFFFF3F)
112#define FBCS_CSCR_BEM (0x00000020)
113#define FBCS_CSCR_BSTR (0x00000010)
114#define FBCS_CSCR_BSTW (0x00000008)
115
TsiChungLiew7af77512008-01-14 15:30:15 -0600116#define FBCS_CSCR_PS_16 (0x00000080)
TsiChung Liew012522f2008-10-21 10:03:07 +0000117#define FBCS_CSCR_PS_8 (0x00000040)
TsiChungLiew7af77512008-01-14 15:30:15 -0600118#define FBCS_CSCR_PS_32 (0x00000000)
119
120#endif /* __FLEXBUS_H */