wdenk | 2d00de4 | 2002-02-11 15:08:44 +0000 | [diff] [blame^] | 1 | #ifndef I2C_H |
| 2 | #define I2C_H |
| 3 | |
| 4 | /**************************************************** |
| 5 | * |
| 6 | * Copyright Motrola 1999 |
| 7 | * |
| 8 | ****************************************************/ |
| 9 | #define get_eumbbar() CFG_EUMB_ADDR |
| 10 | |
| 11 | #define I2CADR 0x00003000 |
| 12 | #define I2CFDR 0x00003004 |
| 13 | #define I2CCR 0x00003008 |
| 14 | #define I2CSR 0x0000300C |
| 15 | #define I2CDR 0x00003010 |
| 16 | |
| 17 | typedef enum _i2cstatus |
| 18 | { |
| 19 | I2CSUCCESS = 0x3000, |
| 20 | I2CADDRESS, |
| 21 | I2CERROR, |
| 22 | I2CBUFFFULL, |
| 23 | I2CBUFFEMPTY, |
| 24 | I2CXMITERROR, |
| 25 | I2CRCVERROR, |
| 26 | I2CBUSBUSY, |
| 27 | I2CALOSS, |
| 28 | I2CNOEVENT, |
| 29 | } I2CStatus; |
| 30 | |
| 31 | typedef enum i2c_control |
| 32 | { |
| 33 | MEN = 0x00000080, |
| 34 | MIEN = 0x00000040, |
| 35 | MSTA = 0x00000020, |
| 36 | MTX = 0x00000010, |
| 37 | TXAK = 0x00000008, |
| 38 | RSTA = 0x00000004, |
| 39 | } I2C_CONTROL; |
| 40 | |
| 41 | typedef enum i2c_status |
| 42 | { |
| 43 | MCF = 0x00000080, |
| 44 | MAAS = 0x00000040, |
| 45 | MBB = 0x00000020, |
| 46 | MAL = 0x00000010, |
| 47 | SRW = 0x00000004, |
| 48 | MIF = 0x00000002, |
| 49 | RXAK = 0x00000001, |
| 50 | } I2C_STATUS; |
| 51 | |
| 52 | typedef struct _i2c_ctrl |
| 53 | { |
| 54 | unsigned int reserved0 : 24; |
| 55 | unsigned int men : 1; |
| 56 | unsigned int mien : 1; |
| 57 | unsigned int msta : 1; |
| 58 | unsigned int mtx : 1; |
| 59 | unsigned int txak : 1; |
| 60 | unsigned int rsta : 1; |
| 61 | unsigned int reserved1 : 2; |
| 62 | } I2C_CTRL; |
| 63 | |
| 64 | typedef struct _i2c_stat |
| 65 | { |
| 66 | unsigned int rsrv0 : 24; |
| 67 | unsigned int mcf : 1; |
| 68 | unsigned int maas : 1; |
| 69 | unsigned int mbb : 1; |
| 70 | unsigned int mal : 1; |
| 71 | unsigned int rsrv1 : 1; |
| 72 | unsigned int srw : 1; |
| 73 | unsigned int mif : 1; |
| 74 | unsigned int rxak : 1; |
| 75 | } I2C_STAT; |
| 76 | |
| 77 | typedef enum _i2c_mode |
| 78 | { |
| 79 | RCV = 0, |
| 80 | XMIT = 1, |
| 81 | } I2C_MODE; |
| 82 | |
| 83 | /******************** App. API ******************** |
| 84 | * The application API is for user level application |
| 85 | * to use the funcitonality provided by I2C driver |
| 86 | * |
| 87 | * Note: Its App.s responsibility to swap the data |
| 88 | * byte. In our API, we just transfer whatever |
| 89 | * we are given |
| 90 | **************************************************/ |
| 91 | /** |
| 92 | * Note: |
| 93 | * |
| 94 | * In all following functions, |
| 95 | * the caller shall pass the configured embedded utility memory |
| 96 | * block base, EUMBBAR. |
| 97 | **/ |
| 98 | |
| 99 | /* Send a buffer of data to the intended rcv_addr. |
| 100 | * If stop_flag is set, after the whole buffer |
| 101 | * is sent, generate a STOP signal provided that the |
| 102 | * receiver doesn't signal the STOP in the middle. |
| 103 | * I2C is the master performing transmitting. If |
| 104 | * no STOP signal is generated at the end of current |
| 105 | * transaction, the master can generate a START signal |
| 106 | * to another slave addr. |
| 107 | * |
| 108 | * return I2CSUCCESS if no error. |
| 109 | */ |
| 110 | static I2CStatus I2C_put( unsigned int eumbbar, |
| 111 | unsigned char rcv_addr, /* receiver's address */ |
| 112 | unsigned char *buffer_ptr, /* pointer of data to be sent */ |
| 113 | unsigned int length, /* number of byte of in the buffer */ |
| 114 | unsigned int stop_flag, /* 1 - signal STOP when buffer is empty |
| 115 | * 0 - no STOP signal when buffer is empty |
| 116 | */ |
| 117 | unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB |
| 118 | * 0 - this is a new start, check MBB |
| 119 | */ |
| 120 | |
| 121 | /* Receive a buffer of data from the desired sender_addr |
| 122 | * If stop_flag is set, when the buffer is full and the |
| 123 | * sender does not signal STOP, generate a STOP signal. |
| 124 | * I2C is the master performing receiving. If no STOP signal |
| 125 | * is generated, the master can generate a START signal |
| 126 | * to another slave addr. |
| 127 | * |
| 128 | * return I2CSUCCESS if no error. |
| 129 | */ |
| 130 | static I2CStatus I2C_get( unsigned int eumbbar, |
| 131 | unsigned char sender_addr, /* sender's address */ |
| 132 | unsigned char *buffer_ptr, /* pointer of receiving buffer */ |
| 133 | unsigned int length, /* length of the receiving buffer */ |
| 134 | unsigned int stop_flag, /* 1 - signal STOP when buffer is full |
| 135 | * 0 - no STOP signal when buffer is full |
| 136 | */ |
| 137 | unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB |
| 138 | * 0 - this is a new start, check MBB |
| 139 | */ |
| 140 | |
| 141 | #if 0 /* the I2C_write and I2C_read functions are not active */ |
| 142 | /* Send a buffer of data to the requiring master. |
| 143 | * If stop_flag is set, after the whole buffer is sent, |
| 144 | * generate a STOP signal provided that the requiring |
| 145 | * receiver doesn't signal the STOP in the middle. |
| 146 | * I2C is the slave performing transmitting. |
| 147 | * |
| 148 | * return I2CSUCCESS if no error. |
| 149 | * |
| 150 | * Note: due to the Kahlua design, slave transmitter |
| 151 | * shall not signal STOP since there is no way |
| 152 | * for master to detect it, causing I2C bus hung. |
| 153 | * |
| 154 | * For the above reason, the stop_flag is always |
| 155 | * set, i.e., 1. |
| 156 | * |
| 157 | * programmer shall use the timer on Kahlua to |
| 158 | * control the interval of data byte at the |
| 159 | * master side. |
| 160 | */ |
| 161 | static I2CStatus I2C_write( unsigned int eumbbar, |
| 162 | unsigned char *buffer_ptr, /* pointer of data to be sent */ |
| 163 | unsigned int length, /* number of byte of in the buffer */ |
| 164 | unsigned int stop_flag ); /* 1 - signal STOP when buffer is empty |
| 165 | * 0 - no STOP signal when buffer is empty |
| 166 | */ |
| 167 | |
| 168 | /* Receive a buffer of data from the sending master. |
| 169 | * If stop_flag is set, when the buffer is full and the |
| 170 | * sender does not signal STOP, generate a STOP signal. |
| 171 | * I2C is the slave performing receiving. |
| 172 | * |
| 173 | * return I2CSUCCESS if no error. |
| 174 | */ |
| 175 | static I2CStatus I2C_read(unsigned int eumbbar, |
| 176 | unsigned char *buffer_ptr, /* pointer of receiving buffer */ |
| 177 | unsigned int length, /* length of the receiving buffer */ |
| 178 | unsigned int stop_flag ); /* 1 - signal STOP when buffer is full |
| 179 | * 0 - no STOP signal when buffer is full |
| 180 | */ |
| 181 | #endif /* of if0 for turning off I2C_read & I2C_write */ |
| 182 | |
| 183 | /* if interrupt is not used, this is the timer event handler. |
| 184 | * After each fixed time interval, this function can be called |
| 185 | * to check the I2C status and call appropriate function to |
| 186 | * handle the status event. |
| 187 | */ |
| 188 | static I2CStatus I2C_Timer_Event( unsigned int eumbbar, I2CStatus (*handler)( unsigned int ) ); |
| 189 | |
| 190 | /********************* Kernel API ************************ |
| 191 | * Kernel APIs are functions I2C driver provides to the |
| 192 | * O.S. |
| 193 | *********************************************************/ |
| 194 | |
| 195 | /******************* device I/O function ***************/ |
| 196 | |
| 197 | /* Generate a START signal in the desired mode. |
| 198 | * I2C is the master. |
| 199 | * |
| 200 | * return I2CSUCCESS if no error. |
| 201 | * I2CERROR if i2c unit is not enabled. |
| 202 | * I2CBUSBUSY if bus cannot be granted |
| 203 | */ |
| 204 | static I2CStatus I2C_Start( unsigned int eumbbar, |
| 205 | unsigned char slave_addr, /* address of the receiver */ |
| 206 | I2C_MODE mode, /* XMIT(1) - put (write) |
| 207 | * RCV(0) - get (read) |
| 208 | */ |
| 209 | unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB |
| 210 | * 0 - this is a new start, check MBB |
| 211 | */ |
| 212 | |
| 213 | /* Generate a STOP signal to terminate the transaction. */ |
| 214 | static I2CStatus I2C_Stop( unsigned int eumbbar ); |
| 215 | |
| 216 | /* Do a one-byte master transmit. |
| 217 | * |
| 218 | * return I2CBUFFEMPTY if this is the last byte. |
| 219 | * Otherwise return I2CSUCCESS |
| 220 | */ |
| 221 | static I2CStatus I2C_Master_Xmit( unsigned int eumbbar ); |
| 222 | |
| 223 | /* Do a one-byte master receive. |
| 224 | * |
| 225 | * return I2CBUFFFULL if this is the last byte. |
| 226 | * Otherwise return I2CSUCCESS |
| 227 | */ |
| 228 | static I2CStatus I2C_Master_Rcv( unsigned int eumbbar ); |
| 229 | |
| 230 | /* Do a one-byte slave transmit. |
| 231 | * |
| 232 | * return I2CBUFFEMPTY if this is the last byte. |
| 233 | * Otherwise return I2CSUCCESS |
| 234 | * |
| 235 | */ |
| 236 | static I2CStatus I2C_Slave_Xmit( unsigned int eumbbar ); |
| 237 | |
| 238 | /* Do a one-byte slave receive. |
| 239 | * |
| 240 | * return I2CBUFFFULL if this is the last byte. |
| 241 | * Otherwise return I2CSUCCESS |
| 242 | */ |
| 243 | static I2CStatus I2C_Slave_Rcv( unsigned int eumbbar ); |
| 244 | |
| 245 | /* Process slave address phase. |
| 246 | * |
| 247 | * return I2CADDRESS if this is slave receiver's address phase |
| 248 | * Otherwise return the result of slave xmit one byte. |
| 249 | */ |
| 250 | static I2CStatus I2C_Slave_Addr( unsigned int eumbbar ); |
| 251 | |
| 252 | /******************* Device Control Fucntion ****************/ |
| 253 | /* Initialize I2C unit with desired frequency divider, |
| 254 | * driver's slave address w/o interrupt enabled. |
| 255 | * |
| 256 | * This function must be called before I2C unit can |
| 257 | * be used. |
| 258 | */ |
| 259 | static I2CStatus I2C_Init( unsigned int eumbbar, |
| 260 | unsigned char fdr, /* frequency divider */ |
| 261 | unsigned char addr, /* driver's address used for receiving */ |
| 262 | unsigned int en_int); /* 1 - enable I2C interrupt |
| 263 | * 0 - disable I2C interrup |
| 264 | */ |
| 265 | |
| 266 | /* I2C interrupt service routine. |
| 267 | * |
| 268 | * return I2CADDRESS if it is receiver's (either master or slave) address phase. |
| 269 | * return the result of xmit or receive one byte |
| 270 | */ |
| 271 | static I2CStatus I2C_ISR(unsigned int eumbbar ); |
| 272 | |
| 273 | /* Set I2C Status, i.e., write to I2CSR */ |
| 274 | static void I2C_Set_Stat( unsigned int eumbbar, I2C_STAT stat ); |
| 275 | |
| 276 | /* Query I2C Status, i.e., read I2CSR */ |
| 277 | static I2C_STAT I2C_Get_Stat( unsigned int eumbbar ); |
| 278 | |
| 279 | /* Change I2C Control bits, i.e., write to I2CCR */ |
| 280 | static void I2C_Set_Ctrl( unsigned int eumbbar, I2C_CTRL ); /* new control value */ |
| 281 | |
| 282 | /* Query I2C Control bits, i.e., read I2CCR */ |
| 283 | static I2C_CTRL I2C_Get_Ctrl( unsigned int eumbbar ); |
| 284 | |
| 285 | /* This function performs the work for I2C_do_transaction. The work is |
| 286 | * split into this function to enable I2C_do_transaction to first transmit |
| 287 | * the data address to the I2C slave device without putting the data address |
| 288 | * into the first byte of the buffer. |
| 289 | * |
| 290 | * en_int controls interrupt/polling mode |
| 291 | * act is the type of transaction |
| 292 | * i2c_addr is the I2C address of the slave device |
| 293 | * len is the length of data to send or receive |
| 294 | * buffer is the address of the data buffer |
| 295 | * stop = I2C_NO_STOP, don't signal STOP at end of transaction |
| 296 | * I2C_STOP, signal STOP at end of transaction |
| 297 | * retry is the timeout retry value, currently ignored |
| 298 | * rsta = I2C_NO_RESTART, this is not continuation of existing transaction |
| 299 | * I2C_RESTART, this is a continuation of existing transaction |
| 300 | */ |
| 301 | static I2C_Status I2C_do_buffer( I2C_INTERRUPT_MODE en_int, |
| 302 | I2C_TRANSACTION_MODE act, |
| 303 | unsigned char i2c_addr, |
| 304 | int len, |
| 305 | unsigned char *buffer, |
| 306 | I2C_STOP_MODE stop, |
| 307 | int retry, |
| 308 | I2C_RESTART_MODE rsta); |
| 309 | #endif |