Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 8 | #include <dm/lists.h> |
| 9 | #include <dm/device-internal.h> |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 10 | #include <dm/root.h> |
Zakharov Vlad | a5acafb | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 11 | #include <clk.h> |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 12 | #include <errno.h> |
| 13 | #include <timer.h> |
| 14 | |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 15 | DECLARE_GLOBAL_DATA_PTR; |
| 16 | |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 17 | /* |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 18 | * Implement a timer uclass to work with lib/time.c. The timer is usually |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 19 | * a 32/64 bits free-running up counter. The get_rate() method is used to get |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 20 | * the input clock frequency of the timer. The get_count() method is used |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 21 | * to get the current 64 bits count value. If the hardware is counting down, |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 22 | * the value should be inversed inside the method. There may be no real |
| 23 | * tick, and no timer interrupt. |
| 24 | */ |
| 25 | |
Simon Glass | 4f05182 | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 26 | int notrace timer_get_count(struct udevice *dev, u64 *count) |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 27 | { |
| 28 | const struct timer_ops *ops = device_get_ops(dev); |
| 29 | |
| 30 | if (!ops->get_count) |
| 31 | return -ENOSYS; |
| 32 | |
| 33 | return ops->get_count(dev, count); |
| 34 | } |
| 35 | |
Simon Glass | 4f05182 | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 36 | unsigned long notrace timer_get_rate(struct udevice *dev) |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 37 | { |
Simon Glass | 4f05182 | 2016-02-24 09:14:48 -0700 | [diff] [blame] | 38 | struct timer_dev_priv *uc_priv = dev->uclass_priv; |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 39 | |
| 40 | return uc_priv->clock_rate; |
| 41 | } |
| 42 | |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 43 | static int timer_pre_probe(struct udevice *dev) |
| 44 | { |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 45 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 46 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
Zakharov Vlad | a5acafb | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 47 | struct clk timer_clk; |
| 48 | int err; |
| 49 | ulong ret; |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 50 | |
Zakharov Vlad | a5acafb | 2016-12-09 17:18:32 +0300 | [diff] [blame] | 51 | err = clk_get_by_index(dev, 0, &timer_clk); |
| 52 | if (!err) { |
| 53 | ret = clk_get_rate(&timer_clk); |
| 54 | if (IS_ERR_VALUE(ret)) |
| 55 | return ret; |
| 56 | uc_priv->clock_rate = ret; |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 57 | } else { |
| 58 | uc_priv->clock_rate = |
| 59 | dev_read_u32_default(dev, "clock-frequency", 0); |
| 60 | } |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 61 | #endif |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
Stephen Warren | 0a7edce | 2016-01-06 10:33:03 -0700 | [diff] [blame] | 66 | static int timer_post_probe(struct udevice *dev) |
| 67 | { |
| 68 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
| 69 | |
| 70 | if (!uc_priv->clock_rate) |
| 71 | return -EINVAL; |
| 72 | |
| 73 | return 0; |
| 74 | } |
| 75 | |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 76 | u64 timer_conv_64(u32 count) |
| 77 | { |
| 78 | /* increment tbh if tbl has rolled over */ |
| 79 | if (count < gd->timebase_l) |
| 80 | gd->timebase_h++; |
| 81 | gd->timebase_l = count; |
| 82 | return ((u64)gd->timebase_h << 32) | gd->timebase_l; |
| 83 | } |
| 84 | |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 85 | int notrace dm_timer_init(void) |
| 86 | { |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 87 | struct udevice *dev = NULL; |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 88 | __maybe_unused ofnode node; |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 89 | int ret; |
| 90 | |
| 91 | if (gd->timer) |
| 92 | return 0; |
| 93 | |
Philipp Tomsich | af82315 | 2017-09-11 22:04:11 +0200 | [diff] [blame] | 94 | /* |
| 95 | * Directly access gd->dm_root to suppress error messages, if the |
| 96 | * virtual root driver does not yet exist. |
| 97 | */ |
| 98 | if (gd->dm_root == NULL) |
| 99 | return -EAGAIN; |
| 100 | |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 101 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 102 | /* Check for a chosen timer to be used for tick */ |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 103 | node = ofnode_get_chosen_node("tick-timer"); |
| 104 | |
| 105 | if (ofnode_valid(node) && |
| 106 | uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { |
| 107 | /* |
| 108 | * If the timer is not marked to be bound before |
| 109 | * relocation, bind it anyway. |
| 110 | */ |
Bin Meng | 8d773c4 | 2018-10-10 22:06:58 -0700 | [diff] [blame] | 111 | if (!lists_bind_fdt(dm_root(), node, &dev, false)) { |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 112 | ret = device_probe(dev); |
| 113 | if (ret) |
| 114 | return ret; |
| 115 | } |
| 116 | } |
Philipp Tomsich | b1a1600 | 2017-07-28 17:19:58 +0200 | [diff] [blame] | 117 | #endif |
Philipp Tomsich | b61e8b0 | 2017-09-11 22:04:10 +0200 | [diff] [blame] | 118 | |
| 119 | if (!dev) { |
| 120 | /* Fall back to the first available timer */ |
Simon Glass | 3f603cb | 2016-02-11 13:23:26 -0700 | [diff] [blame] | 121 | ret = uclass_first_device_err(UCLASS_TIMER, &dev); |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 122 | if (ret) |
| 123 | return ret; |
Mugunthan V N | c833697 | 2016-01-16 21:33:58 +0530 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | if (dev) { |
| 127 | gd->timer = dev; |
| 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | return -ENODEV; |
| 132 | } |
| 133 | |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 134 | UCLASS_DRIVER(timer) = { |
| 135 | .id = UCLASS_TIMER, |
| 136 | .name = "timer", |
Bin Meng | 579eb5a | 2015-11-13 00:11:15 -0800 | [diff] [blame] | 137 | .pre_probe = timer_pre_probe, |
Mugunthan V N | a5d8011 | 2015-12-24 16:08:06 +0530 | [diff] [blame] | 138 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
Stephen Warren | 0a7edce | 2016-01-06 10:33:03 -0700 | [diff] [blame] | 139 | .post_probe = timer_post_probe, |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 140 | .per_device_auto_alloc_size = sizeof(struct timer_dev_priv), |
| 141 | }; |