blob: b2129adf2fec76da8cc0072583da09cbe645f636 [file] [log] [blame]
Simon Glassb5a5b352011-11-28 15:04:38 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this
4 * project.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
Allen Martin00a27492012-08-31 08:30:00 +000022/* Tegra20 high-level function multiplexing */
Simon Glassb5a5b352011-11-28 15:04:38 +000023#include <common.h>
24#include <asm/arch/clock.h>
Simon Glass2faf1862012-01-11 12:42:23 +000025#include <asm/arch/funcmux.h>
Simon Glassb5a5b352011-11-28 15:04:38 +000026#include <asm/arch/pinmux.h>
27
28int funcmux_select(enum periph_id id, int config)
29{
Simon Glass2faf1862012-01-11 12:42:23 +000030 int bad_config = config != FUNCMUX_DEFAULT;
Simon Glassd6939692012-01-11 12:42:22 +000031
Simon Glassb5a5b352011-11-28 15:04:38 +000032 switch (id) {
33 case PERIPH_ID_UART1:
Stephen Warrenb9607e72012-05-14 13:13:45 +000034 switch (config) {
35 case FUNCMUX_UART1_IRRX_IRTX:
Simon Glassd6939692012-01-11 12:42:22 +000036 pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
37 pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
38 pinmux_tristate_disable(PINGRP_IRRX);
39 pinmux_tristate_disable(PINGRP_IRTX);
Stephen Warrenb9607e72012-05-14 13:13:45 +000040 break;
41 case FUNCMUX_UART1_UAA_UAB:
42 pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
43 pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
44 pinmux_tristate_disable(PINGRP_UAA);
45 pinmux_tristate_disable(PINGRP_UAB);
46 bad_config = 0;
47 break;
Stephen Warrene21649b2012-05-16 05:59:59 +000048 case FUNCMUX_UART1_GPU:
49 pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA);
50 pinmux_tristate_disable(PINGRP_GPU);
51 bad_config = 0;
52 break;
Lucas Stacha2cfe632012-05-16 08:21:02 +000053 case FUNCMUX_UART1_SDIO1:
54 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA);
55 pinmux_tristate_disable(PINGRP_SDIO1);
56 bad_config = 0;
57 break;
Stephen Warrenb9607e72012-05-14 13:13:45 +000058 }
59 if (!bad_config) {
Simon Glassd6939692012-01-11 12:42:22 +000060 /*
61 * Tegra appears to boot with function UARTA pre-
62 * selected on mux group SDB. If two mux groups are
63 * both set to the same function, it's unclear which
64 * group's pins drive the RX signals into the HW.
65 * For UARTA, SDB certainly overrides group IRTX in
66 * practice. To solve this, configure some alternative
67 * function on SDB to avoid the conflict. Also, tri-
68 * state the group to avoid driving any signal onto it
69 * until we know what's connected.
70 */
71 pinmux_tristate_enable(PINGRP_SDB);
72 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
73 }
Simon Glassb5a5b352011-11-28 15:04:38 +000074 break;
75
76 case PERIPH_ID_UART2:
Simon Glass2faf1862012-01-11 12:42:23 +000077 if (config == FUNCMUX_UART2_IRDA) {
Simon Glassd6939692012-01-11 12:42:22 +000078 pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
79 pinmux_tristate_disable(PINGRP_UAD);
80 }
Simon Glassb5a5b352011-11-28 15:04:38 +000081 break;
82
83 case PERIPH_ID_UART4:
Simon Glass2faf1862012-01-11 12:42:23 +000084 if (config == FUNCMUX_UART4_GMC) {
Simon Glassd6939692012-01-11 12:42:22 +000085 pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
86 pinmux_tristate_disable(PINGRP_GMC);
87 }
Simon Glassb5a5b352011-11-28 15:04:38 +000088 break;
89
Simon Glass8a1133c2012-01-11 12:42:24 +000090 case PERIPH_ID_DVC_I2C:
91 /* there is only one selection, pinmux_config is ignored */
92 if (config == FUNCMUX_DVC_I2CP) {
93 pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C);
94 pinmux_tristate_disable(PINGRP_I2CP);
95 }
96 break;
97
98 case PERIPH_ID_I2C1:
99 /* support pinmux_config of 0 for now, */
100 if (config == FUNCMUX_I2C1_RM) {
101 pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C);
102 pinmux_tristate_disable(PINGRP_RM);
103 }
104 break;
105 case PERIPH_ID_I2C2: /* I2C2 */
106 switch (config) {
107 case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */
108 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2);
109 /* PTA to HDMI */
110 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI);
111 pinmux_tristate_disable(PINGRP_DDC);
112 break;
113 case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */
114 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2);
115 /* set DDC_SEL to RSVDx (RSVD2 works for now) */
116 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2);
117 pinmux_tristate_disable(PINGRP_PTA);
118 bad_config = 0;
119 break;
120 }
121 break;
122 case PERIPH_ID_I2C3: /* I2C3 */
123 /* support pinmux_config of 0 for now */
124 if (config == FUNCMUX_I2C3_DTF) {
125 pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3);
126 pinmux_tristate_disable(PINGRP_DTF);
127 }
128 break;
129
Stephen Warrend1e46072012-05-16 13:54:06 +0000130 case PERIPH_ID_SDMMC1:
131 if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) {
132 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
133 pinmux_tristate_disable(PINGRP_SDIO1);
134 }
135 break;
136
Simon Glasscf06b132012-01-11 12:42:25 +0000137 case PERIPH_ID_SDMMC2:
138 if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
139 pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
140 pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
141
142 pinmux_tristate_disable(PINGRP_DTA);
143 pinmux_tristate_disable(PINGRP_DTD);
144 }
145 break;
146
147 case PERIPH_ID_SDMMC3:
148 switch (config) {
149 case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
150 pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
151 pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
152 pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
153 pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
154
155 pinmux_tristate_disable(PINGRP_SLXA);
156 pinmux_tristate_disable(PINGRP_SLXC);
157 pinmux_tristate_disable(PINGRP_SLXD);
158 pinmux_tristate_disable(PINGRP_SLXK);
159 /* fall through */
160
161 case FUNCMUX_SDMMC3_SDB_4BIT:
162 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
163 pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
164 pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
165
166 pinmux_tristate_disable(PINGRP_SDB);
167 pinmux_tristate_disable(PINGRP_SDC);
168 pinmux_tristate_disable(PINGRP_SDD);
169 bad_config = 0;
170 break;
171 }
172 break;
173
174 case PERIPH_ID_SDMMC4:
175 switch (config) {
176 case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
177 pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
178 pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
179
180 pinmux_tristate_disable(PINGRP_ATC);
181 pinmux_tristate_disable(PINGRP_ATD);
182 break;
183
184 case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
185 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
186 pinmux_tristate_disable(PINGRP_GME);
187 /* fall through */
188
189 case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
190 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
191 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
192
193 pinmux_tristate_disable(PINGRP_ATB);
194 pinmux_tristate_disable(PINGRP_GMA);
195 bad_config = 0;
196 break;
197 }
198 break;
199
Simon Glass7e91f402012-04-17 09:01:32 +0000200 case PERIPH_ID_KBC:
201 if (config == FUNCMUX_DEFAULT) {
202 enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB,
203 PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE,
204 PINGRP_KBCF};
205 int i;
206
207 for (i = 0; i < ARRAY_SIZE(grp); i++) {
208 pinmux_tristate_disable(grp[i]);
209 pinmux_set_func(grp[i], PMUX_FUNC_KBC);
210 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
211 }
Simon Glass7e91f402012-04-17 09:01:32 +0000212 }
Lucas Stachf97daaa2012-05-31 01:51:01 +0000213 break;
214
215 case PERIPH_ID_USB2:
216 if (config == FUNCMUX_USB2_ULPI) {
217 pinmux_set_func(PINGRP_UAA, PMUX_FUNC_ULPI);
218 pinmux_set_func(PINGRP_UAB, PMUX_FUNC_ULPI);
219 pinmux_set_func(PINGRP_UDA, PMUX_FUNC_ULPI);
220
221 pinmux_tristate_disable(PINGRP_UAA);
222 pinmux_tristate_disable(PINGRP_UAB);
223 pinmux_tristate_disable(PINGRP_UDA);
224 }
225 break;
Simon Glass7e91f402012-04-17 09:01:32 +0000226
Stephen Warrena016e142012-06-12 08:33:39 +0000227 case PERIPH_ID_SPI1:
228 if (config == FUNCMUX_SPI1_GMC_GMD) {
229 pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
230 pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH);
231
232 pinmux_tristate_disable(PINGRP_GMC);
233 pinmux_tristate_disable(PINGRP_GMD);
234 }
235 break;
236
Simon Glass35e11322012-07-29 20:53:26 +0000237 case PERIPH_ID_NDFLASH:
238 if (config == FUNCMUX_NDFLASH_ATC) {
239 pinmux_set_func(PINGRP_ATC, PMUX_FUNC_NAND);
240 pinmux_tristate_disable(PINGRP_ATC);
241 }
242 break;
243
Simon Glassb5a5b352011-11-28 15:04:38 +0000244 default:
245 debug("%s: invalid periph_id %d", __func__, id);
246 return -1;
247 }
248
Simon Glassd6939692012-01-11 12:42:22 +0000249 if (bad_config) {
250 debug("%s: invalid config %d for periph_id %d", __func__,
251 config, id);
252 return -1;
253 }
254
Simon Glassb5a5b352011-11-28 15:04:38 +0000255 return 0;
256}