Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Daniel Engström, Omicron Ceti AB, daniel@omicron.se. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/interrupt.h> |
| 26 | |
| 27 | asm (".globl exp_return\n" |
| 28 | "exp_return:\n" |
| 29 | " addl $12, %esp\n" |
| 30 | " pop %esp\n" |
| 31 | " popa\n" |
| 32 | " iret\n"); |
| 33 | |
| 34 | char exception_stack[4096]; |
| 35 | |
| 36 | /* |
| 37 | * For detailed description of each exception, refer to: |
| 38 | * Intel® 64 and IA-32 Architectures Software Developer's Manual |
| 39 | * Volume 1: Basic Architecture |
| 40 | * Order Number: 253665-029US, November 2008 |
| 41 | * Table 6-1. Exceptions and Interrupts |
| 42 | */ |
| 43 | DECLARE_EXCEPTION(0, divide_error_entry); |
| 44 | DECLARE_EXCEPTION(1, debug_entry); |
| 45 | DECLARE_EXCEPTION(2, nmi_interrupt_entry); |
| 46 | DECLARE_EXCEPTION(3, breakpoint_entry); |
| 47 | DECLARE_EXCEPTION(4, overflow_entry); |
| 48 | DECLARE_EXCEPTION(5, bound_range_exceeded_entry); |
| 49 | DECLARE_EXCEPTION(6, invalid_opcode_entry); |
| 50 | DECLARE_EXCEPTION(7, device_not_available_entry); |
| 51 | DECLARE_EXCEPTION(8, double_fault_entry); |
| 52 | DECLARE_EXCEPTION(9, coprocessor_segment_overrun_entry); |
| 53 | DECLARE_EXCEPTION(10, invalid_tss_entry); |
| 54 | DECLARE_EXCEPTION(11, segment_not_present_entry); |
| 55 | DECLARE_EXCEPTION(12, stack_segment_fault_entry); |
| 56 | DECLARE_EXCEPTION(13, general_protection_entry); |
| 57 | DECLARE_EXCEPTION(14, page_fault_entry); |
| 58 | DECLARE_EXCEPTION(15, reserved_exception_entry); |
| 59 | DECLARE_EXCEPTION(16, floating_point_error_entry); |
| 60 | DECLARE_EXCEPTION(17, alignment_check_entry); |
| 61 | DECLARE_EXCEPTION(18, machine_check_entry); |
| 62 | DECLARE_EXCEPTION(19, simd_floating_point_exception_entry); |
| 63 | DECLARE_EXCEPTION(20, reserved_exception_entry); |
| 64 | DECLARE_EXCEPTION(21, reserved_exception_entry); |
| 65 | DECLARE_EXCEPTION(22, reserved_exception_entry); |
| 66 | DECLARE_EXCEPTION(23, reserved_exception_entry); |
| 67 | DECLARE_EXCEPTION(24, reserved_exception_entry); |
| 68 | DECLARE_EXCEPTION(25, reserved_exception_entry); |
| 69 | DECLARE_EXCEPTION(26, reserved_exception_entry); |
| 70 | DECLARE_EXCEPTION(27, reserved_exception_entry); |
| 71 | DECLARE_EXCEPTION(28, reserved_exception_entry); |
| 72 | DECLARE_EXCEPTION(29, reserved_exception_entry); |
| 73 | DECLARE_EXCEPTION(30, reserved_exception_entry); |
| 74 | DECLARE_EXCEPTION(31, reserved_exception_entry); |
| 75 | |
| 76 | __isr__ reserved_exception_entry(int cause, int ip, int seg) |
| 77 | { |
| 78 | printf("Reserved Exception %d at %04x:%08x\n", cause, seg, ip); |
| 79 | } |
| 80 | |
| 81 | __isr__ divide_error_entry(int cause, int ip, int seg) |
| 82 | { |
| 83 | printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip); |
| 84 | while(1); |
| 85 | } |
| 86 | |
| 87 | __isr__ debug_entry(int cause, int ip, int seg) |
| 88 | { |
| 89 | printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip); |
| 90 | } |
| 91 | |
| 92 | __isr__ nmi_interrupt_entry(int cause, int ip, int seg) |
| 93 | { |
| 94 | printf("NMI Interrupt at %04x:%08x\n", seg, ip); |
| 95 | } |
| 96 | |
| 97 | __isr__ breakpoint_entry(int cause, int ip, int seg) |
| 98 | { |
| 99 | printf("Breakpoint at %04x:%08x\n", seg, ip); |
| 100 | } |
| 101 | |
| 102 | __isr__ overflow_entry(int cause, int ip, int seg) |
| 103 | { |
| 104 | printf("Overflow at %04x:%08x\n", seg, ip); |
| 105 | while(1); |
| 106 | } |
| 107 | |
| 108 | __isr__ bound_range_exceeded_entry(int cause, int ip, int seg) |
| 109 | { |
| 110 | printf("BOUND Range Exceeded at %04x:%08x\n", seg, ip); |
| 111 | while(1); |
| 112 | } |
| 113 | |
| 114 | __isr__ invalid_opcode_entry(int cause, int ip, int seg) |
| 115 | { |
| 116 | printf("Invalid Opcode (UnDefined Opcode) at %04x:%08x\n", seg, ip); |
| 117 | while(1); |
| 118 | } |
| 119 | |
| 120 | __isr__ device_not_available_entry(int cause, int ip, int seg) |
| 121 | { |
| 122 | printf("Device Not Available (No Math Coprocessor) at %04x:%08x\n", seg, ip); |
| 123 | while(1); |
| 124 | } |
| 125 | |
| 126 | __isr__ double_fault_entry(int cause, int ip, int seg) |
| 127 | { |
| 128 | printf("Double fault at %04x:%08x\n", seg, ip); |
| 129 | while(1); |
| 130 | } |
| 131 | |
| 132 | __isr__ coprocessor_segment_overrun_entry(int cause, int ip, int seg) |
| 133 | { |
| 134 | printf("Co-processor segment overrun at %04x:%08x\n", seg, ip); |
| 135 | while(1); |
| 136 | } |
| 137 | |
| 138 | __isr__ invalid_tss_entry(int cause, int ip, int seg) |
| 139 | { |
| 140 | printf("Invalid TSS at %04x:%08x\n", seg, ip); |
| 141 | } |
| 142 | |
| 143 | __isr__ segment_not_present_entry(int cause, int ip, int seg) |
| 144 | { |
| 145 | printf("Segment Not Present at %04x:%08x\n", seg, ip); |
| 146 | while(1); |
| 147 | } |
| 148 | |
| 149 | __isr__ stack_segment_fault_entry(int cause, int ip, int seg) |
| 150 | { |
| 151 | printf("Stack Segment Fault at %04x:%08x\n", seg, ip); |
| 152 | while(1); |
| 153 | } |
| 154 | |
| 155 | __isr__ general_protection_entry(int cause, int ip, int seg) |
| 156 | { |
| 157 | printf("General Protection at %04x:%08x\n", seg, ip); |
| 158 | } |
| 159 | |
| 160 | __isr__ page_fault_entry(int cause, int ip, int seg) |
| 161 | { |
| 162 | printf("Page fault at %04x:%08x\n", seg, ip); |
| 163 | while(1); |
| 164 | } |
| 165 | |
| 166 | __isr__ floating_point_error_entry(int cause, int ip, int seg) |
| 167 | { |
| 168 | printf("Floating-Point Error (Math Fault) at %04x:%08x\n", seg, ip); |
| 169 | } |
| 170 | |
| 171 | __isr__ alignment_check_entry(int cause, int ip, int seg) |
| 172 | { |
| 173 | printf("Alignment check at %04x:%08x\n", seg, ip); |
| 174 | } |
| 175 | |
| 176 | __isr__ machine_check_entry(int cause, int ip, int seg) |
| 177 | { |
| 178 | printf("Machine Check at %04x:%08x\n", seg, ip); |
| 179 | } |
| 180 | |
| 181 | __isr__ simd_floating_point_exception_entry(int cause, int ip, int seg) |
| 182 | { |
| 183 | printf("SIMD Floating-Point Exception at %04x:%08x\n", seg, ip); |
| 184 | } |
| 185 | |
| 186 | int cpu_init_exceptions(void) |
| 187 | { |
| 188 | /* Just in case... */ |
| 189 | disable_interrupts(); |
| 190 | |
| 191 | /* Setup exceptions */ |
| 192 | set_vector(0x00, exp_0); |
| 193 | set_vector(0x01, exp_1); |
| 194 | set_vector(0x02, exp_2); |
| 195 | set_vector(0x03, exp_3); |
| 196 | set_vector(0x04, exp_4); |
| 197 | set_vector(0x05, exp_5); |
| 198 | set_vector(0x06, exp_6); |
| 199 | set_vector(0x07, exp_7); |
| 200 | set_vector(0x08, exp_8); |
| 201 | set_vector(0x09, exp_9); |
| 202 | set_vector(0x0a, exp_10); |
| 203 | set_vector(0x0b, exp_11); |
| 204 | set_vector(0x0c, exp_12); |
| 205 | set_vector(0x0d, exp_13); |
| 206 | set_vector(0x0e, exp_14); |
| 207 | set_vector(0x0f, exp_15); |
| 208 | set_vector(0x10, exp_16); |
| 209 | set_vector(0x11, exp_17); |
| 210 | set_vector(0x12, exp_18); |
| 211 | set_vector(0x13, exp_19); |
| 212 | set_vector(0x14, exp_20); |
| 213 | set_vector(0x15, exp_21); |
| 214 | set_vector(0x16, exp_22); |
| 215 | set_vector(0x17, exp_23); |
| 216 | set_vector(0x18, exp_24); |
| 217 | set_vector(0x19, exp_25); |
| 218 | set_vector(0x1a, exp_26); |
| 219 | set_vector(0x1b, exp_27); |
| 220 | set_vector(0x1c, exp_28); |
| 221 | set_vector(0x1d, exp_29); |
| 222 | set_vector(0x1e, exp_30); |
| 223 | set_vector(0x1f, exp_31); |
| 224 | |
| 225 | /* It is now safe to enable interrupts */ |
| 226 | enable_interrupts(); |
| 227 | |
| 228 | return 0; |
| 229 | } |