blob: 8d47f379554ea245d9e397b13daf5adb1ae49021 [file] [log] [blame]
wdenk756f5862005-04-03 15:51:42 +00001/*
2 * (C) Copyright 2004
3 * Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
4 *
5 * (C) Copyright 2000
6 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
wdenk756f5862005-04-03 15:51:42 +00009 */
10
11#include <common.h>
12#include <mpc824x.h>
13#include <pci.h>
Ben Warren0b252f52008-08-31 21:41:08 -070014#include <netdev.h>
wdenk756f5862005-04-03 15:51:42 +000015
16int checkboard (void)
17{
18 /*TODO: Check processor type */
19
20 puts ( "Board: Hidden Dragon "
21#ifdef CONFIG_MPC8240
22 "8240"
23#endif
24#ifdef CONFIG_MPC8245
25 "8245"
26#endif
27 " ##Test not implemented yet##\n");
28 /* TODO: Implement board test */
29 return 0;
30}
31
Becky Bruce9973e3c2008-06-09 16:03:40 -050032phys_size_t initdram (int board_type)
wdenk756f5862005-04-03 15:51:42 +000033{
34 long size;
35 long new_bank0_end;
36 long mear1;
37 long emear1;
38
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039 size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
wdenk756f5862005-04-03 15:51:42 +000040
41 new_bank0_end = size - 1;
42 mear1 = mpc824x_mpc107_getreg(MEAR1);
43 emear1 = mpc824x_mpc107_getreg(EMEAR1);
44 mear1 = (mear1 & 0xFFFFFF00) |
45 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
46 emear1 = (emear1 & 0xFFFFFF00) |
47 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
48 mpc824x_mpc107_setreg(MEAR1, mear1);
49 mpc824x_mpc107_setreg(EMEAR1, emear1);
50
51 return (size);
52}
53
54/*
55 * Initialize PCI Devices, report devices found.
56 */
57#ifndef CONFIG_PCI_PNP
58static struct pci_config_table pci_hidden_dragon_config_table[] = {
59 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
60 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
61 PCI_ENET0_MEMADDR,
62 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
63 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
64 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
65 PCI_ENET1_MEMADDR,
66 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
67 { }
68};
69#endif
70
71struct pci_controller hose = {
72#ifndef CONFIG_PCI_PNP
73 config_table: pci_hidden_dragon_config_table,
74#endif
75};
76
77void pci_init_board(void)
78{
79 pci_mpc824x_init(&hose);
80}
Ben Warren0b252f52008-08-31 21:41:08 -070081
82int board_eth_init(bd_t *bis)
83{
84 return pci_eth_init(bis);
85}