wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | # |
Wolfgang Denk | eca3aeb | 2013-06-21 10:22:36 +0200 | [diff] [blame] | 2 | # (C) Copyright 2000 - 2013 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 3 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | # |
Wolfgang Denk | eca3aeb | 2013-06-21 10:22:36 +0200 | [diff] [blame] | 5 | # SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | # |
| 7 | |
| 8 | Summary: |
| 9 | ======== |
| 10 | |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 11 | This directory contains the source code for U-Boot, a boot loader for |
wdenk | e86e5a0 | 2004-10-17 21:12:06 +0000 | [diff] [blame] | 12 | Embedded boards based on PowerPC, ARM, MIPS and several other |
| 13 | processors, which can be installed in a boot ROM and used to |
| 14 | initialize and test the hardware or to download and run application |
| 15 | code. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 16 | |
| 17 | The development of U-Boot is closely related to Linux: some parts of |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 18 | the source code originate in the Linux source tree, we have some |
| 19 | header files in common, and special provision has been made to |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 20 | support booting of Linux images. |
| 21 | |
| 22 | Some attention has been paid to make this software easily |
| 23 | configurable and extendable. For instance, all monitor commands are |
| 24 | implemented with the same call interface, so that it's very easy to |
| 25 | add new commands. Also, instead of permanently adding rarely used |
| 26 | code (for instance hardware test utilities) to the monitor, you can |
| 27 | load and run it dynamically. |
| 28 | |
| 29 | |
| 30 | Status: |
| 31 | ======= |
| 32 | |
| 33 | In general, all boards for which a configuration option exists in the |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 34 | Makefile have been tested to some extent and can be considered |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 35 | "working". In fact, many of them are used in production systems. |
| 36 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 37 | In case of problems see the CHANGELOG file to find out who contributed |
| 38 | the specific port. In addition, there are various MAINTAINERS files |
| 39 | scattered throughout the U-Boot source identifying the people or |
| 40 | companies responsible for various boards and subsystems. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 41 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 42 | Note: As of August, 2010, there is no longer a CHANGELOG file in the |
| 43 | actual U-Boot source tree; however, it can be created dynamically |
| 44 | from the Git log using: |
Robert P. J. Day | adb9d85 | 2012-11-14 02:03:20 +0000 | [diff] [blame] | 45 | |
| 46 | make CHANGELOG |
| 47 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 48 | |
| 49 | Where to get help: |
| 50 | ================== |
| 51 | |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 52 | In case you have questions about, problems with or contributions for |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 53 | U-Boot, you should send a message to the U-Boot mailing list at |
Peter Tyser | 0c32565 | 2008-09-10 09:18:34 -0500 | [diff] [blame] | 54 | <u-boot@lists.denx.de>. There is also an archive of previous traffic |
| 55 | on the mailing list - please search the archive before asking FAQ's. |
| 56 | Please see http://lists.denx.de/pipermail/u-boot and |
| 57 | http://dir.gmane.org/gmane.comp.boot-loaders.u-boot |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 58 | |
| 59 | |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 60 | Where to get source code: |
| 61 | ========================= |
| 62 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 63 | The U-Boot source code is maintained in the Git repository at |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 64 | git://www.denx.de/git/u-boot.git ; you can browse it online at |
| 65 | http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary |
| 66 | |
| 67 | The "snapshot" links on this page allow you to download tarballs of |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 68 | any version you might be interested in. Official releases are also |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 69 | available for FTP download from the ftp://ftp.denx.de/pub/u-boot/ |
| 70 | directory. |
| 71 | |
Anatolij Gustschin | d4ee711 | 2008-03-26 18:13:33 +0100 | [diff] [blame] | 72 | Pre-built (and tested) images are available from |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 73 | ftp://ftp.denx.de/pub/u-boot/images/ |
| 74 | |
| 75 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 76 | Where we come from: |
| 77 | =================== |
| 78 | |
| 79 | - start from 8xxrom sources |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 80 | - create PPCBoot project (http://sourceforge.net/projects/ppcboot) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 81 | - clean up code |
| 82 | - make it easier to add custom boards |
| 83 | - make it possible to add other [PowerPC] CPUs |
| 84 | - extend functions, especially: |
| 85 | * Provide extended interface to Linux boot loader |
| 86 | * S-Record download |
| 87 | * network boot |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 88 | * PCMCIA / CompactFlash / ATA disk / SCSI ... boot |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 89 | - create ARMBoot project (http://sourceforge.net/projects/armboot) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 90 | - add other CPU families (starting with ARM) |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 91 | - create U-Boot project (http://sourceforge.net/projects/u-boot) |
Magnus Lilja | 0d28f34 | 2008-08-06 19:32:33 +0200 | [diff] [blame] | 92 | - current project page: see http://www.denx.de/wiki/U-Boot |
wdenk | 24ee89b | 2002-11-03 17:56:27 +0000 | [diff] [blame] | 93 | |
| 94 | |
| 95 | Names and Spelling: |
| 96 | =================== |
| 97 | |
| 98 | The "official" name of this project is "Das U-Boot". The spelling |
| 99 | "U-Boot" shall be used in all written text (documentation, comments |
| 100 | in source files etc.). Example: |
| 101 | |
| 102 | This is the README file for the U-Boot project. |
| 103 | |
| 104 | File names etc. shall be based on the string "u-boot". Examples: |
| 105 | |
| 106 | include/asm-ppc/u-boot.h |
| 107 | |
| 108 | #include <asm/u-boot.h> |
| 109 | |
| 110 | Variable names, preprocessor constants etc. shall be either based on |
| 111 | the string "u_boot" or on "U_BOOT". Example: |
| 112 | |
| 113 | U_BOOT_VERSION u_boot_logo |
| 114 | IH_OS_U_BOOT u_boot_hush_start |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 115 | |
| 116 | |
wdenk | 93f19cc | 2002-12-17 17:55:09 +0000 | [diff] [blame] | 117 | Versioning: |
| 118 | =========== |
| 119 | |
Thomas Weber | 360d883 | 2010-09-28 08:06:25 +0200 | [diff] [blame] | 120 | Starting with the release in October 2008, the names of the releases |
| 121 | were changed from numerical release numbers without deeper meaning |
| 122 | into a time stamp based numbering. Regular releases are identified by |
| 123 | names consisting of the calendar year and month of the release date. |
| 124 | Additional fields (if present) indicate release candidates or bug fix |
| 125 | releases in "stable" maintenance trees. |
wdenk | 93f19cc | 2002-12-17 17:55:09 +0000 | [diff] [blame] | 126 | |
Thomas Weber | 360d883 | 2010-09-28 08:06:25 +0200 | [diff] [blame] | 127 | Examples: |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 128 | U-Boot v2009.11 - Release November 2009 |
Thomas Weber | 360d883 | 2010-09-28 08:06:25 +0200 | [diff] [blame] | 129 | U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree |
| 130 | U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release |
wdenk | 93f19cc | 2002-12-17 17:55:09 +0000 | [diff] [blame] | 131 | |
| 132 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 133 | Directory Hierarchy: |
| 134 | ==================== |
| 135 | |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 136 | /arch Architecture specific files |
Masahiro Yamada | 6eae68e | 2014-03-07 18:02:02 +0900 | [diff] [blame] | 137 | /arc Files generic to ARC architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 138 | /arm Files generic to ARM architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 139 | /avr32 Files generic to AVR32 architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 140 | /blackfin Files generic to Analog Devices Blackfin architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 141 | /m68k Files generic to m68k architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 142 | /microblaze Files generic to microblaze architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 143 | /mips Files generic to MIPS architecture |
Macpaul Lin | afc1ce8 | 2011-10-19 20:41:11 +0000 | [diff] [blame] | 144 | /nds32 Files generic to NDS32 architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 145 | /nios2 Files generic to Altera NIOS2 architecture |
Robert P. J. Day | 33c7731 | 2013-09-15 18:34:15 -0400 | [diff] [blame] | 146 | /openrisc Files generic to OpenRISC architecture |
Stefan Roese | a47a12b | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 147 | /powerpc Files generic to PowerPC architecture |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 148 | /sandbox Files generic to HW-independent "sandbox" |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 149 | /sh Files generic to SH architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 150 | /sparc Files generic to SPARC architecture |
Robert P. J. Day | 33c7731 | 2013-09-15 18:34:15 -0400 | [diff] [blame] | 151 | /x86 Files generic to x86 architecture |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 152 | /api Machine/arch independent API for external apps |
| 153 | /board Board dependent files |
Xu Ziyuan | 740f7e5 | 2016-08-26 19:54:49 +0800 | [diff] [blame] | 154 | /cmd U-Boot commands functions |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 155 | /common Misc architecture independent functions |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 156 | /configs Board default configuration files |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 157 | /disk Code for disk drive partition handling |
| 158 | /doc Documentation (don't expect too much) |
| 159 | /drivers Commonly used device drivers |
Robert P. J. Day | 33c7731 | 2013-09-15 18:34:15 -0400 | [diff] [blame] | 160 | /dts Contains Makefile for building internal U-Boot fdt. |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 161 | /examples Example code for standalone applications, etc. |
| 162 | /fs Filesystem code (cramfs, ext2, jffs2, etc.) |
| 163 | /include Header Files |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 164 | /lib Library routines generic to all architectures |
| 165 | /Licenses Various license files |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 166 | /net Networking code |
| 167 | /post Power On Self Test |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 168 | /scripts Various build scripts and Makefiles |
| 169 | /test Various unit test files |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 170 | /tools Tools to build S-Record or U-Boot images, etc. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 171 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 172 | Software Configuration: |
| 173 | ======================= |
| 174 | |
| 175 | Configuration is usually done using C preprocessor defines; the |
| 176 | rationale behind that is to avoid dead code whenever possible. |
| 177 | |
| 178 | There are two classes of configuration variables: |
| 179 | |
| 180 | * Configuration _OPTIONS_: |
| 181 | These are selectable by the user and have names beginning with |
| 182 | "CONFIG_". |
| 183 | |
| 184 | * Configuration _SETTINGS_: |
| 185 | These depend on the hardware etc. and should not be meddled with if |
| 186 | you don't know what you're doing; they have names beginning with |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 187 | "CONFIG_SYS_". |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 188 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 189 | Previously, all configuration was done by hand, which involved creating |
| 190 | symbolic links and editing configuration files manually. More recently, |
| 191 | U-Boot has added the Kbuild infrastructure used by the Linux kernel, |
| 192 | allowing you to use the "make menuconfig" command to configure your |
| 193 | build. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 194 | |
| 195 | |
| 196 | Selection of Processor Architecture and Board Type: |
| 197 | --------------------------------------------------- |
| 198 | |
| 199 | For all supported boards there are ready-to-use default |
Holger Freyther | ab584d6 | 2014-08-04 09:26:05 +0200 | [diff] [blame] | 200 | configurations available; just type "make <board_name>_defconfig". |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 201 | |
| 202 | Example: For a TQM823L module type: |
| 203 | |
| 204 | cd u-boot |
Holger Freyther | ab584d6 | 2014-08-04 09:26:05 +0200 | [diff] [blame] | 205 | make TQM823L_defconfig |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 206 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 207 | Note: If you're looking for the default configuration file for a board |
| 208 | you're sure used to be there but is now missing, check the file |
| 209 | doc/README.scrapyard for a list of no longer supported boards. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 210 | |
Simon Glass | 75b3c3a | 2014-03-22 17:12:59 -0600 | [diff] [blame] | 211 | Sandbox Environment: |
| 212 | -------------------- |
| 213 | |
| 214 | U-Boot can be built natively to run on a Linux host using the 'sandbox' |
| 215 | board. This allows feature development which is not board- or architecture- |
| 216 | specific to be undertaken on a native platform. The sandbox is also used to |
| 217 | run some of U-Boot's tests. |
| 218 | |
Jagannadha Sutradharudu Teki | 6b1978f | 2014-08-31 21:19:43 +0530 | [diff] [blame] | 219 | See board/sandbox/README.sandbox for more details. |
Simon Glass | 75b3c3a | 2014-03-22 17:12:59 -0600 | [diff] [blame] | 220 | |
| 221 | |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 222 | Board Initialisation Flow: |
| 223 | -------------------------- |
| 224 | |
| 225 | This is the intended start-up flow for boards. This should apply for both |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 226 | SPL and U-Boot proper (i.e. they both follow the same rules). |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 227 | |
Robert P. J. Day | 7207b36 | 2015-12-19 07:16:10 -0500 | [diff] [blame] | 228 | Note: "SPL" stands for "Secondary Program Loader," which is explained in |
| 229 | more detail later in this file. |
| 230 | |
| 231 | At present, SPL mostly uses a separate code path, but the function names |
| 232 | and roles of each function are the same. Some boards or architectures |
| 233 | may not conform to this. At least most ARM boards which use |
| 234 | CONFIG_SPL_FRAMEWORK conform to this. |
| 235 | |
| 236 | Execution typically starts with an architecture-specific (and possibly |
| 237 | CPU-specific) start.S file, such as: |
| 238 | |
| 239 | - arch/arm/cpu/armv7/start.S |
| 240 | - arch/powerpc/cpu/mpc83xx/start.S |
| 241 | - arch/mips/cpu/start.S |
| 242 | |
| 243 | and so on. From there, three functions are called; the purpose and |
| 244 | limitations of each of these functions are described below. |
Simon Glass | db91035 | 2015-03-03 08:03:00 -0700 | [diff] [blame] | 245 | |
| 246 | lowlevel_init(): |
| 247 | - purpose: essential init to permit execution to reach board_init_f() |
| 248 | - no global_data or BSS |
| 249 | - there is no stack (ARMv7 may have one but it will soon be removed) |
| 250 | - must not set up SDRAM or use console |
| 251 | - must only do the bare minimum to allow execution to continue to |
| 252 | board_init_f() |
| 253 | - this is almost never needed |
| 254 | - return normally from this function |
| 255 | |
| 256 | board_init_f(): |
| 257 | - purpose: set up the machine ready for running board_init_r(): |
| 258 | i.e. SDRAM and serial UART |
| 259 | - global_data is available |
| 260 | - stack is in SRAM |
| 261 | - BSS is not available, so you cannot use global/static variables, |
| 262 | only stack variables and global_data |
| 263 | |
| 264 | Non-SPL-specific notes: |
| 265 | - dram_init() is called to set up DRAM. If already done in SPL this |
| 266 | can do nothing |
| 267 | |
| 268 | SPL-specific notes: |
| 269 | - you can override the entire board_init_f() function with your own |
| 270 | version as needed. |
| 271 | - preloader_console_init() can be called here in extremis |
| 272 | - should set up SDRAM, and anything needed to make the UART work |
| 273 | - these is no need to clear BSS, it will be done by crt0.S |
| 274 | - must return normally from this function (don't call board_init_r() |
| 275 | directly) |
| 276 | |
| 277 | Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at |
| 278 | this point the stack and global_data are relocated to below |
| 279 | CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of |
| 280 | memory. |
| 281 | |
| 282 | board_init_r(): |
| 283 | - purpose: main execution, common code |
| 284 | - global_data is available |
| 285 | - SDRAM is available |
| 286 | - BSS is available, all static/global variables can be used |
| 287 | - execution eventually continues to main_loop() |
| 288 | |
| 289 | Non-SPL-specific notes: |
| 290 | - U-Boot is relocated to the top of memory and is now running from |
| 291 | there. |
| 292 | |
| 293 | SPL-specific notes: |
| 294 | - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and |
| 295 | CONFIG_SPL_STACK_R_ADDR points into SDRAM |
| 296 | - preloader_console_init() can be called here - typically this is |
| 297 | done by defining CONFIG_SPL_BOARD_INIT and then supplying a |
| 298 | spl_board_init() function containing this call |
| 299 | - loads U-Boot or (in falcon mode) Linux |
| 300 | |
| 301 | |
| 302 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 303 | Configuration Options: |
| 304 | ---------------------- |
| 305 | |
| 306 | Configuration depends on the combination of board and CPU type; all |
| 307 | such information is kept in a configuration file |
| 308 | "include/configs/<board_name>.h". |
| 309 | |
| 310 | Example: For a TQM823L module, all configuration settings are in |
| 311 | "include/configs/TQM823L.h". |
| 312 | |
| 313 | |
wdenk | 7f6c2cb | 2002-11-10 22:06:23 +0000 | [diff] [blame] | 314 | Many of the options are named exactly as the corresponding Linux |
| 315 | kernel configuration options. The intention is to make it easier to |
| 316 | build a config tool - later. |
| 317 | |
| 318 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 319 | The following options need to be configured: |
| 320 | |
Kim Phillips | 2628114 | 2007-08-10 13:28:25 -0500 | [diff] [blame] | 321 | - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 322 | |
Kim Phillips | 2628114 | 2007-08-10 13:28:25 -0500 | [diff] [blame] | 323 | - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. |
Wolfgang Denk | 6ccec44 | 2006-10-24 14:42:37 +0200 | [diff] [blame] | 324 | |
| 325 | - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) |
Haavard Skinnemoen | 09ea0de | 2007-11-01 12:44:20 +0100 | [diff] [blame] | 326 | Define exactly one, e.g. CONFIG_ATSTK1002 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 327 | |
Lei Wen | cf946c6 | 2011-02-09 18:06:58 +0530 | [diff] [blame] | 328 | - Marvell Family Member |
| 329 | CONFIG_SYS_MVFS - define it if you want to enable |
| 330 | multiple fs option at one time |
| 331 | for marvell soc family |
| 332 | |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 333 | - 8xx CPU Options: (if using an MPC8xx CPU) |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 334 | CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if |
| 335 | get_gclk_freq() cannot work |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 336 | e.g. if there is no 32KHz |
| 337 | reference PIT/RTC clock |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 338 | CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK |
| 339 | or XTAL/EXTAL) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 340 | |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 341 | - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU): |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 342 | CONFIG_SYS_8xx_CPUCLK_MIN |
| 343 | CONFIG_SYS_8xx_CPUCLK_MAX |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 344 | CONFIG_8xx_CPUCLK_DEFAULT |
wdenk | 75d1ea7 | 2004-01-31 20:06:54 +0000 | [diff] [blame] | 345 | See doc/README.MPC866 |
| 346 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 347 | CONFIG_SYS_MEASURE_CPUCLK |
wdenk | 75d1ea7 | 2004-01-31 20:06:54 +0000 | [diff] [blame] | 348 | |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 349 | Define this to measure the actual CPU clock instead |
| 350 | of relying on the correctness of the configured |
| 351 | values. Mostly useful for board bringup to make sure |
| 352 | the PLL is locked at the intended frequency. Note |
| 353 | that this requires a (stable) reference clock (32 kHz |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 354 | RTC clock or CONFIG_SYS_8XX_XIN) |
wdenk | 75d1ea7 | 2004-01-31 20:06:54 +0000 | [diff] [blame] | 355 | |
Heiko Schocher | 506f391 | 2009-03-12 07:37:15 +0100 | [diff] [blame] | 356 | CONFIG_SYS_DELAYED_ICACHE |
| 357 | |
| 358 | Define this option if you want to enable the |
| 359 | ICache only when Code runs from RAM. |
| 360 | |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 361 | - 85xx CPU Options: |
York Sun | ffd06e0 | 2012-10-08 07:44:30 +0000 | [diff] [blame] | 362 | CONFIG_SYS_PPC64 |
| 363 | |
| 364 | Specifies that the core is a 64-bit PowerPC implementation (implements |
| 365 | the "64" category of the Power ISA). This is necessary for ePAPR |
| 366 | compliance, among other possible reasons. |
| 367 | |
Kumar Gala | 66412c6 | 2011-02-18 05:40:54 -0600 | [diff] [blame] | 368 | CONFIG_SYS_FSL_TBCLK_DIV |
| 369 | |
| 370 | Defines the core time base clock divider ratio compared to the |
| 371 | system clock. On most PQ3 devices this is 8, on newer QorIQ |
| 372 | devices it can be 16 or 32. The ratio varies from SoC to Soc. |
| 373 | |
Kumar Gala | 8f29084 | 2011-05-20 00:39:21 -0500 | [diff] [blame] | 374 | CONFIG_SYS_FSL_PCIE_COMPAT |
| 375 | |
| 376 | Defines the string to utilize when trying to match PCIe device |
| 377 | tree nodes for the given platform. |
| 378 | |
Prabhakar Kushwaha | afa6b55 | 2012-04-29 23:56:13 +0000 | [diff] [blame] | 379 | CONFIG_SYS_PPC_E500_DEBUG_TLB |
| 380 | |
| 381 | Enables a temporary TLB entry to be used during boot to work |
| 382 | around limitations in e500v1 and e500v2 external debugger |
| 383 | support. This reduces the portions of the boot code where |
| 384 | breakpoints and single stepping do not work. The value of this |
| 385 | symbol should be set to the TLB1 entry to be used for this |
| 386 | purpose. |
| 387 | |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 388 | CONFIG_SYS_FSL_ERRATUM_A004510 |
| 389 | |
| 390 | Enables a workaround for erratum A004510. If set, |
| 391 | then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and |
| 392 | CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set. |
| 393 | |
| 394 | CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV |
| 395 | CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional) |
| 396 | |
| 397 | Defines one or two SoC revisions (low 8 bits of SVR) |
| 398 | for which the A004510 workaround should be applied. |
| 399 | |
| 400 | The rest of SVR is either not relevant to the decision |
| 401 | of whether the erratum is present (e.g. p2040 versus |
| 402 | p2041) or is implied by the build target, which controls |
| 403 | whether CONFIG_SYS_FSL_ERRATUM_A004510 is set. |
| 404 | |
| 405 | See Freescale App Note 4493 for more information about |
| 406 | this erratum. |
| 407 | |
Prabhakar Kushwaha | 74fa22e | 2013-04-16 13:27:44 +0530 | [diff] [blame] | 408 | CONFIG_A003399_NOR_WORKAROUND |
| 409 | Enables a workaround for IFC erratum A003399. It is only |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 410 | required during NOR boot. |
Prabhakar Kushwaha | 74fa22e | 2013-04-16 13:27:44 +0530 | [diff] [blame] | 411 | |
Prabhakar Kushwaha | 9f074e6 | 2014-10-29 22:33:09 +0530 | [diff] [blame] | 412 | CONFIG_A008044_WORKAROUND |
| 413 | Enables a workaround for T1040/T1042 erratum A008044. It is only |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 414 | required during NAND boot and valid for Rev 1.0 SoC revision |
Prabhakar Kushwaha | 9f074e6 | 2014-10-29 22:33:09 +0530 | [diff] [blame] | 415 | |
Scott Wood | 33eee33 | 2012-08-14 10:14:53 +0000 | [diff] [blame] | 416 | CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY |
| 417 | |
| 418 | This is the value to write into CCSR offset 0x18600 |
| 419 | according to the A004510 workaround. |
| 420 | |
Priyanka Jain | 64501c6 | 2013-07-02 09:21:04 +0530 | [diff] [blame] | 421 | CONFIG_SYS_FSL_DSP_DDR_ADDR |
| 422 | This value denotes start offset of DDR memory which is |
| 423 | connected exclusively to the DSP cores. |
| 424 | |
Priyanka Jain | 765b0bd | 2013-04-04 09:31:54 +0530 | [diff] [blame] | 425 | CONFIG_SYS_FSL_DSP_M2_RAM_ADDR |
| 426 | This value denotes start offset of M2 memory |
| 427 | which is directly connected to the DSP core. |
| 428 | |
Priyanka Jain | 64501c6 | 2013-07-02 09:21:04 +0530 | [diff] [blame] | 429 | CONFIG_SYS_FSL_DSP_M3_RAM_ADDR |
| 430 | This value denotes start offset of M3 memory which is directly |
| 431 | connected to the DSP core. |
| 432 | |
Priyanka Jain | 765b0bd | 2013-04-04 09:31:54 +0530 | [diff] [blame] | 433 | CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT |
| 434 | This value denotes start offset of DSP CCSR space. |
| 435 | |
Priyanka Jain | b135991 | 2013-12-17 14:25:52 +0530 | [diff] [blame] | 436 | CONFIG_SYS_FSL_SINGLE_SOURCE_CLK |
| 437 | Single Source Clock is clocking mode present in some of FSL SoC's. |
| 438 | In this mode, a single differential clock is used to supply |
| 439 | clocks to the sysclock, ddrclock and usbclock. |
| 440 | |
Aneesh Bansal | fb4a240 | 2014-03-18 23:40:26 +0530 | [diff] [blame] | 441 | CONFIG_SYS_CPC_REINIT_F |
| 442 | This CONFIG is defined when the CPC is configured as SRAM at the |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 443 | time of U-Boot entry and is required to be re-initialized. |
Aneesh Bansal | fb4a240 | 2014-03-18 23:40:26 +0530 | [diff] [blame] | 444 | |
Tang Yuantian | aade200 | 2014-04-17 15:33:46 +0800 | [diff] [blame] | 445 | CONFIG_DEEP_SLEEP |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 446 | Indicates this SoC supports deep sleep feature. If deep sleep is |
Tang Yuantian | aade200 | 2014-04-17 15:33:46 +0800 | [diff] [blame] | 447 | supported, core will start to execute uboot when wakes up. |
| 448 | |
Daniel Schwierzeck | 6cb461b | 2012-04-02 02:57:56 +0000 | [diff] [blame] | 449 | - Generic CPU options: |
York Sun | 2a1680e | 2014-05-02 17:28:04 -0700 | [diff] [blame] | 450 | CONFIG_SYS_GENERIC_GLOBAL_DATA |
| 451 | Defines global data is initialized in generic board board_init_f(). |
| 452 | If this macro is defined, global data is created and cleared in |
| 453 | generic board board_init_f(). Without this macro, architecture/board |
| 454 | should initialize global data before calling board_init_f(). |
| 455 | |
Daniel Schwierzeck | 6cb461b | 2012-04-02 02:57:56 +0000 | [diff] [blame] | 456 | CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN |
| 457 | |
| 458 | Defines the endianess of the CPU. Implementation of those |
| 459 | values is arch specific. |
| 460 | |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 461 | CONFIG_SYS_FSL_DDR |
| 462 | Freescale DDR driver in use. This type of DDR controller is |
| 463 | found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core |
| 464 | SoCs. |
| 465 | |
| 466 | CONFIG_SYS_FSL_DDR_ADDR |
| 467 | Freescale DDR memory-mapped register base. |
| 468 | |
| 469 | CONFIG_SYS_FSL_DDR_EMU |
| 470 | Specify emulator support for DDR. Some DDR features such as |
| 471 | deskew training are not available. |
| 472 | |
| 473 | CONFIG_SYS_FSL_DDRC_GEN1 |
| 474 | Freescale DDR1 controller. |
| 475 | |
| 476 | CONFIG_SYS_FSL_DDRC_GEN2 |
| 477 | Freescale DDR2 controller. |
| 478 | |
| 479 | CONFIG_SYS_FSL_DDRC_GEN3 |
| 480 | Freescale DDR3 controller. |
| 481 | |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 482 | CONFIG_SYS_FSL_DDRC_GEN4 |
| 483 | Freescale DDR4 controller. |
| 484 | |
York Sun | 9ac4ffb | 2013-09-30 14:20:51 -0700 | [diff] [blame] | 485 | CONFIG_SYS_FSL_DDRC_ARM_GEN3 |
| 486 | Freescale DDR3 controller for ARM-based SoCs. |
| 487 | |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 488 | CONFIG_SYS_FSL_DDR1 |
| 489 | Board config to use DDR1. It can be enabled for SoCs with |
| 490 | Freescale DDR1 or DDR2 controllers, depending on the board |
| 491 | implemetation. |
| 492 | |
| 493 | CONFIG_SYS_FSL_DDR2 |
Robert P. J. Day | 62a3b7d | 2016-07-15 13:44:45 -0400 | [diff] [blame] | 494 | Board config to use DDR2. It can be enabled for SoCs with |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 495 | Freescale DDR2 or DDR3 controllers, depending on the board |
| 496 | implementation. |
| 497 | |
| 498 | CONFIG_SYS_FSL_DDR3 |
| 499 | Board config to use DDR3. It can be enabled for SoCs with |
York Sun | 34e026f | 2014-03-27 17:54:47 -0700 | [diff] [blame] | 500 | Freescale DDR3 or DDR3L controllers. |
| 501 | |
| 502 | CONFIG_SYS_FSL_DDR3L |
| 503 | Board config to use DDR3L. It can be enabled for SoCs with |
| 504 | DDR3L controllers. |
| 505 | |
| 506 | CONFIG_SYS_FSL_DDR4 |
| 507 | Board config to use DDR4. It can be enabled for SoCs with |
| 508 | DDR4 controllers. |
York Sun | 5614e71 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 509 | |
Prabhakar Kushwaha | 1b4175d | 2014-01-18 12:28:30 +0530 | [diff] [blame] | 510 | CONFIG_SYS_FSL_IFC_BE |
| 511 | Defines the IFC controller register space as Big Endian |
| 512 | |
| 513 | CONFIG_SYS_FSL_IFC_LE |
| 514 | Defines the IFC controller register space as Little Endian |
| 515 | |
Prabhakar Kushwaha | 690e425 | 2014-01-13 11:28:04 +0530 | [diff] [blame] | 516 | CONFIG_SYS_FSL_PBL_PBI |
| 517 | It enables addition of RCW (Power on reset configuration) in built image. |
| 518 | Please refer doc/README.pblimage for more details |
| 519 | |
| 520 | CONFIG_SYS_FSL_PBL_RCW |
| 521 | It adds PBI(pre-boot instructions) commands in u-boot build image. |
| 522 | PBI commands can be used to configure SoC before it starts the execution. |
| 523 | Please refer doc/README.pblimage for more details |
| 524 | |
Prabhakar Kushwaha | 89ad7be | 2014-04-08 19:13:34 +0530 | [diff] [blame] | 525 | CONFIG_SPL_FSL_PBL |
| 526 | It adds a target to create boot binary having SPL binary in PBI format |
| 527 | concatenated with u-boot binary. |
| 528 | |
York Sun | 4e5b1bd | 2014-02-10 13:59:42 -0800 | [diff] [blame] | 529 | CONFIG_SYS_FSL_DDR_BE |
| 530 | Defines the DDR controller register space as Big Endian |
| 531 | |
| 532 | CONFIG_SYS_FSL_DDR_LE |
| 533 | Defines the DDR controller register space as Little Endian |
| 534 | |
York Sun | 6b9e309 | 2014-02-10 13:59:43 -0800 | [diff] [blame] | 535 | CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY |
| 536 | Physical address from the view of DDR controllers. It is the |
| 537 | same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But |
| 538 | it could be different for ARM SoCs. |
| 539 | |
York Sun | 6b1e125 | 2014-02-10 13:59:44 -0800 | [diff] [blame] | 540 | CONFIG_SYS_FSL_DDR_INTLV_256B |
| 541 | DDR controller interleaving on 256-byte. This is a special |
| 542 | interleaving mode, handled by Dickens for Freescale layerscape |
| 543 | SoCs with ARM core. |
| 544 | |
York Sun | 1d71efb | 2014-08-01 15:51:00 -0700 | [diff] [blame] | 545 | CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS |
| 546 | Number of controllers used as main memory. |
| 547 | |
| 548 | CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS |
| 549 | Number of controllers used for other than main memory. |
| 550 | |
Prabhakar Kushwaha | 4493721 | 2015-11-09 16:42:07 +0530 | [diff] [blame] | 551 | CONFIG_SYS_FSL_HAS_DP_DDR |
| 552 | Defines the SoC has DP-DDR used for DPAA. |
| 553 | |
Ruchika Gupta | 028dbb8 | 2014-09-09 11:50:31 +0530 | [diff] [blame] | 554 | CONFIG_SYS_FSL_SEC_BE |
| 555 | Defines the SEC controller register space as Big Endian |
| 556 | |
| 557 | CONFIG_SYS_FSL_SEC_LE |
| 558 | Defines the SEC controller register space as Little Endian |
| 559 | |
Daniel Schwierzeck | 92bbd64 | 2011-07-27 13:22:39 +0200 | [diff] [blame] | 560 | - MIPS CPU options: |
| 561 | CONFIG_SYS_INIT_SP_OFFSET |
| 562 | |
| 563 | Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack |
| 564 | pointer. This is needed for the temporary stack before |
| 565 | relocation. |
| 566 | |
| 567 | CONFIG_SYS_MIPS_CACHE_MODE |
| 568 | |
| 569 | Cache operation mode for the MIPS CPU. |
| 570 | See also arch/mips/include/asm/mipsregs.h. |
| 571 | Possible values are: |
| 572 | CONF_CM_CACHABLE_NO_WA |
| 573 | CONF_CM_CACHABLE_WA |
| 574 | CONF_CM_UNCACHED |
| 575 | CONF_CM_CACHABLE_NONCOHERENT |
| 576 | CONF_CM_CACHABLE_CE |
| 577 | CONF_CM_CACHABLE_COW |
| 578 | CONF_CM_CACHABLE_CUW |
| 579 | CONF_CM_CACHABLE_ACCELERATED |
| 580 | |
| 581 | CONFIG_SYS_XWAY_EBU_BOOTCFG |
| 582 | |
| 583 | Special option for Lantiq XWAY SoCs for booting from NOR flash. |
| 584 | See also arch/mips/cpu/mips32/start.S. |
| 585 | |
| 586 | CONFIG_XWAY_SWAP_BYTES |
| 587 | |
| 588 | Enable compilation of tools/xway-swap-bytes needed for Lantiq |
| 589 | XWAY SoCs for booting from NOR flash. The U-Boot image needs to |
| 590 | be swapped if a flash programmer is used. |
| 591 | |
Christian Riesch | b67d881 | 2012-02-02 00:44:39 +0000 | [diff] [blame] | 592 | - ARM options: |
| 593 | CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
| 594 | |
| 595 | Select high exception vectors of the ARM core, e.g., do not |
| 596 | clear the V bit of the c1 register of CP15. |
| 597 | |
Aneesh V | 5356f54 | 2012-03-08 07:20:19 +0000 | [diff] [blame] | 598 | CONFIG_SYS_THUMB_BUILD |
| 599 | |
| 600 | Use this flag to build U-Boot using the Thumb instruction |
| 601 | set for ARM architectures. Thumb instruction set provides |
| 602 | better code density. For ARM architectures that support |
| 603 | Thumb2 this flag will result in Thumb2 code generated by |
| 604 | GCC. |
| 605 | |
Stephen Warren | c5d4752 | 2013-03-04 13:29:40 +0000 | [diff] [blame] | 606 | CONFIG_ARM_ERRATA_716044 |
Stephen Warren | 0678587 | 2013-02-26 12:28:27 +0000 | [diff] [blame] | 607 | CONFIG_ARM_ERRATA_742230 |
| 608 | CONFIG_ARM_ERRATA_743622 |
| 609 | CONFIG_ARM_ERRATA_751472 |
Nitin Garg | b7588e3 | 2014-04-02 08:55:02 -0500 | [diff] [blame] | 610 | CONFIG_ARM_ERRATA_761320 |
Ian Campbell | e392b92 | 2015-09-29 10:27:09 +0100 | [diff] [blame] | 611 | CONFIG_ARM_ERRATA_773022 |
| 612 | CONFIG_ARM_ERRATA_774769 |
| 613 | CONFIG_ARM_ERRATA_794072 |
Stephen Warren | 0678587 | 2013-02-26 12:28:27 +0000 | [diff] [blame] | 614 | |
| 615 | If set, the workarounds for these ARM errata are applied early |
| 616 | during U-Boot startup. Note that these options force the |
| 617 | workarounds to be applied; no CPU-type/version detection |
| 618 | exists, unlike the similar options in the Linux kernel. Do not |
| 619 | set these options unless they apply! |
| 620 | |
York Sun | 207774b | 2015-03-20 19:28:08 -0700 | [diff] [blame] | 621 | COUNTER_FREQUENCY |
| 622 | Generic timer clock source frequency. |
| 623 | |
| 624 | COUNTER_FREQUENCY_REAL |
| 625 | Generic timer clock source frequency if the real clock is |
| 626 | different from COUNTER_FREQUENCY, and can only be determined |
| 627 | at run time. |
| 628 | |
Nishanth Menon | c616a0d | 2015-03-09 17:11:59 -0500 | [diff] [blame] | 629 | NOTE: The following can be machine specific errata. These |
| 630 | do have ability to provide rudimentary version and machine |
| 631 | specific checks, but expect no product checks. |
Nishanth Menon | 5902f4c | 2015-03-09 17:12:01 -0500 | [diff] [blame] | 632 | CONFIG_ARM_ERRATA_430973 |
Nishanth Menon | b45c48a | 2015-03-09 17:12:00 -0500 | [diff] [blame] | 633 | CONFIG_ARM_ERRATA_454179 |
Nishanth Menon | 9b4d65f | 2015-03-09 17:12:02 -0500 | [diff] [blame] | 634 | CONFIG_ARM_ERRATA_621766 |
Nishanth Menon | c616a0d | 2015-03-09 17:11:59 -0500 | [diff] [blame] | 635 | CONFIG_ARM_ERRATA_798870 |
Nishanth Menon | a615d0b | 2015-07-27 16:26:05 -0500 | [diff] [blame] | 636 | CONFIG_ARM_ERRATA_801819 |
Nishanth Menon | c616a0d | 2015-03-09 17:11:59 -0500 | [diff] [blame] | 637 | |
Stephen Warren | 73c3893 | 2015-01-19 16:25:52 -0700 | [diff] [blame] | 638 | - Tegra SoC options: |
| 639 | CONFIG_TEGRA_SUPPORT_NON_SECURE |
| 640 | |
| 641 | Support executing U-Boot in non-secure (NS) mode. Certain |
| 642 | impossible actions will be skipped if the CPU is in NS mode, |
| 643 | such as ARM architectural timer initialization. |
| 644 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 645 | - Linux Kernel Interface: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 646 | CONFIG_CLOCKS_IN_MHZ |
| 647 | |
| 648 | U-Boot stores all clock information in Hz |
| 649 | internally. For binary compatibility with older Linux |
| 650 | kernels (which expect the clocks passed in the |
| 651 | bd_info data to be in MHz) the environment variable |
| 652 | "clocks_in_mhz" can be defined so that U-Boot |
| 653 | converts clock data to MHZ before passing it to the |
| 654 | Linux kernel. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 655 | When CONFIG_CLOCKS_IN_MHZ is defined, a definition of |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 656 | "clocks_in_mhz=1" is automatically included in the |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 657 | default environment. |
| 658 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 659 | CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] |
| 660 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 661 | When transferring memsize parameter to Linux, some versions |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 662 | expect it to be in bytes, others in MB. |
| 663 | Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. |
| 664 | |
Gerald Van Baren | fec6d9e | 2008-06-03 20:34:45 -0400 | [diff] [blame] | 665 | CONFIG_OF_LIBFDT |
Wolfgang Denk | f57f70a | 2005-10-13 01:45:54 +0200 | [diff] [blame] | 666 | |
| 667 | New kernel versions are expecting firmware settings to be |
Gerald Van Baren | 213bf8c | 2007-03-31 12:23:51 -0400 | [diff] [blame] | 668 | passed using flattened device trees (based on open firmware |
| 669 | concepts). |
| 670 | |
| 671 | CONFIG_OF_LIBFDT |
| 672 | * New libfdt-based support |
| 673 | * Adds the "fdt" command |
Kim Phillips | 3bb342f | 2007-08-10 14:34:14 -0500 | [diff] [blame] | 674 | * The bootm command automatically updates the fdt |
Gerald Van Baren | 213bf8c | 2007-03-31 12:23:51 -0400 | [diff] [blame] | 675 | |
Marcel Ziswiler | b55ae40 | 2009-09-09 21:18:41 +0200 | [diff] [blame] | 676 | OF_CPU - The proper name of the cpus node (only required for |
| 677 | MPC512X and MPC5xxx based boards). |
| 678 | OF_SOC - The proper name of the soc node (only required for |
| 679 | MPC512X and MPC5xxx based boards). |
Wolfgang Denk | f57f70a | 2005-10-13 01:45:54 +0200 | [diff] [blame] | 680 | OF_TBCLK - The timebase frequency. |
Kumar Gala | c2871f0 | 2006-01-11 13:59:02 -0600 | [diff] [blame] | 681 | OF_STDOUT_PATH - The path to the console device |
Wolfgang Denk | f57f70a | 2005-10-13 01:45:54 +0200 | [diff] [blame] | 682 | |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 683 | boards with QUICC Engines require OF_QE to set UCC MAC |
| 684 | addresses |
Kim Phillips | 3bb342f | 2007-08-10 14:34:14 -0500 | [diff] [blame] | 685 | |
Kumar Gala | 4e25313 | 2006-01-11 13:54:17 -0600 | [diff] [blame] | 686 | CONFIG_OF_BOARD_SETUP |
| 687 | |
| 688 | Board code has addition modification that it wants to make |
| 689 | to the flat device tree before handing it off to the kernel |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 690 | |
Simon Glass | c654b51 | 2014-10-23 18:58:54 -0600 | [diff] [blame] | 691 | CONFIG_OF_SYSTEM_SETUP |
| 692 | |
| 693 | Other code has addition modification that it wants to make |
| 694 | to the flat device tree before handing it off to the kernel. |
| 695 | This causes ft_system_setup() to be called before booting |
| 696 | the kernel. |
| 697 | |
Heiko Schocher | 3887c3f | 2009-09-23 07:56:08 +0200 | [diff] [blame] | 698 | CONFIG_OF_IDE_FIXUP |
| 699 | |
| 700 | U-Boot can detect if an IDE device is present or not. |
| 701 | If not, and this new config option is activated, U-Boot |
| 702 | removes the ATA node from the DTS before booting Linux, |
| 703 | so the Linux IDE driver does not probe the device and |
| 704 | crash. This is needed for buggy hardware (uc101) where |
| 705 | no pull down resistor is connected to the signal IDE5V_DD7. |
| 706 | |
Igor Grinberg | 7eb2939 | 2011-07-14 05:45:07 +0000 | [diff] [blame] | 707 | CONFIG_MACH_TYPE [relevant for ARM only][mandatory] |
| 708 | |
| 709 | This setting is mandatory for all boards that have only one |
| 710 | machine type and must be used to specify the machine type |
| 711 | number as it appears in the ARM machine registry |
| 712 | (see http://www.arm.linux.org.uk/developer/machines/). |
| 713 | Only boards that have multiple machine types supported |
| 714 | in a single configuration file and the machine type is |
| 715 | runtime discoverable, do not have to use this setting. |
| 716 | |
Niklaus Giger | 0b2f4ec | 2008-11-03 22:13:47 +0100 | [diff] [blame] | 717 | - vxWorks boot parameters: |
| 718 | |
| 719 | bootvx constructs a valid bootline using the following |
Bin Meng | 9e98b7e | 2015-10-07 20:19:17 -0700 | [diff] [blame] | 720 | environments variables: bootdev, bootfile, ipaddr, netmask, |
| 721 | serverip, gatewayip, hostname, othbootargs. |
Niklaus Giger | 0b2f4ec | 2008-11-03 22:13:47 +0100 | [diff] [blame] | 722 | It loads the vxWorks image pointed bootfile. |
| 723 | |
Niklaus Giger | 0b2f4ec | 2008-11-03 22:13:47 +0100 | [diff] [blame] | 724 | Note: If a "bootargs" environment is defined, it will overwride |
| 725 | the defaults discussed just above. |
| 726 | |
Aneesh V | 2c451f7 | 2011-06-16 23:30:47 +0000 | [diff] [blame] | 727 | - Cache Configuration: |
| 728 | CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot |
| 729 | CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot |
| 730 | CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot |
| 731 | |
Aneesh V | 93bc219 | 2011-06-16 23:30:51 +0000 | [diff] [blame] | 732 | - Cache Configuration for ARM: |
| 733 | CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache |
| 734 | controller |
| 735 | CONFIG_SYS_PL310_BASE - Physical base address of PL310 |
| 736 | controller register space |
| 737 | |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 738 | - Serial Ports: |
Andreas Engel | 48d0192 | 2008-09-08 14:30:53 +0200 | [diff] [blame] | 739 | CONFIG_PL010_SERIAL |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 740 | |
| 741 | Define this if you want support for Amba PrimeCell PL010 UARTs. |
| 742 | |
Andreas Engel | 48d0192 | 2008-09-08 14:30:53 +0200 | [diff] [blame] | 743 | CONFIG_PL011_SERIAL |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 744 | |
| 745 | Define this if you want support for Amba PrimeCell PL011 UARTs. |
| 746 | |
| 747 | CONFIG_PL011_CLOCK |
| 748 | |
| 749 | If you have Amba PrimeCell PL011 UARTs, set this variable to |
| 750 | the clock speed of the UARTs. |
| 751 | |
| 752 | CONFIG_PL01x_PORTS |
| 753 | |
| 754 | If you have Amba PrimeCell PL010 or PL011 UARTs on your board, |
| 755 | define this to a list of base addresses for each (supported) |
| 756 | port. See e.g. include/configs/versatile.h |
| 757 | |
Karicheri, Muralidharan | d57dee5 | 2014-04-09 15:38:46 -0400 | [diff] [blame] | 758 | CONFIG_SERIAL_HW_FLOW_CONTROL |
| 759 | |
| 760 | Define this variable to enable hw flow control in serial driver. |
| 761 | Current user of this option is drivers/serial/nsl16550.c driver |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 762 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 763 | - Console Interface: |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 764 | Depending on board, define exactly one serial port |
| 765 | (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2, |
| 766 | CONFIG_8xx_CONS_SCC1, ...), or switch off the serial |
| 767 | console by defining CONFIG_8xx_CONS_NONE |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 768 | |
| 769 | Note: if CONFIG_8xx_CONS_NONE is defined, the serial |
| 770 | port routines must be defined elsewhere |
| 771 | (i.e. serial_init(), serial_getc(), ...) |
| 772 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 773 | - Console Baudrate: |
| 774 | CONFIG_BAUDRATE - in bps |
| 775 | Select one of the baudrates listed in |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 776 | CONFIG_SYS_BAUDRATE_TABLE, see below. |
| 777 | CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 778 | |
Heiko Schocher | c92fac9 | 2009-01-30 12:55:38 +0100 | [diff] [blame] | 779 | - Console Rx buffer length |
| 780 | With CONFIG_SYS_SMC_RXBUFLEN it is possible to define |
| 781 | the maximum receive buffer length for the SMC. |
Heiko Schocher | 2b3f12c | 2009-02-10 09:31:47 +0100 | [diff] [blame] | 782 | This option is actual only for 82xx and 8xx possible. |
Heiko Schocher | c92fac9 | 2009-01-30 12:55:38 +0100 | [diff] [blame] | 783 | If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE |
| 784 | must be defined, to setup the maximum idle timeout for |
| 785 | the SMC. |
| 786 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 787 | - Autoboot Command: |
| 788 | CONFIG_BOOTCOMMAND |
| 789 | Only needed when CONFIG_BOOTDELAY is enabled; |
| 790 | define a command string that is automatically executed |
| 791 | when no character is read on the console interface |
| 792 | within "Boot Delay" after reset. |
| 793 | |
| 794 | CONFIG_BOOTARGS |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 795 | This can be used to pass arguments to the bootm |
| 796 | command. The value of CONFIG_BOOTARGS goes into the |
| 797 | environment value "bootargs". |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 798 | |
| 799 | CONFIG_RAMBOOT and CONFIG_NFSBOOT |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 800 | The value of these goes into the environment as |
| 801 | "ramboot" and "nfsboot" respectively, and can be used |
| 802 | as a convenience, when switching between booting from |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 803 | RAM and NFS. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 804 | |
Heiko Schocher | eda0ba3 | 2013-11-04 14:04:59 +0100 | [diff] [blame] | 805 | - Bootcount: |
| 806 | CONFIG_BOOTCOUNT_LIMIT |
| 807 | Implements a mechanism for detecting a repeating reboot |
| 808 | cycle, see: |
| 809 | http://www.denx.de/wiki/view/DULG/UBootBootCountLimit |
| 810 | |
| 811 | CONFIG_BOOTCOUNT_ENV |
| 812 | If no softreset save registers are found on the hardware |
| 813 | "bootcount" is stored in the environment. To prevent a |
| 814 | saveenv on all reboots, the environment variable |
| 815 | "upgrade_available" is used. If "upgrade_available" is |
| 816 | 0, "bootcount" is always 0, if "upgrade_available" is |
| 817 | 1 "bootcount" is incremented in the environment. |
| 818 | So the Userspace Applikation must set the "upgrade_available" |
| 819 | and "bootcount" variable to 0, if a boot was successfully. |
| 820 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 821 | - Pre-Boot Commands: |
| 822 | CONFIG_PREBOOT |
| 823 | |
| 824 | When this option is #defined, the existence of the |
| 825 | environment variable "preboot" will be checked |
| 826 | immediately before starting the CONFIG_BOOTDELAY |
| 827 | countdown and/or running the auto-boot command resp. |
| 828 | entering interactive mode. |
| 829 | |
| 830 | This feature is especially useful when "preboot" is |
| 831 | automatically generated or modified. For an example |
| 832 | see the LWMON board specific code: here "preboot" is |
| 833 | modified when the user holds down a certain |
| 834 | combination of keys on the (special) keyboard when |
| 835 | booting the systems |
| 836 | |
| 837 | - Serial Download Echo Mode: |
| 838 | CONFIG_LOADS_ECHO |
| 839 | If defined to 1, all characters received during a |
| 840 | serial download (using the "loads" command) are |
| 841 | echoed back. This might be needed by some terminal |
| 842 | emulations (like "cu"), but may as well just take |
| 843 | time on others. This setting #define's the initial |
| 844 | value of the "loads_echo" environment variable. |
| 845 | |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 846 | - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 847 | CONFIG_KGDB_BAUDRATE |
| 848 | Select one of the baudrates listed in |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 849 | CONFIG_SYS_BAUDRATE_TABLE, see below. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 850 | |
| 851 | - Monitor Functions: |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 852 | Monitor commands can be included or excluded |
| 853 | from the build by using the #include files |
Stephen Warren | c6c621b | 2012-08-05 16:07:19 +0000 | [diff] [blame] | 854 | <config_cmd_all.h> and #undef'ing unwanted |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 855 | commands, or adding #define's for wanted commands. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 856 | |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 857 | The default command configuration includes all commands |
| 858 | except those marked below with a "*". |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 859 | |
Marek Vasut | b401b73 | 2014-03-05 19:58:39 +0100 | [diff] [blame] | 860 | CONFIG_CMD_AES AES 128 CBC encrypt/decrypt |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 861 | CONFIG_CMD_ASKENV * ask for env variable |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 862 | CONFIG_CMD_BDI bdinfo |
| 863 | CONFIG_CMD_BEDBUG * Include BedBug Debugger |
| 864 | CONFIG_CMD_BMP * BMP support |
| 865 | CONFIG_CMD_BSP * Board specific commands |
| 866 | CONFIG_CMD_BOOTD bootd |
Tom Rini | d2b2ffe | 2014-08-14 06:42:36 -0400 | [diff] [blame] | 867 | CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 868 | CONFIG_CMD_CACHE * icache, dcache |
Michal Simek | 08d0d6f | 2013-11-21 13:39:02 -0800 | [diff] [blame] | 869 | CONFIG_CMD_CLK * clock command support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 870 | CONFIG_CMD_CONSOLE coninfo |
Mike Frysinger | 710b993 | 2010-12-21 14:19:51 -0500 | [diff] [blame] | 871 | CONFIG_CMD_CRC32 * crc32 |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 872 | CONFIG_CMD_DATE * support for RTC, date/time... |
| 873 | CONFIG_CMD_DHCP * DHCP support |
| 874 | CONFIG_CMD_DIAG * Diagnostics |
Peter Tyser | a7c9310 | 2008-12-17 16:36:22 -0600 | [diff] [blame] | 875 | CONFIG_CMD_DS4510 * ds4510 I2C gpio commands |
| 876 | CONFIG_CMD_DS4510_INFO * ds4510 I2C info command |
| 877 | CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd |
| 878 | CONFIG_CMD_DS4510_RST * ds4510 I2C rst command |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 879 | CONFIG_CMD_DTT * Digital Therm and Thermostat |
| 880 | CONFIG_CMD_ECHO echo arguments |
Peter Tyser | 246c692 | 2009-10-25 15:12:56 -0500 | [diff] [blame] | 881 | CONFIG_CMD_EDITENV edit env variable |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 882 | CONFIG_CMD_EEPROM * EEPROM read/write support |
Nikita Kiryanov | aa9e604 | 2016-04-16 17:55:03 +0300 | [diff] [blame] | 883 | CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 884 | CONFIG_CMD_ELF * bootelf, bootvx |
Joe Hershberger | 5e2b3e0 | 2012-12-11 22:16:25 -0600 | [diff] [blame] | 885 | CONFIG_CMD_ENV_CALLBACK * display details about env callbacks |
Joe Hershberger | fffad71 | 2012-12-11 22:16:33 -0600 | [diff] [blame] | 886 | CONFIG_CMD_ENV_FLAGS * display details about env flags |
Andrew Ruder | 88733e2 | 2013-10-22 19:07:34 -0500 | [diff] [blame] | 887 | CONFIG_CMD_ENV_EXISTS * check existence of env variable |
Mike Frysinger | 0c79cda | 2010-12-26 23:09:45 -0500 | [diff] [blame] | 888 | CONFIG_CMD_EXPORTENV * export the environment |
Stephen Warren | 03e2ecf | 2012-10-22 06:43:50 +0000 | [diff] [blame] | 889 | CONFIG_CMD_EXT2 * ext2 command support |
| 890 | CONFIG_CMD_EXT4 * ext4 command support |
Stephen Warren | 16f4d93 | 2014-01-24 20:46:37 -0700 | [diff] [blame] | 891 | CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls) |
| 892 | that work for multiple fs types |
Christian Gmeiner | 59e890e | 2014-11-12 14:35:04 +0100 | [diff] [blame] | 893 | CONFIG_CMD_FS_UUID * Look up a filesystem UUID |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 894 | CONFIG_CMD_SAVEENV saveenv |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 895 | CONFIG_CMD_FDC * Floppy Disk Support |
Stephen Warren | 03e2ecf | 2012-10-22 06:43:50 +0000 | [diff] [blame] | 896 | CONFIG_CMD_FAT * FAT command support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 897 | CONFIG_CMD_FLASH flinfo, erase, protect |
| 898 | CONFIG_CMD_FPGA FPGA device initialization support |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 899 | CONFIG_CMD_FUSE * Device fuse support |
Anton Staaf | 53fdc7e | 2012-12-05 14:46:29 +0000 | [diff] [blame] | 900 | CONFIG_CMD_GETTIME * Get time since boot |
Mike Frysinger | a641b97 | 2010-12-26 23:32:22 -0500 | [diff] [blame] | 901 | CONFIG_CMD_GO * the 'go' command (exec code) |
Kim Phillips | a000b79 | 2011-04-05 07:15:14 +0000 | [diff] [blame] | 902 | CONFIG_CMD_GREPENV * search environment |
Simon Glass | bf36c5d | 2012-12-05 14:46:38 +0000 | [diff] [blame] | 903 | CONFIG_CMD_HASH * calculate hash / digest |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 904 | CONFIG_CMD_I2C * I2C serial bus support |
| 905 | CONFIG_CMD_IDE * IDE harddisk support |
| 906 | CONFIG_CMD_IMI iminfo |
Vipin Kumar | 8fdf1e0 | 2012-12-16 22:32:48 +0000 | [diff] [blame] | 907 | CONFIG_CMD_IMLS List all images found in NOR flash |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 908 | CONFIG_CMD_IMLS_NAND * List all images found in NAND flash |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 909 | CONFIG_CMD_IMMAP * IMMR dump support |
Simon Glass | aa53233 | 2014-06-11 23:29:41 -0600 | [diff] [blame] | 910 | CONFIG_CMD_IOTRACE * I/O tracing for debugging |
Mike Frysinger | 0c79cda | 2010-12-26 23:09:45 -0500 | [diff] [blame] | 911 | CONFIG_CMD_IMPORTENV * import an environment |
Joe Hershberger | c167cc0 | 2012-10-03 11:15:51 +0000 | [diff] [blame] | 912 | CONFIG_CMD_INI * import data from an ini file into the env |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 913 | CONFIG_CMD_IRQ * irqinfo |
| 914 | CONFIG_CMD_ITEST Integer/string test of 2 values |
| 915 | CONFIG_CMD_JFFS2 * JFFS2 Support |
| 916 | CONFIG_CMD_KGDB * kgdb |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 917 | CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader) |
Joe Hershberger | d22c338 | 2012-05-23 08:00:12 +0000 | [diff] [blame] | 918 | CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration |
| 919 | (169.254.*.*) |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 920 | CONFIG_CMD_LOADB loadb |
| 921 | CONFIG_CMD_LOADS loads |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 922 | CONFIG_CMD_MD5SUM * print md5 message digest |
Robin Getz | 02c9aa1 | 2009-07-27 00:07:59 -0400 | [diff] [blame] | 923 | (requires CONFIG_CMD_MEMORY and CONFIG_MD5) |
Simon Glass | 15a33e4 | 2012-11-30 13:01:20 +0000 | [diff] [blame] | 924 | CONFIG_CMD_MEMINFO * Display detailed memory information |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 925 | CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, |
Wolfgang Denk | a268170 | 2013-03-08 10:51:32 +0000 | [diff] [blame] | 926 | loop, loopw |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 927 | CONFIG_CMD_MEMTEST * mtest |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 928 | CONFIG_CMD_MISC Misc functions like sleep etc |
| 929 | CONFIG_CMD_MMC * MMC memory mapped support |
| 930 | CONFIG_CMD_MII * MII utility commands |
Stefan Roese | 68d7d65 | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 931 | CONFIG_CMD_MTDPARTS * MTD partition support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 932 | CONFIG_CMD_NAND * NAND support |
| 933 | CONFIG_CMD_NET bootp, tftpboot, rarpboot |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 934 | CONFIG_CMD_NFS NFS support |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 935 | CONFIG_CMD_PCA953X * PCA953x I2C gpio commands |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 936 | CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 937 | CONFIG_CMD_PCI * pciinfo |
| 938 | CONFIG_CMD_PCMCIA * PCMCIA support |
| 939 | CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network |
| 940 | host |
| 941 | CONFIG_CMD_PORTIO * Port I/O |
Kenneth Waters | ff048ea | 2012-12-05 14:46:30 +0000 | [diff] [blame] | 942 | CONFIG_CMD_READ * Read raw data from partition |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 943 | CONFIG_CMD_REGINFO * Register dump |
| 944 | CONFIG_CMD_RUN run command in env variable |
Simon Glass | d304931 | 2012-12-26 09:53:36 +0000 | [diff] [blame] | 945 | CONFIG_CMD_SANDBOX * sb command to access sandbox features |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 946 | CONFIG_CMD_SAVES * save S record dump |
Simon Glass | c649e3c | 2016-05-01 11:36:02 -0600 | [diff] [blame] | 947 | CONFIG_SCSI * SCSI Support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 948 | CONFIG_CMD_SDRAM * print SDRAM configuration information |
| 949 | (requires CONFIG_CMD_I2C) |
| 950 | CONFIG_CMD_SETGETDCR Support for DCR Register access |
| 951 | (4xx only) |
Eric Nelson | f61ec45 | 2012-01-31 10:52:08 -0700 | [diff] [blame] | 952 | CONFIG_CMD_SF * Read/write/erase SPI NOR flash |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 953 | CONFIG_CMD_SHA1SUM * print sha1 memory digest |
Robin Getz | 02c9aa1 | 2009-07-27 00:07:59 -0400 | [diff] [blame] | 954 | (requires CONFIG_CMD_MEMORY) |
Bob Liu | 7d861d9 | 2013-02-05 19:05:41 +0800 | [diff] [blame] | 955 | CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 956 | CONFIG_CMD_SOURCE "source" command Support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 957 | CONFIG_CMD_SPI * SPI serial bus support |
Luca Ceresoli | 7a83af0 | 2011-05-17 00:03:40 +0000 | [diff] [blame] | 958 | CONFIG_CMD_TFTPSRV * TFTP transfer in server mode |
Simon Glass | 1fb7cd4 | 2011-10-24 18:00:07 +0000 | [diff] [blame] | 959 | CONFIG_CMD_TFTPPUT * TFTP put command (upload) |
Joe Hershberger | da83bcd | 2012-10-03 12:14:57 +0000 | [diff] [blame] | 960 | CONFIG_CMD_TIME * run command and report execution time (ARM specific) |
| 961 | CONFIG_CMD_TIMER * access to the system tick timer |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 962 | CONFIG_CMD_USB * USB support |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 963 | CONFIG_CMD_CDP * Cisco Discover Protocol support |
Marek Vasut | c8339f5 | 2012-03-31 07:47:16 +0000 | [diff] [blame] | 964 | CONFIG_CMD_MFSL * Microblaze FSL support |
Vincent Stehlé | 4d98b5c | 2013-06-20 18:14:22 +0200 | [diff] [blame] | 965 | CONFIG_CMD_XIMG Load part of Multi Image |
Przemyslaw Marczak | 89c8230 | 2014-04-02 10:20:05 +0200 | [diff] [blame] | 966 | CONFIG_CMD_UUID * Generate random UUID or GUID string |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 967 | |
| 968 | EXAMPLE: If you want all functions except of network |
| 969 | support you can write: |
| 970 | |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 971 | #include "config_cmd_all.h" |
| 972 | #undef CONFIG_CMD_NET |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 973 | |
Gerald Van Baren | 213bf8c | 2007-03-31 12:23:51 -0400 | [diff] [blame] | 974 | Other Commands: |
| 975 | fdt (flattened device tree) command: CONFIG_OF_LIBFDT |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 976 | |
| 977 | Note: Don't enable the "icache" and "dcache" commands |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 978 | (configuration option CONFIG_CMD_CACHE) unless you know |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 979 | what you (and your U-Boot users) are doing. Data |
| 980 | cache cannot be enabled on systems like the 8xx or |
| 981 | 8260 (where accesses to the IMMR region must be |
| 982 | uncached), and it cannot be disabled on all other |
| 983 | systems where we (mis-) use the data cache to hold an |
| 984 | initial stack and some data. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 985 | |
| 986 | |
| 987 | XXX - this list needs to get updated! |
| 988 | |
Simon Glass | 302a648 | 2016-03-13 19:07:28 -0600 | [diff] [blame] | 989 | - Removal of commands |
| 990 | If no commands are needed to boot, you can disable |
| 991 | CONFIG_CMDLINE to remove them. In this case, the command line |
| 992 | will not be available, and when U-Boot wants to execute the |
| 993 | boot command (on start-up) it will call board_run_command() |
| 994 | instead. This can reduce image size significantly for very |
| 995 | simple boot procedures. |
| 996 | |
Wolfgang Denk | a5ecbe6 | 2013-03-23 23:50:31 +0000 | [diff] [blame] | 997 | - Regular expression support: |
| 998 | CONFIG_REGEX |
Wolfgang Denk | 93e1459 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 999 | If this variable is defined, U-Boot is linked against |
| 1000 | the SLRE (Super Light Regular Expression) library, |
| 1001 | which adds regex support to some commands, as for |
| 1002 | example "env grep" and "setexpr". |
Wolfgang Denk | a5ecbe6 | 2013-03-23 23:50:31 +0000 | [diff] [blame] | 1003 | |
Simon Glass | 45ba807 | 2011-10-15 05:48:20 +0000 | [diff] [blame] | 1004 | - Device tree: |
| 1005 | CONFIG_OF_CONTROL |
| 1006 | If this variable is defined, U-Boot will use a device tree |
| 1007 | to configure its devices, instead of relying on statically |
| 1008 | compiled #defines in the board file. This option is |
| 1009 | experimental and only available on a few boards. The device |
| 1010 | tree is available in the global data as gd->fdt_blob. |
| 1011 | |
Simon Glass | 2c0f79e | 2011-10-24 19:15:31 +0000 | [diff] [blame] | 1012 | U-Boot needs to get its device tree from somewhere. This can |
| 1013 | be done using one of the two options below: |
Simon Glass | bbb0b12 | 2011-10-15 05:48:21 +0000 | [diff] [blame] | 1014 | |
| 1015 | CONFIG_OF_EMBED |
| 1016 | If this variable is defined, U-Boot will embed a device tree |
| 1017 | binary in its image. This device tree file should be in the |
| 1018 | board directory and called <soc>-<board>.dts. The binary file |
| 1019 | is then picked up in board_init_f() and made available through |
| 1020 | the global data structure as gd->blob. |
Simon Glass | 45ba807 | 2011-10-15 05:48:20 +0000 | [diff] [blame] | 1021 | |
Simon Glass | 2c0f79e | 2011-10-24 19:15:31 +0000 | [diff] [blame] | 1022 | CONFIG_OF_SEPARATE |
| 1023 | If this variable is defined, U-Boot will build a device tree |
| 1024 | binary. It will be called u-boot.dtb. Architecture-specific |
| 1025 | code will locate it at run-time. Generally this works by: |
| 1026 | |
| 1027 | cat u-boot.bin u-boot.dtb >image.bin |
| 1028 | |
| 1029 | and in fact, U-Boot does this for you, creating a file called |
| 1030 | u-boot-dtb.bin which is useful in the common case. You can |
| 1031 | still use the individual files if you need something more |
| 1032 | exotic. |
| 1033 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1034 | - Watchdog: |
| 1035 | CONFIG_WATCHDOG |
| 1036 | If this variable is defined, it enables watchdog |
Detlev Zundel | 6abe6fb | 2011-04-27 05:25:59 +0000 | [diff] [blame] | 1037 | support for the SoC. There must be support in the SoC |
| 1038 | specific code for a watchdog. For the 8xx and 8260 |
| 1039 | CPUs, the SIU Watchdog feature is enabled in the SYPCR |
| 1040 | register. When supported for a specific SoC is |
| 1041 | available, then no further board specific code should |
| 1042 | be needed to use it. |
| 1043 | |
| 1044 | CONFIG_HW_WATCHDOG |
| 1045 | When using a watchdog circuitry external to the used |
| 1046 | SoC, then define this variable and provide board |
| 1047 | specific code for the "hw_watchdog_reset" function. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1048 | |
Heiko Schocher | 7bae0d6 | 2015-01-21 08:38:22 +0100 | [diff] [blame] | 1049 | CONFIG_AT91_HW_WDT_TIMEOUT |
| 1050 | specify the timeout in seconds. default 2 seconds. |
| 1051 | |
stroese | c1551ea | 2003-04-04 15:53:41 +0000 | [diff] [blame] | 1052 | - U-Boot Version: |
| 1053 | CONFIG_VERSION_VARIABLE |
| 1054 | If this variable is defined, an environment variable |
| 1055 | named "ver" is created by U-Boot showing the U-Boot |
| 1056 | version as printed by the "version" command. |
Benoît Thébaudeau | a1ea8e5 | 2012-08-13 15:01:14 +0200 | [diff] [blame] | 1057 | Any change to this variable will be reverted at the |
| 1058 | next reset. |
stroese | c1551ea | 2003-04-04 15:53:41 +0000 | [diff] [blame] | 1059 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1060 | - Real-Time Clock: |
| 1061 | |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 1062 | When CONFIG_CMD_DATE is selected, the type of the RTC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1063 | has to be selected, too. Define exactly one of the |
| 1064 | following options: |
| 1065 | |
| 1066 | CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx |
| 1067 | CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC |
Fabio Estevam | 4e8b754 | 2011-10-24 06:44:15 +0000 | [diff] [blame] | 1068 | CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1069 | CONFIG_RTC_MC146818 - use MC146818 RTC |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 1070 | CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1071 | CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC |
wdenk | 7f70e85 | 2003-05-20 14:25:27 +0000 | [diff] [blame] | 1072 | CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC |
Markus Niebel | 412921d | 2014-07-21 11:06:16 +0200 | [diff] [blame] | 1073 | CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC |
wdenk | 3bac351 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 1074 | CONFIG_RTC_DS164x - use Dallas DS164x RTC |
Tor Krill | 9536dfc | 2008-03-15 15:40:26 +0100 | [diff] [blame] | 1075 | CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC |
wdenk | 4c0d4c3 | 2004-06-09 17:34:58 +0000 | [diff] [blame] | 1076 | CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1077 | CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 |
Heiko Schocher | 71d19f3 | 2011-03-28 09:24:22 +0200 | [diff] [blame] | 1078 | CONFIG_SYS_RV3029_TCR - enable trickle charger on |
| 1079 | RV3029 RTC. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1080 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 1081 | Note that if the RTC uses I2C, then the I2C interface |
| 1082 | must also be configured. See I2C Support, below. |
| 1083 | |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 1084 | - GPIO Support: |
| 1085 | CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 1086 | |
Chris Packham | 5dec49c | 2010-12-19 10:12:13 +0000 | [diff] [blame] | 1087 | The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of |
| 1088 | chip-ngpio pairs that tell the PCA953X driver the number of |
| 1089 | pins supported by a particular chip. |
| 1090 | |
Peter Tyser | e92739d | 2008-12-17 16:36:21 -0600 | [diff] [blame] | 1091 | Note that if the GPIO device uses I2C, then the I2C interface |
| 1092 | must also be configured. See I2C Support, below. |
| 1093 | |
Simon Glass | aa53233 | 2014-06-11 23:29:41 -0600 | [diff] [blame] | 1094 | - I/O tracing: |
| 1095 | When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O |
| 1096 | accesses and can checksum them or write a list of them out |
| 1097 | to memory. See the 'iotrace' command for details. This is |
| 1098 | useful for testing device drivers since it can confirm that |
| 1099 | the driver behaves the same way before and after a code |
| 1100 | change. Currently this is supported on sandbox and arm. To |
| 1101 | add support for your architecture, add '#include <iotrace.h>' |
| 1102 | to the bottom of arch/<arch>/include/asm/io.h and test. |
| 1103 | |
| 1104 | Example output from the 'iotrace stats' command is below. |
| 1105 | Note that if the trace buffer is exhausted, the checksum will |
| 1106 | still continue to operate. |
| 1107 | |
| 1108 | iotrace is enabled |
| 1109 | Start: 10000000 (buffer start address) |
| 1110 | Size: 00010000 (buffer size) |
| 1111 | Offset: 00000120 (current buffer offset) |
| 1112 | Output: 10000120 (start + offset) |
| 1113 | Count: 00000018 (number of trace records) |
| 1114 | CRC32: 9526fb66 (CRC32 of all trace records) |
| 1115 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1116 | - Timestamp Support: |
| 1117 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 1118 | When CONFIG_TIMESTAMP is selected, the timestamp |
| 1119 | (date and time) of an image is printed by image |
| 1120 | commands like bootm or iminfo. This option is |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 1121 | automatically enabled when you select CONFIG_CMD_DATE . |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1122 | |
Karl O. Pinc | 923c46f | 2012-08-16 06:20:15 +0000 | [diff] [blame] | 1123 | - Partition Labels (disklabels) Supported: |
| 1124 | Zero or more of the following: |
| 1125 | CONFIG_MAC_PARTITION Apple's MacOS partition table. |
| 1126 | CONFIG_DOS_PARTITION MS Dos partition table, traditional on the |
| 1127 | Intel architecture, USB sticks, etc. |
| 1128 | CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc. |
| 1129 | CONFIG_EFI_PARTITION GPT partition table, common when EFI is the |
| 1130 | bootloader. Note 2TB partition limit; see |
| 1131 | disk/part_efi.c |
| 1132 | CONFIG_MTD_PARTITIONS Memory Technology Device partition table. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1133 | |
Wolfgang Denk | 218ca72 | 2008-03-26 10:40:12 +0100 | [diff] [blame] | 1134 | If IDE or SCSI support is enabled (CONFIG_CMD_IDE or |
Simon Glass | c649e3c | 2016-05-01 11:36:02 -0600 | [diff] [blame] | 1135 | CONFIG_SCSI) you must configure support for at |
Karl O. Pinc | 923c46f | 2012-08-16 06:20:15 +0000 | [diff] [blame] | 1136 | least one non-MTD partition type as well. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1137 | |
| 1138 | - IDE Reset method: |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 1139 | CONFIG_IDE_RESET_ROUTINE - this is defined in several |
| 1140 | board configurations files but used nowhere! |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1141 | |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 1142 | CONFIG_IDE_RESET - is this is defined, IDE Reset will |
| 1143 | be performed by calling the function |
| 1144 | ide_set_reset(int reset) |
| 1145 | which has to be defined in a board specific file |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1146 | |
| 1147 | - ATAPI Support: |
| 1148 | CONFIG_ATAPI |
| 1149 | |
| 1150 | Set this to enable ATAPI support. |
| 1151 | |
wdenk | c40b295 | 2004-03-13 23:29:43 +0000 | [diff] [blame] | 1152 | - LBA48 Support |
| 1153 | CONFIG_LBA48 |
| 1154 | |
| 1155 | Set this to enable support for disks larger than 137GB |
Heiko Schocher | 4b142fe | 2009-12-03 11:21:21 +0100 | [diff] [blame] | 1156 | Also look at CONFIG_SYS_64BIT_LBA. |
wdenk | c40b295 | 2004-03-13 23:29:43 +0000 | [diff] [blame] | 1157 | Whithout these , LBA48 support uses 32bit variables and will 'only' |
| 1158 | support disks up to 2.1TB. |
| 1159 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1160 | CONFIG_SYS_64BIT_LBA: |
wdenk | c40b295 | 2004-03-13 23:29:43 +0000 | [diff] [blame] | 1161 | When enabled, makes the IDE subsystem use 64bit sector addresses. |
| 1162 | Default is 32bit. |
| 1163 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1164 | - SCSI Support: |
| 1165 | At the moment only there is only support for the |
| 1166 | SYM53C8XX SCSI controller; define |
| 1167 | CONFIG_SCSI_SYM53C8XX to enable it. |
| 1168 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1169 | CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and |
| 1170 | CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID * |
| 1171 | CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1172 | maximum numbers of LUNs, SCSI ID's and target |
| 1173 | devices. |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1174 | CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1175 | |
Wolfgang Denk | 93e1459 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 1176 | The environment variable 'scsidevs' is set to the number of |
| 1177 | SCSI devices found during the last scan. |
Stefan Reinauer | 447c031 | 2012-10-29 05:23:48 +0000 | [diff] [blame] | 1178 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1179 | - NETWORK Support (PCI): |
wdenk | 682011f | 2003-06-03 23:54:09 +0000 | [diff] [blame] | 1180 | CONFIG_E1000 |
Kyle Moffett | ce5207e | 2011-10-18 11:05:29 +0000 | [diff] [blame] | 1181 | Support for Intel 8254x/8257x gigabit chips. |
| 1182 | |
| 1183 | CONFIG_E1000_SPI |
| 1184 | Utility code for direct access to the SPI bus on Intel 8257x. |
| 1185 | This does not do anything useful unless you set at least one |
| 1186 | of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. |
| 1187 | |
| 1188 | CONFIG_E1000_SPI_GENERIC |
| 1189 | Allow generic access to the SPI bus on the Intel 8257x, for |
| 1190 | example with the "sspi" command. |
| 1191 | |
| 1192 | CONFIG_CMD_E1000 |
| 1193 | Management command for E1000 devices. When used on devices |
| 1194 | with SPI support you can reprogram the EEPROM from U-Boot. |
stroese | 53cf943 | 2003-06-05 15:39:44 +0000 | [diff] [blame] | 1195 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1196 | CONFIG_EEPRO100 |
| 1197 | Support for Intel 82557/82559/82559ER chips. |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1198 | Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1199 | write routine for first time initialisation. |
| 1200 | |
| 1201 | CONFIG_TULIP |
| 1202 | Support for Digital 2114x chips. |
| 1203 | Optional CONFIG_TULIP_SELECT_MEDIA for board specific |
| 1204 | modem chip initialisation (KS8761/QS6611). |
| 1205 | |
| 1206 | CONFIG_NATSEMI |
| 1207 | Support for National dp83815 chips. |
| 1208 | |
| 1209 | CONFIG_NS8382X |
| 1210 | Support for National dp8382[01] gigabit chips. |
| 1211 | |
wdenk | 45219c4 | 2003-05-12 21:50:16 +0000 | [diff] [blame] | 1212 | - NETWORK Support (other): |
| 1213 | |
Jens Scharsig | c041e9d | 2010-01-23 12:03:45 +0100 | [diff] [blame] | 1214 | CONFIG_DRIVER_AT91EMAC |
| 1215 | Support for AT91RM9200 EMAC. |
| 1216 | |
| 1217 | CONFIG_RMII |
| 1218 | Define this to use reduced MII inteface |
| 1219 | |
| 1220 | CONFIG_DRIVER_AT91EMAC_QUIET |
| 1221 | If this defined, the driver is quiet. |
| 1222 | The driver doen't show link status messages. |
| 1223 | |
Rob Herring | efdd731 | 2011-12-15 11:15:49 +0000 | [diff] [blame] | 1224 | CONFIG_CALXEDA_XGMAC |
| 1225 | Support for the Calxeda XGMAC device |
| 1226 | |
Ashok | 3bb46d2 | 2012-10-15 06:20:47 +0000 | [diff] [blame] | 1227 | CONFIG_LAN91C96 |
wdenk | 45219c4 | 2003-05-12 21:50:16 +0000 | [diff] [blame] | 1228 | Support for SMSC's LAN91C96 chips. |
| 1229 | |
wdenk | 45219c4 | 2003-05-12 21:50:16 +0000 | [diff] [blame] | 1230 | CONFIG_LAN91C96_USE_32_BIT |
| 1231 | Define this to enable 32 bit addressing |
| 1232 | |
Ashok | 3bb46d2 | 2012-10-15 06:20:47 +0000 | [diff] [blame] | 1233 | CONFIG_SMC91111 |
wdenk | f39748a | 2004-06-09 13:37:52 +0000 | [diff] [blame] | 1234 | Support for SMSC's LAN91C111 chip |
| 1235 | |
| 1236 | CONFIG_SMC91111_BASE |
| 1237 | Define this to hold the physical address |
| 1238 | of the device (I/O space) |
| 1239 | |
| 1240 | CONFIG_SMC_USE_32_BIT |
| 1241 | Define this if data bus is 32 bits |
| 1242 | |
| 1243 | CONFIG_SMC_USE_IOFUNCS |
| 1244 | Define this to use i/o functions instead of macros |
| 1245 | (some hardware wont work with macros) |
| 1246 | |
Heiko Schocher | dc02bad | 2011-11-15 10:00:04 -0500 | [diff] [blame] | 1247 | CONFIG_DRIVER_TI_EMAC |
| 1248 | Support for davinci emac |
| 1249 | |
| 1250 | CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT |
| 1251 | Define this if you have more then 3 PHYs. |
| 1252 | |
Macpaul Lin | b3dbf4a5 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 1253 | CONFIG_FTGMAC100 |
| 1254 | Support for Faraday's FTGMAC100 Gigabit SoC Ethernet |
| 1255 | |
| 1256 | CONFIG_FTGMAC100_EGIGA |
| 1257 | Define this to use GE link update with gigabit PHY. |
| 1258 | Define this if FTGMAC100 is connected to gigabit PHY. |
| 1259 | If your system has 10/100 PHY only, it might not occur |
| 1260 | wrong behavior. Because PHY usually return timeout or |
| 1261 | useless data when polling gigabit status and gigabit |
| 1262 | control registers. This behavior won't affect the |
| 1263 | correctnessof 10/100 link speed update. |
| 1264 | |
Mike Rapoport | c2fff33 | 2009-11-11 10:03:03 +0200 | [diff] [blame] | 1265 | CONFIG_SMC911X |
Jens Gehrlein | 557b377 | 2008-05-05 14:06:11 +0200 | [diff] [blame] | 1266 | Support for SMSC's LAN911x and LAN921x chips |
| 1267 | |
Mike Rapoport | c2fff33 | 2009-11-11 10:03:03 +0200 | [diff] [blame] | 1268 | CONFIG_SMC911X_BASE |
Jens Gehrlein | 557b377 | 2008-05-05 14:06:11 +0200 | [diff] [blame] | 1269 | Define this to hold the physical address |
| 1270 | of the device (I/O space) |
| 1271 | |
Mike Rapoport | c2fff33 | 2009-11-11 10:03:03 +0200 | [diff] [blame] | 1272 | CONFIG_SMC911X_32_BIT |
Jens Gehrlein | 557b377 | 2008-05-05 14:06:11 +0200 | [diff] [blame] | 1273 | Define this if data bus is 32 bits |
| 1274 | |
Mike Rapoport | c2fff33 | 2009-11-11 10:03:03 +0200 | [diff] [blame] | 1275 | CONFIG_SMC911X_16_BIT |
Jens Gehrlein | 557b377 | 2008-05-05 14:06:11 +0200 | [diff] [blame] | 1276 | Define this if data bus is 16 bits. If your processor |
| 1277 | automatically converts one 32 bit word to two 16 bit |
Mike Rapoport | c2fff33 | 2009-11-11 10:03:03 +0200 | [diff] [blame] | 1278 | words you may also try CONFIG_SMC911X_32_BIT. |
Jens Gehrlein | 557b377 | 2008-05-05 14:06:11 +0200 | [diff] [blame] | 1279 | |
Yoshihiro Shimoda | 3d0075f | 2011-01-27 10:06:03 +0900 | [diff] [blame] | 1280 | CONFIG_SH_ETHER |
| 1281 | Support for Renesas on-chip Ethernet controller |
| 1282 | |
| 1283 | CONFIG_SH_ETHER_USE_PORT |
| 1284 | Define the number of ports to be used |
| 1285 | |
| 1286 | CONFIG_SH_ETHER_PHY_ADDR |
| 1287 | Define the ETH PHY's address |
| 1288 | |
Yoshihiro Shimoda | 68260aa | 2011-01-27 10:06:08 +0900 | [diff] [blame] | 1289 | CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 1290 | If this option is set, the driver enables cache flush. |
| 1291 | |
Heiko Schocher | b2f97cf | 2014-07-18 06:07:19 +0200 | [diff] [blame] | 1292 | - PWM Support: |
| 1293 | CONFIG_PWM_IMX |
Robert P. J. Day | 5052e81 | 2016-09-13 08:35:18 -0400 | [diff] [blame] | 1294 | Support for PWM module on the imx6. |
Heiko Schocher | b2f97cf | 2014-07-18 06:07:19 +0200 | [diff] [blame] | 1295 | |
Vadim Bendebury | 5e12472 | 2011-10-17 08:36:14 +0000 | [diff] [blame] | 1296 | - TPM Support: |
Che-liang Chiou | 90899cc | 2013-04-12 11:04:34 +0000 | [diff] [blame] | 1297 | CONFIG_TPM |
| 1298 | Support TPM devices. |
| 1299 | |
Christophe Ricard | 0766ad2 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 1300 | CONFIG_TPM_TIS_INFINEON |
| 1301 | Support for Infineon i2c bus TPM devices. Only one device |
Tom Wai-Hong Tam | 1b393db | 2013-04-12 11:04:37 +0000 | [diff] [blame] | 1302 | per system is supported at this time. |
| 1303 | |
Tom Wai-Hong Tam | 1b393db | 2013-04-12 11:04:37 +0000 | [diff] [blame] | 1304 | CONFIG_TPM_TIS_I2C_BURST_LIMITATION |
| 1305 | Define the burst count bytes upper limit |
| 1306 | |
Christophe Ricard | 3aa7408 | 2016-01-21 23:27:13 +0100 | [diff] [blame] | 1307 | CONFIG_TPM_ST33ZP24 |
| 1308 | Support for STMicroelectronics TPM devices. Requires DM_TPM support. |
| 1309 | |
| 1310 | CONFIG_TPM_ST33ZP24_I2C |
| 1311 | Support for STMicroelectronics ST33ZP24 I2C devices. |
| 1312 | Requires TPM_ST33ZP24 and I2C. |
| 1313 | |
Christophe Ricard | b75fdc1 | 2016-01-21 23:27:14 +0100 | [diff] [blame] | 1314 | CONFIG_TPM_ST33ZP24_SPI |
| 1315 | Support for STMicroelectronics ST33ZP24 SPI devices. |
| 1316 | Requires TPM_ST33ZP24 and SPI. |
| 1317 | |
Dirk Eibach | c01939c | 2013-06-26 15:55:15 +0200 | [diff] [blame] | 1318 | CONFIG_TPM_ATMEL_TWI |
| 1319 | Support for Atmel TWI TPM device. Requires I2C support. |
| 1320 | |
Che-liang Chiou | 90899cc | 2013-04-12 11:04:34 +0000 | [diff] [blame] | 1321 | CONFIG_TPM_TIS_LPC |
Vadim Bendebury | 5e12472 | 2011-10-17 08:36:14 +0000 | [diff] [blame] | 1322 | Support for generic parallel port TPM devices. Only one device |
| 1323 | per system is supported at this time. |
| 1324 | |
| 1325 | CONFIG_TPM_TIS_BASE_ADDRESS |
| 1326 | Base address where the generic TPM device is mapped |
| 1327 | to. Contemporary x86 systems usually map it at |
| 1328 | 0xfed40000. |
| 1329 | |
Reinhard Pfau | be6c152 | 2013-06-26 15:55:13 +0200 | [diff] [blame] | 1330 | CONFIG_CMD_TPM |
| 1331 | Add tpm monitor functions. |
| 1332 | Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also |
| 1333 | provides monitor access to authorized functions. |
| 1334 | |
| 1335 | CONFIG_TPM |
| 1336 | Define this to enable the TPM support library which provides |
| 1337 | functional interfaces to some TPM commands. |
| 1338 | Requires support for a TPM device. |
| 1339 | |
| 1340 | CONFIG_TPM_AUTH_SESSIONS |
| 1341 | Define this to enable authorized functions in the TPM library. |
| 1342 | Requires CONFIG_TPM and CONFIG_SHA1. |
| 1343 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1344 | - USB Support: |
| 1345 | At the moment only the UHCI host controller is |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 1346 | supported (PIP405, MIP405, MPC5200); define |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1347 | CONFIG_USB_UHCI to enable it. |
| 1348 | define CONFIG_USB_KEYBOARD to enable the USB Keyboard |
wdenk | 30d56fa | 2004-10-09 22:44:59 +0000 | [diff] [blame] | 1349 | and define CONFIG_USB_STORAGE to enable the USB |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1350 | storage devices. |
| 1351 | Note: |
| 1352 | Supported are USB Keyboards and USB Floppy drives |
| 1353 | (TEAC FD-05PUB). |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 1354 | MPC5200 USB requires additional defines: |
| 1355 | CONFIG_USB_CLOCK |
| 1356 | for 528 MHz Clock: 0x0001bbbb |
Eric Millbrandt | 307ecb6 | 2009-08-13 08:32:37 -0500 | [diff] [blame] | 1357 | CONFIG_PSC3_USB |
| 1358 | for USB on PSC3 |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 1359 | CONFIG_USB_CONFIG |
| 1360 | for differential drivers: 0x00001000 |
| 1361 | for single ended drivers: 0x00005000 |
Eric Millbrandt | 307ecb6 | 2009-08-13 08:32:37 -0500 | [diff] [blame] | 1362 | for differential drivers on PSC3: 0x00000100 |
| 1363 | for single ended drivers on PSC3: 0x00004100 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1364 | CONFIG_SYS_USB_EVENT_POLL |
Zhang Wei | fdcfaa1 | 2007-06-06 10:08:13 +0200 | [diff] [blame] | 1365 | May be defined to allow interrupt polling |
| 1366 | instead of using asynchronous interrupts |
wdenk | 4d13cba | 2004-03-14 14:09:05 +0000 | [diff] [blame] | 1367 | |
Simon Glass | 9ab4ce2 | 2012-02-27 10:52:47 +0000 | [diff] [blame] | 1368 | CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the |
| 1369 | txfilltuning field in the EHCI controller on reset. |
| 1370 | |
Oleksandr Tymoshenko | 6e9e062 | 2014-02-01 21:51:25 -0700 | [diff] [blame] | 1371 | CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 |
| 1372 | HW module registers. |
| 1373 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1374 | - USB Device: |
| 1375 | Define the below if you wish to use the USB console. |
| 1376 | Once firmware is rebuilt from a serial console issue the |
| 1377 | command "setenv stdin usbtty; setenv stdout usbtty" and |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1378 | attach your USB cable. The Unix command "dmesg" should print |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1379 | it has found a new device. The environment variable usbtty |
| 1380 | can be set to gserial or cdc_acm to enable your device to |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1381 | appear to a USB host as a Linux gserial device or a |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1382 | Common Device Class Abstract Control Model serial device. |
| 1383 | If you select usbtty = gserial you should be able to enumerate |
| 1384 | a Linux host by |
| 1385 | # modprobe usbserial vendor=0xVendorID product=0xProductID |
| 1386 | else if using cdc_acm, simply setting the environment |
| 1387 | variable usbtty to be cdc_acm should suffice. The following |
| 1388 | might be defined in YourBoardName.h |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1389 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1390 | CONFIG_USB_DEVICE |
| 1391 | Define this to build a UDC device |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1392 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1393 | CONFIG_USB_TTY |
| 1394 | Define this to have a tty type of device available to |
| 1395 | talk to the UDC device |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1396 | |
Vipin KUMAR | f9da0f8 | 2012-03-26 15:38:06 +0530 | [diff] [blame] | 1397 | CONFIG_USBD_HS |
| 1398 | Define this to enable the high speed support for usb |
| 1399 | device and usbtty. If this feature is enabled, a routine |
| 1400 | int is_usbd_high_speed(void) |
| 1401 | also needs to be defined by the driver to dynamically poll |
| 1402 | whether the enumeration has succeded at high speed or full |
| 1403 | speed. |
| 1404 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1405 | CONFIG_SYS_CONSOLE_IS_IN_ENV |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1406 | Define this if you want stdin, stdout &/or stderr to |
| 1407 | be set to usbtty. |
| 1408 | |
| 1409 | mpc8xx: |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1410 | CONFIG_SYS_USB_EXTC_CLK 0xBLAH |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1411 | Derive USB clock from external clock "blah" |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1412 | - CONFIG_SYS_USB_EXTC_CLK 0x02 |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1413 | |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1414 | If you have a USB-IF assigned VendorID then you may wish to |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1415 | define your own vendor specific values either in BoardName.h |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1416 | or directly in usbd_vendor_info.h. If you don't define |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1417 | CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME, |
| 1418 | CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot |
| 1419 | should pretend to be a Linux device to it's target host. |
| 1420 | |
| 1421 | CONFIG_USBD_MANUFACTURER |
| 1422 | Define this string as the name of your company for |
| 1423 | - CONFIG_USBD_MANUFACTURER "my company" |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1424 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1425 | CONFIG_USBD_PRODUCT_NAME |
| 1426 | Define this string as the name of your product |
| 1427 | - CONFIG_USBD_PRODUCT_NAME "acme usb device" |
| 1428 | |
| 1429 | CONFIG_USBD_VENDORID |
| 1430 | Define this as your assigned Vendor ID from the USB |
| 1431 | Implementors Forum. This *must* be a genuine Vendor ID |
| 1432 | to avoid polluting the USB namespace. |
| 1433 | - CONFIG_USBD_VENDORID 0xFFFF |
Wolfgang Denk | 386eda0 | 2006-06-14 18:14:56 +0200 | [diff] [blame] | 1434 | |
Wolfgang Denk | 16c8d5e | 2006-06-14 17:45:53 +0200 | [diff] [blame] | 1435 | CONFIG_USBD_PRODUCTID |
| 1436 | Define this as the unique Product ID |
| 1437 | for your device |
| 1438 | - CONFIG_USBD_PRODUCTID 0xFFFF |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1439 | |
Igor Grinberg | d70a560 | 2011-12-12 12:08:35 +0200 | [diff] [blame] | 1440 | - ULPI Layer Support: |
| 1441 | The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via |
| 1442 | the generic ULPI layer. The generic layer accesses the ULPI PHY |
| 1443 | via the platform viewport, so you need both the genric layer and |
| 1444 | the viewport enabled. Currently only Chipidea/ARC based |
| 1445 | viewport is supported. |
| 1446 | To enable the ULPI layer support, define CONFIG_USB_ULPI and |
| 1447 | CONFIG_USB_ULPI_VIEWPORT in your board configuration file. |
Lucas Stach | 6d365ea | 2012-10-01 00:44:35 +0200 | [diff] [blame] | 1448 | If your ULPI phy needs a different reference clock than the |
| 1449 | standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to |
| 1450 | the appropriate value in Hz. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1451 | |
| 1452 | - MMC Support: |
| 1453 | The MMC controller on the Intel PXA is supported. To |
| 1454 | enable this define CONFIG_MMC. The MMC can be |
| 1455 | accessed from the boot prompt by mapping the device |
| 1456 | to physical memory similar to flash. Command line is |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 1457 | enabled with CONFIG_CMD_MMC. The MMC driver also works with |
| 1458 | the FAT fs. This is enabled with CONFIG_CMD_FAT. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1459 | |
Yoshihiro Shimoda | afb3566 | 2011-07-04 22:21:22 +0000 | [diff] [blame] | 1460 | CONFIG_SH_MMCIF |
| 1461 | Support for Renesas on-chip MMCIF controller |
| 1462 | |
| 1463 | CONFIG_SH_MMCIF_ADDR |
| 1464 | Define the base address of MMCIF registers |
| 1465 | |
| 1466 | CONFIG_SH_MMCIF_CLK |
| 1467 | Define the clock frequency for MMCIF |
| 1468 | |
Pierre Aubert | 1fd93c6 | 2014-04-24 10:30:08 +0200 | [diff] [blame] | 1469 | CONFIG_GENERIC_MMC |
| 1470 | Enable the generic MMC driver |
| 1471 | |
| 1472 | CONFIG_SUPPORT_EMMC_BOOT |
| 1473 | Enable some additional features of the eMMC boot partitions. |
| 1474 | |
| 1475 | CONFIG_SUPPORT_EMMC_RPMB |
| 1476 | Enable the commands for reading, writing and programming the |
| 1477 | key for the Replay Protection Memory Block partition in eMMC. |
| 1478 | |
Tom Rini | b3ba6e9 | 2013-03-14 05:32:47 +0000 | [diff] [blame] | 1479 | - USB Device Firmware Update (DFU) class support: |
Paul Kocialkowski | 01acd6a | 2015-06-12 19:56:58 +0200 | [diff] [blame] | 1480 | CONFIG_USB_FUNCTION_DFU |
Tom Rini | b3ba6e9 | 2013-03-14 05:32:47 +0000 | [diff] [blame] | 1481 | This enables the USB portion of the DFU USB class |
| 1482 | |
| 1483 | CONFIG_CMD_DFU |
| 1484 | This enables the command "dfu" which is used to have |
| 1485 | U-Boot create a DFU class device via USB. This command |
| 1486 | requires that the "dfu_alt_info" environment variable be |
| 1487 | set and define the alt settings to expose to the host. |
| 1488 | |
| 1489 | CONFIG_DFU_MMC |
| 1490 | This enables support for exposing (e)MMC devices via DFU. |
| 1491 | |
Pantelis Antoniou | c663176 | 2013-03-14 05:32:52 +0000 | [diff] [blame] | 1492 | CONFIG_DFU_NAND |
| 1493 | This enables support for exposing NAND devices via DFU. |
| 1494 | |
Afzal Mohammed | a9479f0 | 2013-09-18 01:15:24 +0530 | [diff] [blame] | 1495 | CONFIG_DFU_RAM |
| 1496 | This enables support for exposing RAM via DFU. |
| 1497 | Note: DFU spec refer to non-volatile memory usage, but |
| 1498 | allow usages beyond the scope of spec - here RAM usage, |
| 1499 | one that would help mostly the developer. |
| 1500 | |
Heiko Schocher | e7e75c7 | 2013-06-12 06:05:51 +0200 | [diff] [blame] | 1501 | CONFIG_SYS_DFU_DATA_BUF_SIZE |
| 1502 | Dfu transfer uses a buffer before writing data to the |
| 1503 | raw storage device. Make the size (in bytes) of this buffer |
| 1504 | configurable. The size of this buffer is also configurable |
| 1505 | through the "dfu_bufsiz" environment variable. |
| 1506 | |
Pantelis Antoniou | ea2453d | 2013-03-14 05:32:48 +0000 | [diff] [blame] | 1507 | CONFIG_SYS_DFU_MAX_FILE_SIZE |
| 1508 | When updating files rather than the raw storage device, |
| 1509 | we use a static buffer to copy the file into and then write |
| 1510 | the buffer once we've been given the whole file. Define |
| 1511 | this to the maximum filesize (in bytes) for the buffer. |
| 1512 | Default is 4 MiB if undefined. |
| 1513 | |
Heiko Schocher | 001a831 | 2014-03-18 08:09:56 +0100 | [diff] [blame] | 1514 | DFU_DEFAULT_POLL_TIMEOUT |
| 1515 | Poll timeout [ms], is the timeout a device can send to the |
| 1516 | host. The host must wait for this timeout before sending |
| 1517 | a subsequent DFU_GET_STATUS request to the device. |
| 1518 | |
| 1519 | DFU_MANIFEST_POLL_TIMEOUT |
| 1520 | Poll timeout [ms], which the device sends to the host when |
| 1521 | entering dfuMANIFEST state. Host waits this timeout, before |
| 1522 | sending again an USB request to the device. |
| 1523 | |
Sebastian Siewior | 3aab70a | 2014-05-05 15:08:10 -0500 | [diff] [blame] | 1524 | - USB Device Android Fastboot support: |
Paul Kocialkowski | 17da3c0 | 2015-06-12 19:56:59 +0200 | [diff] [blame] | 1525 | CONFIG_USB_FUNCTION_FASTBOOT |
| 1526 | This enables the USB part of the fastboot gadget |
| 1527 | |
Sebastian Siewior | 3aab70a | 2014-05-05 15:08:10 -0500 | [diff] [blame] | 1528 | CONFIG_CMD_FASTBOOT |
| 1529 | This enables the command "fastboot" which enables the Android |
| 1530 | fastboot mode for the platform's USB device. Fastboot is a USB |
| 1531 | protocol for downloading images, flashing and device control |
| 1532 | used on Android devices. |
| 1533 | See doc/README.android-fastboot for more information. |
| 1534 | |
| 1535 | CONFIG_ANDROID_BOOT_IMAGE |
| 1536 | This enables support for booting images which use the Android |
| 1537 | image format header. |
| 1538 | |
Paul Kocialkowski | a588d99 | 2015-07-20 12:38:22 +0200 | [diff] [blame] | 1539 | CONFIG_FASTBOOT_BUF_ADDR |
Sebastian Siewior | 3aab70a | 2014-05-05 15:08:10 -0500 | [diff] [blame] | 1540 | The fastboot protocol requires a large memory buffer for |
| 1541 | downloads. Define this to the starting RAM address to use for |
| 1542 | downloaded images. |
| 1543 | |
Paul Kocialkowski | a588d99 | 2015-07-20 12:38:22 +0200 | [diff] [blame] | 1544 | CONFIG_FASTBOOT_BUF_SIZE |
Sebastian Siewior | 3aab70a | 2014-05-05 15:08:10 -0500 | [diff] [blame] | 1545 | The fastboot protocol requires a large memory buffer for |
| 1546 | downloads. This buffer should be as large as possible for a |
| 1547 | platform. Define this to the size available RAM for fastboot. |
| 1548 | |
Steve Rae | d1b5ed0 | 2014-08-26 11:47:28 -0700 | [diff] [blame] | 1549 | CONFIG_FASTBOOT_FLASH |
| 1550 | The fastboot protocol includes a "flash" command for writing |
| 1551 | the downloaded image to a non-volatile storage device. Define |
| 1552 | this to enable the "fastboot flash" command. |
| 1553 | |
| 1554 | CONFIG_FASTBOOT_FLASH_MMC_DEV |
| 1555 | The fastboot "flash" command requires additional information |
| 1556 | regarding the non-volatile storage device. Define this to |
| 1557 | the eMMC device that fastboot should use to store the image. |
| 1558 | |
Steve Rae | 0ff7e58 | 2014-12-12 15:51:54 -0800 | [diff] [blame] | 1559 | CONFIG_FASTBOOT_GPT_NAME |
| 1560 | The fastboot "flash" command supports writing the downloaded |
| 1561 | image to the Protective MBR and the Primary GUID Partition |
| 1562 | Table. (Additionally, this downloaded image is post-processed |
| 1563 | to generate and write the Backup GUID Partition Table.) |
| 1564 | This occurs when the specified "partition name" on the |
| 1565 | "fastboot flash" command line matches this value. |
Petr Kulhavy | 6f6c863 | 2016-09-09 10:27:18 +0200 | [diff] [blame] | 1566 | The default is "gpt" if undefined. |
Steve Rae | 0ff7e58 | 2014-12-12 15:51:54 -0800 | [diff] [blame] | 1567 | |
Petr Kulhavy | b6dd69a | 2016-09-09 10:27:16 +0200 | [diff] [blame] | 1568 | CONFIG_FASTBOOT_MBR_NAME |
| 1569 | The fastboot "flash" command supports writing the downloaded |
| 1570 | image to DOS MBR. |
| 1571 | This occurs when the "partition name" specified on the |
| 1572 | "fastboot flash" command line matches this value. |
| 1573 | If not defined the default value "mbr" is used. |
| 1574 | |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 1575 | - Journaling Flash filesystem support: |
Simon Glass | b2482df | 2016-10-02 18:00:59 -0600 | [diff] [blame] | 1576 | CONFIG_JFFS2_NAND |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 1577 | Define these for a default partition on a NAND device |
| 1578 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1579 | CONFIG_SYS_JFFS2_FIRST_SECTOR, |
| 1580 | CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 1581 | Define these for a default partition on a NOR device |
| 1582 | |
Donggeun Kim | c30a15e | 2011-10-24 21:15:28 +0000 | [diff] [blame] | 1583 | - FAT(File Allocation Table) filesystem write function support: |
| 1584 | CONFIG_FAT_WRITE |
Donggeun Kim | 656f4c6 | 2012-03-22 04:38:56 +0000 | [diff] [blame] | 1585 | |
| 1586 | Define this to enable support for saving memory data as a |
| 1587 | file in FAT formatted partition. |
| 1588 | |
| 1589 | This will also enable the command "fatwrite" enabling the |
| 1590 | user to write files to FAT. |
Donggeun Kim | c30a15e | 2011-10-24 21:15:28 +0000 | [diff] [blame] | 1591 | |
Gabe Black | 84cd932 | 2012-10-12 14:26:11 +0000 | [diff] [blame] | 1592 | CBFS (Coreboot Filesystem) support |
| 1593 | CONFIG_CMD_CBFS |
| 1594 | |
| 1595 | Define this to enable support for reading from a Coreboot |
| 1596 | filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls |
| 1597 | and cbfsload. |
| 1598 | |
Siva Durga Prasad Paladugu | 4f0d1a2 | 2014-05-26 19:18:37 +0530 | [diff] [blame] | 1599 | - FAT(File Allocation Table) filesystem cluster size: |
| 1600 | CONFIG_FS_FAT_MAX_CLUSTSIZE |
| 1601 | |
| 1602 | Define the max cluster size for fat operations else |
| 1603 | a default value of 65536 will be defined. |
| 1604 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1605 | - Keyboard Support: |
Simon Glass | 39f615e | 2015-11-11 10:05:47 -0700 | [diff] [blame] | 1606 | See Kconfig help for available keyboard drivers. |
| 1607 | |
| 1608 | CONFIG_KEYBOARD |
| 1609 | |
| 1610 | Define this to enable a custom keyboard support. |
| 1611 | This simply calls drv_keyboard_init() which must be |
| 1612 | defined in your board-specific files. This option is deprecated |
| 1613 | and is only used by novena. For new boards, use driver model |
| 1614 | instead. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1615 | |
| 1616 | - Video support: |
Timur Tabi | 7d3053f | 2011-02-15 17:09:19 -0600 | [diff] [blame] | 1617 | CONFIG_FSL_DIU_FB |
Wolfgang Denk | 04e5ae7 | 2011-09-11 21:24:09 +0200 | [diff] [blame] | 1618 | Enable the Freescale DIU video driver. Reference boards for |
Timur Tabi | 7d3053f | 2011-02-15 17:09:19 -0600 | [diff] [blame] | 1619 | SOCs that have a DIU should define this macro to enable DIU |
| 1620 | support, and should also define these other macros: |
| 1621 | |
| 1622 | CONFIG_SYS_DIU_ADDR |
| 1623 | CONFIG_VIDEO |
| 1624 | CONFIG_CMD_BMP |
| 1625 | CONFIG_CFB_CONSOLE |
| 1626 | CONFIG_VIDEO_SW_CURSOR |
| 1627 | CONFIG_VGA_AS_SINGLE_DEVICE |
| 1628 | CONFIG_VIDEO_LOGO |
| 1629 | CONFIG_VIDEO_BMP_LOGO |
| 1630 | |
Timur Tabi | ba8e76b | 2011-04-11 14:18:22 -0500 | [diff] [blame] | 1631 | The DIU driver will look for the 'video-mode' environment |
| 1632 | variable, and if defined, enable the DIU as a console during |
Fabio Estevam | 8eca943 | 2016-04-02 11:53:18 -0300 | [diff] [blame] | 1633 | boot. See the documentation file doc/README.video for a |
Timur Tabi | ba8e76b | 2011-04-11 14:18:22 -0500 | [diff] [blame] | 1634 | description of this variable. |
Timur Tabi | 7d3053f | 2011-02-15 17:09:19 -0600 | [diff] [blame] | 1635 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1636 | - LCD Support: CONFIG_LCD |
| 1637 | |
| 1638 | Define this to enable LCD support (for output to LCD |
| 1639 | display); also select one of the supported displays |
| 1640 | by defining one of these: |
| 1641 | |
Stelian Pop | 39cf480 | 2008-05-09 21:57:18 +0200 | [diff] [blame] | 1642 | CONFIG_ATMEL_LCD: |
| 1643 | |
| 1644 | HITACHI TX09D70VM1CCA, 3.5", 240x320. |
| 1645 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 1646 | CONFIG_NEC_NL6448AC33: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1647 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 1648 | NEC NL6448AC33-18. Active, color, single scan. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1649 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 1650 | CONFIG_NEC_NL6448BC20 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1651 | |
wdenk | fd3103b | 2003-11-25 16:55:19 +0000 | [diff] [blame] | 1652 | NEC NL6448BC20-08. 6.5", 640x480. |
| 1653 | Active, color, single scan. |
| 1654 | |
| 1655 | CONFIG_NEC_NL6448BC33_54 |
| 1656 | |
| 1657 | NEC NL6448BC33-54. 10.4", 640x480. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1658 | Active, color, single scan. |
| 1659 | |
| 1660 | CONFIG_SHARP_16x9 |
| 1661 | |
| 1662 | Sharp 320x240. Active, color, single scan. |
| 1663 | It isn't 16x9, and I am not sure what it is. |
| 1664 | |
| 1665 | CONFIG_SHARP_LQ64D341 |
| 1666 | |
| 1667 | Sharp LQ64D341 display, 640x480. |
| 1668 | Active, color, single scan. |
| 1669 | |
| 1670 | CONFIG_HLD1045 |
| 1671 | |
| 1672 | HLD1045 display, 640x480. |
| 1673 | Active, color, single scan. |
| 1674 | |
| 1675 | CONFIG_OPTREX_BW |
| 1676 | |
| 1677 | Optrex CBL50840-2 NF-FW 99 22 M5 |
| 1678 | or |
| 1679 | Hitachi LMG6912RPFC-00T |
| 1680 | or |
| 1681 | Hitachi SP14Q002 |
| 1682 | |
| 1683 | 320x240. Black & white. |
| 1684 | |
| 1685 | Normally display is black on white background; define |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1686 | CONFIG_SYS_WHITE_ON_BLACK to get it inverted. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1687 | |
Simon Glass | 676d319 | 2012-10-17 13:24:54 +0000 | [diff] [blame] | 1688 | CONFIG_LCD_ALIGNMENT |
| 1689 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1690 | Normally the LCD is page-aligned (typically 4KB). If this is |
Simon Glass | 676d319 | 2012-10-17 13:24:54 +0000 | [diff] [blame] | 1691 | defined then the LCD will be aligned to this value instead. |
| 1692 | For ARM it is sometimes useful to use MMU_SECTION_SIZE |
| 1693 | here, since it is cheaper to change data cache settings on |
| 1694 | a per-section basis. |
| 1695 | |
| 1696 | |
Hannes Petermaier | 604c7d4 | 2015-03-27 08:01:38 +0100 | [diff] [blame] | 1697 | CONFIG_LCD_ROTATION |
| 1698 | |
| 1699 | Sometimes, for example if the display is mounted in portrait |
| 1700 | mode or even if it's mounted landscape but rotated by 180degree, |
| 1701 | we need to rotate our content of the display relative to the |
| 1702 | framebuffer, so that user can read the messages which are |
| 1703 | printed out. |
| 1704 | Once CONFIG_LCD_ROTATION is defined, the lcd_console will be |
| 1705 | initialized with a given rotation from "vl_rot" out of |
| 1706 | "vidinfo_t" which is provided by the board specific code. |
| 1707 | The value for vl_rot is coded as following (matching to |
| 1708 | fbcon=rotate:<n> linux-kernel commandline): |
| 1709 | 0 = no rotation respectively 0 degree |
| 1710 | 1 = 90 degree rotation |
| 1711 | 2 = 180 degree rotation |
| 1712 | 3 = 270 degree rotation |
| 1713 | |
| 1714 | If CONFIG_LCD_ROTATION is not defined, the console will be |
| 1715 | initialized with 0degree rotation. |
| 1716 | |
Tom Wai-Hong Tam | 45d7f52 | 2012-09-28 15:11:16 +0000 | [diff] [blame] | 1717 | CONFIG_LCD_BMP_RLE8 |
| 1718 | |
| 1719 | Support drawing of RLE8-compressed bitmaps on the LCD. |
| 1720 | |
Tom Wai-Hong Tam | 735987c | 2012-12-05 14:46:40 +0000 | [diff] [blame] | 1721 | CONFIG_I2C_EDID |
| 1722 | |
| 1723 | Enables an 'i2c edid' command which can read EDID |
| 1724 | information over I2C from an attached LCD display. |
| 1725 | |
wdenk | 7152b1d | 2003-09-05 23:19:14 +0000 | [diff] [blame] | 1726 | - Splash Screen Support: CONFIG_SPLASH_SCREEN |
wdenk | d791b1d | 2003-04-20 14:04:18 +0000 | [diff] [blame] | 1727 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 1728 | If this option is set, the environment is checked for |
| 1729 | a variable "splashimage". If found, the usual display |
| 1730 | of logo, copyright and system information on the LCD |
wdenk | e94d2cd | 2004-06-30 22:59:18 +0000 | [diff] [blame] | 1731 | is suppressed and the BMP image at the address |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 1732 | specified in "splashimage" is loaded instead. The |
| 1733 | console is redirected to the "nulldev", too. This |
| 1734 | allows for a "silent" boot where a splash screen is |
| 1735 | loaded very quickly after power-on. |
wdenk | d791b1d | 2003-04-20 14:04:18 +0000 | [diff] [blame] | 1736 | |
Nikita Kiryanov | c088048 | 2013-02-24 21:28:43 +0000 | [diff] [blame] | 1737 | CONFIG_SPLASHIMAGE_GUARD |
| 1738 | |
| 1739 | If this option is set, then U-Boot will prevent the environment |
| 1740 | variable "splashimage" from being set to a problematic address |
Fabio Estevam | ab5645f | 2016-03-23 12:46:12 -0300 | [diff] [blame] | 1741 | (see doc/README.displaying-bmps). |
Nikita Kiryanov | c088048 | 2013-02-24 21:28:43 +0000 | [diff] [blame] | 1742 | This option is useful for targets where, due to alignment |
| 1743 | restrictions, an improperly aligned BMP image will cause a data |
| 1744 | abort. If you think you will not have problems with unaligned |
| 1745 | accesses (for example because your toolchain prevents them) |
| 1746 | there is no need to set this option. |
| 1747 | |
Matthias Weisser | 1ca298c | 2009-07-09 16:07:30 +0200 | [diff] [blame] | 1748 | CONFIG_SPLASH_SCREEN_ALIGN |
| 1749 | |
| 1750 | If this option is set the splash image can be freely positioned |
| 1751 | on the screen. Environment variable "splashpos" specifies the |
| 1752 | position as "x,y". If a positive number is given it is used as |
| 1753 | number of pixel from left/top. If a negative number is given it |
| 1754 | is used as number of pixel from right/bottom. You can also |
| 1755 | specify 'm' for centering the image. |
| 1756 | |
| 1757 | Example: |
| 1758 | setenv splashpos m,m |
| 1759 | => image at center of screen |
| 1760 | |
| 1761 | setenv splashpos 30,20 |
| 1762 | => image at x = 30 and y = 20 |
| 1763 | |
| 1764 | setenv splashpos -10,m |
| 1765 | => vertically centered image |
| 1766 | at x = dspWidth - bmpWidth - 9 |
| 1767 | |
Stefan Roese | 98f4a3d | 2005-09-22 09:04:17 +0200 | [diff] [blame] | 1768 | - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP |
| 1769 | |
| 1770 | If this option is set, additionally to standard BMP |
| 1771 | images, gzipped BMP images can be displayed via the |
| 1772 | splashscreen support or the bmp command. |
| 1773 | |
Anatolij Gustschin | d501176 | 2010-03-15 14:50:25 +0100 | [diff] [blame] | 1774 | - Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8 |
| 1775 | |
| 1776 | If this option is set, 8-bit RLE compressed BMP images |
| 1777 | can be displayed via the splashscreen support or the |
| 1778 | bmp command. |
| 1779 | |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 1780 | - Do compressing for memory range: |
Lei Wen | f2b96df | 2012-09-28 04:26:47 +0000 | [diff] [blame] | 1781 | CONFIG_CMD_ZIP |
| 1782 | |
| 1783 | If this option is set, it would use zlib deflate method |
| 1784 | to compress the specified memory at its best effort. |
| 1785 | |
wdenk | c29fdfc | 2003-08-29 20:57:53 +0000 | [diff] [blame] | 1786 | - Compression support: |
Kees Cook | 8ef7047 | 2013-08-16 07:59:12 -0700 | [diff] [blame] | 1787 | CONFIG_GZIP |
| 1788 | |
| 1789 | Enabled by default to support gzip compressed images. |
| 1790 | |
wdenk | c29fdfc | 2003-08-29 20:57:53 +0000 | [diff] [blame] | 1791 | CONFIG_BZIP2 |
| 1792 | |
| 1793 | If this option is set, support for bzip2 compressed |
| 1794 | images is included. If not, only uncompressed and gzip |
| 1795 | compressed images are supported. |
| 1796 | |
wdenk | 42d1f03 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 1797 | NOTE: the bzip2 algorithm requires a lot of RAM, so |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1798 | the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should |
wdenk | 42d1f03 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 1799 | be at least 4MB. |
wdenk | d791b1d | 2003-04-20 14:04:18 +0000 | [diff] [blame] | 1800 | |
Luigi 'Comio' Mantellini | fc9c172 | 2008-09-08 02:46:13 +0200 | [diff] [blame] | 1801 | CONFIG_LZMA |
| 1802 | |
| 1803 | If this option is set, support for lzma compressed |
| 1804 | images is included. |
| 1805 | |
| 1806 | Note: The LZMA algorithm adds between 2 and 4KB of code and it |
| 1807 | requires an amount of dynamic memory that is given by the |
| 1808 | formula: |
| 1809 | |
| 1810 | (1846 + 768 << (lc + lp)) * sizeof(uint16) |
| 1811 | |
| 1812 | Where lc and lp stand for, respectively, Literal context bits |
| 1813 | and Literal pos bits. |
| 1814 | |
| 1815 | This value is upper-bounded by 14MB in the worst case. Anyway, |
| 1816 | for a ~4MB large kernel image, we have lc=3 and lp=0 for a |
| 1817 | total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is |
| 1818 | a very small buffer. |
| 1819 | |
| 1820 | Use the lzmainfo tool to determinate the lc and lp values and |
| 1821 | then calculate the amount of needed dynamic memory (ensuring |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 1822 | the appropriate CONFIG_SYS_MALLOC_LEN value). |
Luigi 'Comio' Mantellini | fc9c172 | 2008-09-08 02:46:13 +0200 | [diff] [blame] | 1823 | |
Kees Cook | 8ef7047 | 2013-08-16 07:59:12 -0700 | [diff] [blame] | 1824 | CONFIG_LZO |
| 1825 | |
| 1826 | If this option is set, support for LZO compressed images |
| 1827 | is included. |
| 1828 | |
wdenk | 17ea117 | 2004-06-06 21:51:03 +0000 | [diff] [blame] | 1829 | - MII/PHY support: |
| 1830 | CONFIG_PHY_ADDR |
| 1831 | |
| 1832 | The address of PHY on MII bus. |
| 1833 | |
| 1834 | CONFIG_PHY_CLOCK_FREQ (ppc4xx) |
| 1835 | |
| 1836 | The clock frequency of the MII bus |
| 1837 | |
| 1838 | CONFIG_PHY_GIGE |
| 1839 | |
| 1840 | If this option is set, support for speed/duplex |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1841 | detection of gigabit PHY is included. |
wdenk | 17ea117 | 2004-06-06 21:51:03 +0000 | [diff] [blame] | 1842 | |
| 1843 | CONFIG_PHY_RESET_DELAY |
| 1844 | |
| 1845 | Some PHY like Intel LXT971A need extra delay after |
| 1846 | reset before any MII register access is possible. |
| 1847 | For such PHY, set this option to the usec delay |
| 1848 | required. (minimum 300usec for LXT971A) |
| 1849 | |
| 1850 | CONFIG_PHY_CMD_DELAY (ppc4xx) |
| 1851 | |
| 1852 | Some PHY like Intel LXT971A need extra delay after |
| 1853 | command issued before MII status register can be read |
| 1854 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1855 | - IP address: |
| 1856 | CONFIG_IPADDR |
| 1857 | |
| 1858 | Define a default value for the IP address to use for |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1859 | the default Ethernet interface, in case this is not |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1860 | determined through e.g. bootp. |
Wolfgang Denk | 1ebcd65 | 2011-10-26 10:21:22 +0000 | [diff] [blame] | 1861 | (Environment variable "ipaddr") |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1862 | |
| 1863 | - Server IP address: |
| 1864 | CONFIG_SERVERIP |
| 1865 | |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1866 | Defines a default value for the IP address of a TFTP |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1867 | server to contact when using the "tftboot" command. |
Wolfgang Denk | 1ebcd65 | 2011-10-26 10:21:22 +0000 | [diff] [blame] | 1868 | (Environment variable "serverip") |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1869 | |
Robin Getz | 97cfe86 | 2009-07-21 12:15:28 -0400 | [diff] [blame] | 1870 | CONFIG_KEEP_SERVERADDR |
| 1871 | |
| 1872 | Keeps the server's MAC address, in the env 'serveraddr' |
| 1873 | for passing to bootargs (like Linux's netconsole option) |
| 1874 | |
Wolfgang Denk | 1ebcd65 | 2011-10-26 10:21:22 +0000 | [diff] [blame] | 1875 | - Gateway IP address: |
| 1876 | CONFIG_GATEWAYIP |
| 1877 | |
| 1878 | Defines a default value for the IP address of the |
| 1879 | default router where packets to other networks are |
| 1880 | sent to. |
| 1881 | (Environment variable "gatewayip") |
| 1882 | |
| 1883 | - Subnet mask: |
| 1884 | CONFIG_NETMASK |
| 1885 | |
| 1886 | Defines a default value for the subnet mask (or |
| 1887 | routing prefix) which is used to determine if an IP |
| 1888 | address belongs to the local subnet or needs to be |
| 1889 | forwarded through a router. |
| 1890 | (Environment variable "netmask") |
| 1891 | |
David Updegraff | 53a5c42 | 2007-06-11 10:41:07 -0500 | [diff] [blame] | 1892 | - Multicast TFTP Mode: |
| 1893 | CONFIG_MCAST_TFTP |
| 1894 | |
| 1895 | Defines whether you want to support multicast TFTP as per |
| 1896 | rfc-2090; for example to work with atftp. Lets lots of targets |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 1897 | tftp down the same boot image concurrently. Note: the Ethernet |
David Updegraff | 53a5c42 | 2007-06-11 10:41:07 -0500 | [diff] [blame] | 1898 | driver in use must provide a function: mcast() to join/leave a |
| 1899 | multicast group. |
| 1900 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1901 | - BOOTP Recovery Mode: |
| 1902 | CONFIG_BOOTP_RANDOM_DELAY |
| 1903 | |
| 1904 | If you have many targets in a network that try to |
| 1905 | boot using BOOTP, you may want to avoid that all |
| 1906 | systems send out BOOTP requests at precisely the same |
| 1907 | moment (which would happen for instance at recovery |
| 1908 | from a power failure, when all systems will try to |
| 1909 | boot, thus flooding the BOOTP server. Defining |
| 1910 | CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be |
| 1911 | inserted before sending out BOOTP requests. The |
Wolfgang Denk | 6c33c78 | 2007-08-06 23:21:05 +0200 | [diff] [blame] | 1912 | following delays are inserted then: |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1913 | |
| 1914 | 1st BOOTP request: delay 0 ... 1 sec |
| 1915 | 2nd BOOTP request: delay 0 ... 2 sec |
| 1916 | 3rd BOOTP request: delay 0 ... 4 sec |
| 1917 | 4th and following |
| 1918 | BOOTP requests: delay 0 ... 8 sec |
| 1919 | |
Thierry Reding | 92ac8ac | 2014-08-19 10:21:24 +0200 | [diff] [blame] | 1920 | CONFIG_BOOTP_ID_CACHE_SIZE |
| 1921 | |
| 1922 | BOOTP packets are uniquely identified using a 32-bit ID. The |
| 1923 | server will copy the ID from client requests to responses and |
| 1924 | U-Boot will use this to determine if it is the destination of |
| 1925 | an incoming response. Some servers will check that addresses |
| 1926 | aren't in use before handing them out (usually using an ARP |
| 1927 | ping) and therefore take up to a few hundred milliseconds to |
| 1928 | respond. Network congestion may also influence the time it |
| 1929 | takes for a response to make it back to the client. If that |
| 1930 | time is too long, U-Boot will retransmit requests. In order |
| 1931 | to allow earlier responses to still be accepted after these |
| 1932 | retransmissions, U-Boot's BOOTP client keeps a small cache of |
| 1933 | IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this |
| 1934 | cache. The default is to keep IDs for up to four outstanding |
| 1935 | requests. Increasing this will allow U-Boot to accept offers |
| 1936 | from a BOOTP client in networks with unusually high latency. |
| 1937 | |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1938 | - DHCP Advanced Options: |
Jon Loeliger | 1fe80d7 | 2007-07-09 22:08:34 -0500 | [diff] [blame] | 1939 | You can fine tune the DHCP functionality by defining |
| 1940 | CONFIG_BOOTP_* symbols: |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1941 | |
Jon Loeliger | 1fe80d7 | 2007-07-09 22:08:34 -0500 | [diff] [blame] | 1942 | CONFIG_BOOTP_SUBNETMASK |
| 1943 | CONFIG_BOOTP_GATEWAY |
| 1944 | CONFIG_BOOTP_HOSTNAME |
| 1945 | CONFIG_BOOTP_NISDOMAIN |
| 1946 | CONFIG_BOOTP_BOOTPATH |
| 1947 | CONFIG_BOOTP_BOOTFILESIZE |
| 1948 | CONFIG_BOOTP_DNS |
| 1949 | CONFIG_BOOTP_DNS2 |
| 1950 | CONFIG_BOOTP_SEND_HOSTNAME |
| 1951 | CONFIG_BOOTP_NTPSERVER |
| 1952 | CONFIG_BOOTP_TIMEOFFSET |
| 1953 | CONFIG_BOOTP_VENDOREX |
Joe Hershberger | 2c00e09 | 2012-05-23 07:59:19 +0000 | [diff] [blame] | 1954 | CONFIG_BOOTP_MAY_FAIL |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1955 | |
Wilson Callan | 5d110f0 | 2007-07-28 10:56:13 -0400 | [diff] [blame] | 1956 | CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip |
| 1957 | environment variable, not the BOOTP server. |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1958 | |
Joe Hershberger | 2c00e09 | 2012-05-23 07:59:19 +0000 | [diff] [blame] | 1959 | CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found |
| 1960 | after the configured retry count, the call will fail |
| 1961 | instead of starting over. This can be used to fail over |
| 1962 | to Link-local IP address configuration if the DHCP server |
| 1963 | is not available. |
| 1964 | |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1965 | CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS |
| 1966 | serverip from a DHCP server, it is possible that more |
| 1967 | than one DNS serverip is offered to the client. |
| 1968 | If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS |
| 1969 | serverip will be stored in the additional environment |
| 1970 | variable "dnsip2". The first DNS serverip is always |
| 1971 | stored in the variable "dnsip", when CONFIG_BOOTP_DNS |
Jon Loeliger | 1fe80d7 | 2007-07-09 22:08:34 -0500 | [diff] [blame] | 1972 | is defined. |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1973 | |
| 1974 | CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable |
| 1975 | to do a dynamic update of a DNS server. To do this, they |
| 1976 | need the hostname of the DHCP requester. |
Wilson Callan | 5d110f0 | 2007-07-28 10:56:13 -0400 | [diff] [blame] | 1977 | If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content |
Jon Loeliger | 1fe80d7 | 2007-07-09 22:08:34 -0500 | [diff] [blame] | 1978 | of the "hostname" environment variable is passed as |
| 1979 | option 12 to the DHCP server. |
stroese | fe389a8 | 2003-08-28 14:17:32 +0000 | [diff] [blame] | 1980 | |
Aras Vaichas | d9a2f41 | 2008-03-26 09:43:57 +1100 | [diff] [blame] | 1981 | CONFIG_BOOTP_DHCP_REQUEST_DELAY |
| 1982 | |
| 1983 | A 32bit value in microseconds for a delay between |
| 1984 | receiving a "DHCP Offer" and sending the "DHCP Request". |
| 1985 | This fixes a problem with certain DHCP servers that don't |
| 1986 | respond 100% of the time to a "DHCP request". E.g. On an |
| 1987 | AT91RM9200 processor running at 180MHz, this delay needed |
| 1988 | to be *at least* 15,000 usec before a Windows Server 2003 |
| 1989 | DHCP server would reply 100% of the time. I recommend at |
| 1990 | least 50,000 usec to be safe. The alternative is to hope |
| 1991 | that one of the retries will be successful but note that |
| 1992 | the DHCP timeout and retry process takes a longer than |
| 1993 | this delay. |
| 1994 | |
Joe Hershberger | d22c338 | 2012-05-23 08:00:12 +0000 | [diff] [blame] | 1995 | - Link-local IP address negotiation: |
| 1996 | Negotiate with other link-local clients on the local network |
| 1997 | for an address that doesn't require explicit configuration. |
| 1998 | This is especially useful if a DHCP server cannot be guaranteed |
| 1999 | to exist in all environments that the device must operate. |
| 2000 | |
| 2001 | See doc/README.link-local for more information. |
| 2002 | |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 2003 | - CDP Options: |
wdenk | 6e59238 | 2004-04-18 17:39:38 +0000 | [diff] [blame] | 2004 | CONFIG_CDP_DEVICE_ID |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 2005 | |
| 2006 | The device id used in CDP trigger frames. |
| 2007 | |
| 2008 | CONFIG_CDP_DEVICE_ID_PREFIX |
| 2009 | |
| 2010 | A two character string which is prefixed to the MAC address |
| 2011 | of the device. |
| 2012 | |
| 2013 | CONFIG_CDP_PORT_ID |
| 2014 | |
| 2015 | A printf format string which contains the ascii name of |
| 2016 | the port. Normally is set to "eth%d" which sets |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 2017 | eth0 for the first Ethernet, eth1 for the second etc. |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 2018 | |
| 2019 | CONFIG_CDP_CAPABILITIES |
| 2020 | |
| 2021 | A 32bit integer which indicates the device capabilities; |
| 2022 | 0x00000010 for a normal host which does not forwards. |
| 2023 | |
| 2024 | CONFIG_CDP_VERSION |
| 2025 | |
| 2026 | An ascii string containing the version of the software. |
| 2027 | |
| 2028 | CONFIG_CDP_PLATFORM |
| 2029 | |
| 2030 | An ascii string containing the name of the platform. |
| 2031 | |
| 2032 | CONFIG_CDP_TRIGGER |
| 2033 | |
| 2034 | A 32bit integer sent on the trigger. |
| 2035 | |
| 2036 | CONFIG_CDP_POWER_CONSUMPTION |
| 2037 | |
| 2038 | A 16bit integer containing the power consumption of the |
| 2039 | device in .1 of milliwatts. |
| 2040 | |
| 2041 | CONFIG_CDP_APPLIANCE_VLAN_TYPE |
| 2042 | |
| 2043 | A byte containing the id of the VLAN. |
| 2044 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2045 | - Status LED: CONFIG_STATUS_LED |
| 2046 | |
| 2047 | Several configurations allow to display the current |
| 2048 | status using a LED. For instance, the LED will blink |
| 2049 | fast while running U-Boot code, stop blinking as |
| 2050 | soon as a reply to a BOOTP request was received, and |
| 2051 | start blinking slow once the Linux kernel is running |
| 2052 | (supported by a status LED driver in the Linux |
| 2053 | kernel). Defining CONFIG_STATUS_LED enables this |
| 2054 | feature in U-Boot. |
| 2055 | |
Igor Grinberg | 1df7bbb | 2013-11-08 01:03:50 +0200 | [diff] [blame] | 2056 | Additional options: |
| 2057 | |
| 2058 | CONFIG_GPIO_LED |
| 2059 | The status LED can be connected to a GPIO pin. |
| 2060 | In such cases, the gpio_led driver can be used as a |
| 2061 | status LED backend implementation. Define CONFIG_GPIO_LED |
| 2062 | to include the gpio_led driver in the U-Boot binary. |
| 2063 | |
Igor Grinberg | 9dfdcdf | 2013-11-08 01:03:52 +0200 | [diff] [blame] | 2064 | CONFIG_GPIO_LED_INVERTED_TABLE |
| 2065 | Some GPIO connected LEDs may have inverted polarity in which |
| 2066 | case the GPIO high value corresponds to LED off state and |
| 2067 | GPIO low value corresponds to LED on state. |
| 2068 | In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined |
| 2069 | with a list of GPIO LEDs that have inverted polarity. |
| 2070 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2071 | - CAN Support: CONFIG_CAN_DRIVER |
| 2072 | |
| 2073 | Defining CONFIG_CAN_DRIVER enables CAN driver support |
| 2074 | on those systems that support this (optional) |
| 2075 | feature, like the TQM8xxL modules. |
| 2076 | |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2077 | - I2C Support: CONFIG_SYS_I2C |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2078 | |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2079 | This enable the NEW i2c subsystem, and will allow you to use |
| 2080 | i2c commands at the u-boot command line (as long as you set |
| 2081 | CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c |
| 2082 | based realtime clock chips or other i2c devices. See |
| 2083 | common/cmd_i2c.c for a description of the command line |
| 2084 | interface. |
| 2085 | |
| 2086 | ported i2c driver to the new framework: |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2087 | - drivers/i2c/soft_i2c.c: |
| 2088 | - activate first bus with CONFIG_SYS_I2C_SOFT define |
| 2089 | CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE |
| 2090 | for defining speed and slave address |
| 2091 | - activate second bus with I2C_SOFT_DECLARATIONS2 define |
| 2092 | CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2 |
| 2093 | for defining speed and slave address |
| 2094 | - activate third bus with I2C_SOFT_DECLARATIONS3 define |
| 2095 | CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3 |
| 2096 | for defining speed and slave address |
| 2097 | - activate fourth bus with I2C_SOFT_DECLARATIONS4 define |
| 2098 | CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4 |
| 2099 | for defining speed and slave address |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2100 | |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 2101 | - drivers/i2c/fsl_i2c.c: |
| 2102 | - activate i2c driver with CONFIG_SYS_I2C_FSL |
| 2103 | define CONFIG_SYS_FSL_I2C_OFFSET for setting the register |
| 2104 | offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and |
| 2105 | CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first |
| 2106 | bus. |
Wolfgang Denk | 93e1459 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 2107 | - If your board supports a second fsl i2c bus, define |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 2108 | CONFIG_SYS_FSL_I2C2_OFFSET for the register offset |
| 2109 | CONFIG_SYS_FSL_I2C2_SPEED for the speed and |
| 2110 | CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the |
| 2111 | second bus. |
| 2112 | |
Simon Glass | 1f2ba72 | 2012-10-30 07:28:53 +0000 | [diff] [blame] | 2113 | - drivers/i2c/tegra_i2c.c: |
Nobuhiro Iwamatsu | 10cee51 | 2013-10-11 16:23:53 +0900 | [diff] [blame] | 2114 | - activate this driver with CONFIG_SYS_I2C_TEGRA |
| 2115 | - This driver adds 4 i2c buses with a fix speed from |
| 2116 | 100000 and the slave addr 0! |
Simon Glass | 1f2ba72 | 2012-10-30 07:28:53 +0000 | [diff] [blame] | 2117 | |
Dirk Eibach | 880540d | 2013-04-25 02:40:01 +0000 | [diff] [blame] | 2118 | - drivers/i2c/ppc4xx_i2c.c |
| 2119 | - activate this driver with CONFIG_SYS_I2C_PPC4XX |
| 2120 | - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0 |
| 2121 | - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1 |
| 2122 | |
trem | fac9640 | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 2123 | - drivers/i2c/i2c_mxc.c |
| 2124 | - activate this driver with CONFIG_SYS_I2C_MXC |
Albert ARIBAUD \\(3ADEV\\) | 03544c6 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 2125 | - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1 |
| 2126 | - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2 |
| 2127 | - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3 |
| 2128 | - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4 |
trem | fac9640 | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 2129 | - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED |
| 2130 | - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE |
| 2131 | - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED |
| 2132 | - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE |
| 2133 | - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED |
| 2134 | - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE |
Albert ARIBAUD \\(3ADEV\\) | 03544c6 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 2135 | - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED |
| 2136 | - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 2137 | If those defines are not set, default value is 100000 |
trem | fac9640 | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 2138 | for speed, and 0 for slave. |
| 2139 | |
Nobuhiro Iwamatsu | 1086bfa | 2013-09-27 16:58:30 +0900 | [diff] [blame] | 2140 | - drivers/i2c/rcar_i2c.c: |
| 2141 | - activate this driver with CONFIG_SYS_I2C_RCAR |
| 2142 | - This driver adds 4 i2c buses |
| 2143 | |
| 2144 | - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0 |
| 2145 | - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0 |
| 2146 | - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1 |
| 2147 | - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1 |
| 2148 | - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2 |
| 2149 | - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2 |
| 2150 | - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3 |
| 2151 | - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3 |
| 2152 | - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses |
| 2153 | |
Nobuhiro Iwamatsu | 2035d77 | 2013-10-29 13:33:51 +0900 | [diff] [blame] | 2154 | - drivers/i2c/sh_i2c.c: |
| 2155 | - activate this driver with CONFIG_SYS_I2C_SH |
| 2156 | - This driver adds from 2 to 5 i2c buses |
| 2157 | |
| 2158 | - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0 |
| 2159 | - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0 |
| 2160 | - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1 |
| 2161 | - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1 |
| 2162 | - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2 |
| 2163 | - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2 |
| 2164 | - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3 |
| 2165 | - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3 |
| 2166 | - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4 |
| 2167 | - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4 |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 2168 | - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses |
Nobuhiro Iwamatsu | 2035d77 | 2013-10-29 13:33:51 +0900 | [diff] [blame] | 2169 | |
Heiko Schocher | 6789e84 | 2013-10-22 11:03:18 +0200 | [diff] [blame] | 2170 | - drivers/i2c/omap24xx_i2c.c |
| 2171 | - activate this driver with CONFIG_SYS_I2C_OMAP24XX |
| 2172 | - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0 |
| 2173 | - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0 |
| 2174 | - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1 |
| 2175 | - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1 |
| 2176 | - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2 |
| 2177 | - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2 |
| 2178 | - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3 |
| 2179 | - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3 |
| 2180 | - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4 |
| 2181 | - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4 |
| 2182 | |
Heiko Schocher | 0bdffe7 | 2013-11-08 07:30:53 +0100 | [diff] [blame] | 2183 | - drivers/i2c/zynq_i2c.c |
| 2184 | - activate this driver with CONFIG_SYS_I2C_ZYNQ |
| 2185 | - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting |
| 2186 | - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr |
| 2187 | |
Naveen Krishna Ch | e717fc6 | 2013-12-06 12:12:38 +0530 | [diff] [blame] | 2188 | - drivers/i2c/s3c24x0_i2c.c: |
| 2189 | - activate this driver with CONFIG_SYS_I2C_S3C24X0 |
| 2190 | - This driver adds i2c buses (11 for Exynos5250, Exynos5420 |
| 2191 | 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung) |
| 2192 | with a fix speed from 100000 and the slave addr 0! |
| 2193 | |
Dirk Eibach | b46226b | 2014-07-03 09:28:18 +0200 | [diff] [blame] | 2194 | - drivers/i2c/ihs_i2c.c |
| 2195 | - activate this driver with CONFIG_SYS_I2C_IHS |
| 2196 | - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0 |
| 2197 | - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0 |
| 2198 | - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0 |
| 2199 | - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1 |
| 2200 | - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1 |
| 2201 | - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1 |
| 2202 | - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2 |
| 2203 | - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2 |
| 2204 | - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2 |
| 2205 | - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3 |
| 2206 | - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3 |
| 2207 | - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3 |
Dirk Eibach | 071be89 | 2015-10-28 11:46:22 +0100 | [diff] [blame] | 2208 | - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL |
| 2209 | - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1 |
| 2210 | - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1 |
| 2211 | - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1 |
| 2212 | - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1 |
| 2213 | - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1 |
| 2214 | - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1 |
| 2215 | - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1 |
| 2216 | - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1 |
Dirk Eibach | b46226b | 2014-07-03 09:28:18 +0200 | [diff] [blame] | 2217 | |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2218 | additional defines: |
| 2219 | |
| 2220 | CONFIG_SYS_NUM_I2C_BUSES |
Simon Glass | 945a18e | 2016-10-02 18:01:05 -0600 | [diff] [blame] | 2221 | Hold the number of i2c buses you want to use. |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2222 | |
| 2223 | CONFIG_SYS_I2C_DIRECT_BUS |
| 2224 | define this, if you don't use i2c muxes on your hardware. |
| 2225 | if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can |
| 2226 | omit this define. |
| 2227 | |
| 2228 | CONFIG_SYS_I2C_MAX_HOPS |
| 2229 | define how many muxes are maximal consecutively connected |
| 2230 | on one i2c bus. If you not use i2c muxes, omit this |
| 2231 | define. |
| 2232 | |
| 2233 | CONFIG_SYS_I2C_BUSES |
Jeremiah Mahler | b445bbb | 2015-01-04 18:56:50 -0800 | [diff] [blame] | 2234 | hold a list of buses you want to use, only used if |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2235 | CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example |
| 2236 | a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and |
| 2237 | CONFIG_SYS_NUM_I2C_BUSES = 9: |
| 2238 | |
| 2239 | CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \ |
| 2240 | {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \ |
| 2241 | {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \ |
| 2242 | {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \ |
| 2243 | {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \ |
| 2244 | {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \ |
| 2245 | {1, {I2C_NULL_HOP}}, \ |
| 2246 | {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \ |
| 2247 | {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \ |
| 2248 | } |
| 2249 | |
| 2250 | which defines |
| 2251 | bus 0 on adapter 0 without a mux |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2252 | bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1 |
| 2253 | bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2 |
| 2254 | bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3 |
| 2255 | bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4 |
| 2256 | bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5 |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2257 | bus 6 on adapter 1 without a mux |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2258 | bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1 |
| 2259 | bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2 |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2260 | |
| 2261 | If you do not have i2c muxes on your board, omit this define. |
| 2262 | |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2263 | - Legacy I2C Support: CONFIG_HARD_I2C |
Heiko Schocher | 3f4978c | 2012-01-16 21:12:24 +0000 | [diff] [blame] | 2264 | |
| 2265 | NOTE: It is intended to move drivers to CONFIG_SYS_I2C which |
| 2266 | provides the following compelling advantages: |
| 2267 | |
| 2268 | - more than one i2c adapter is usable |
| 2269 | - approved multibus support |
| 2270 | - better i2c mux support |
| 2271 | |
| 2272 | ** Please consider updating your I2C driver now. ** |
| 2273 | |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2274 | These enable legacy I2C serial bus commands. Defining |
| 2275 | CONFIG_HARD_I2C will include the appropriate I2C driver |
| 2276 | for the selected CPU. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2277 | |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 2278 | This will allow you to use i2c commands at the u-boot |
Jon Loeliger | 602ad3b | 2007-06-11 19:03:39 -0500 | [diff] [blame] | 2279 | command line (as long as you set CONFIG_CMD_I2C in |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2280 | CONFIG_COMMANDS) and communicate with i2c based realtime |
| 2281 | clock chips. See common/cmd_i2c.c for a description of the |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 2282 | command line interface. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2283 | |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2284 | CONFIG_HARD_I2C selects a hardware I2C controller. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2285 | |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 2286 | There are several other quantities that must also be |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2287 | defined when you define CONFIG_HARD_I2C. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2288 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2289 | In both cases you will need to define CONFIG_SYS_I2C_SPEED |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 2290 | to be the frequency (in Hz) at which you wish your i2c bus |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2291 | to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie |
Marcel Ziswiler | 11ccc33 | 2008-07-09 08:17:15 +0200 | [diff] [blame] | 2292 | the CPU's i2c node address). |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 2293 | |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 2294 | Now, the u-boot i2c code for the mpc8xx |
Stefan Roese | a47a12b | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 2295 | (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node |
Peter Tyser | 8d321b8 | 2010-04-12 22:28:21 -0500 | [diff] [blame] | 2296 | and so its address should therefore be cleared to 0 (See, |
| 2297 | eg, MPC823e User's Manual p.16-473). So, set |
| 2298 | CONFIG_SYS_I2C_SLAVE to 0. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2299 | |
Eric Millbrandt | 5da71ef | 2009-09-03 08:09:44 -0500 | [diff] [blame] | 2300 | CONFIG_SYS_I2C_INIT_MPC5XXX |
| 2301 | |
| 2302 | When a board is reset during an i2c bus transfer |
| 2303 | chips might think that the current transfer is still |
| 2304 | in progress. Reset the slave devices by sending start |
| 2305 | commands until the slave device responds. |
| 2306 | |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 2307 | That's all that's required for CONFIG_HARD_I2C. |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2308 | |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2309 | If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2310 | then the following macros need to be defined (examples are |
| 2311 | from include/configs/lwmon.h): |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2312 | |
| 2313 | I2C_INIT |
| 2314 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2315 | (Optional). Any commands necessary to enable the I2C |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 2316 | controller or configure ports. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2317 | |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 2318 | eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2319 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2320 | I2C_PORT |
| 2321 | |
wdenk | 43d9616 | 2003-03-06 00:02:04 +0000 | [diff] [blame] | 2322 | (Only for MPC8260 CPU). The I/O port to use (the code |
| 2323 | assumes both bits are on the same port). Valid values |
| 2324 | are 0..3 for ports A..D. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2325 | |
| 2326 | I2C_ACTIVE |
| 2327 | |
| 2328 | The code necessary to make the I2C data line active |
| 2329 | (driven). If the data line is open collector, this |
| 2330 | define can be null. |
| 2331 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2332 | eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) |
| 2333 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2334 | I2C_TRISTATE |
| 2335 | |
| 2336 | The code necessary to make the I2C data line tri-stated |
| 2337 | (inactive). If the data line is open collector, this |
| 2338 | define can be null. |
| 2339 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2340 | eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) |
| 2341 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2342 | I2C_READ |
| 2343 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 2344 | Code that returns true if the I2C data line is high, |
| 2345 | false if it is low. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2346 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2347 | eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) |
| 2348 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2349 | I2C_SDA(bit) |
| 2350 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 2351 | If <bit> is true, sets the I2C data line high. If it |
| 2352 | is false, it clears it (low). |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2353 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2354 | eg: #define I2C_SDA(bit) \ |
wdenk | 2535d60 | 2003-07-17 23:16:40 +0000 | [diff] [blame] | 2355 | if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 2356 | else immr->im_cpm.cp_pbdat &= ~PB_SDA |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2357 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2358 | I2C_SCL(bit) |
| 2359 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 2360 | If <bit> is true, sets the I2C clock line high. If it |
| 2361 | is false, it clears it (low). |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2362 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2363 | eg: #define I2C_SCL(bit) \ |
wdenk | 2535d60 | 2003-07-17 23:16:40 +0000 | [diff] [blame] | 2364 | if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ |
wdenk | ba56f62 | 2004-02-06 23:19:44 +0000 | [diff] [blame] | 2365 | else immr->im_cpm.cp_pbdat &= ~PB_SCL |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2366 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2367 | I2C_DELAY |
| 2368 | |
| 2369 | This delay is invoked four times per clock cycle so this |
| 2370 | controls the rate of data transfer. The data rate thus |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2371 | is 1 / (I2C_DELAY * 4). Often defined to be something |
wdenk | 945af8d | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 2372 | like: |
| 2373 | |
wdenk | b37c7e5 | 2003-06-30 16:24:52 +0000 | [diff] [blame] | 2374 | #define I2C_DELAY udelay(2) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2375 | |
Mike Frysinger | 793b572 | 2010-07-21 13:38:02 -0400 | [diff] [blame] | 2376 | CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA |
| 2377 | |
| 2378 | If your arch supports the generic GPIO framework (asm/gpio.h), |
| 2379 | then you may alternatively define the two GPIOs that are to be |
| 2380 | used as SCL / SDA. Any of the previous I2C_xxx macros will |
| 2381 | have GPIO-based defaults assigned to them as appropriate. |
| 2382 | |
| 2383 | You should define these to the GPIO value as given directly to |
| 2384 | the generic GPIO functions. |
| 2385 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2386 | CONFIG_SYS_I2C_INIT_BOARD |
wdenk | 47cd00f | 2003-03-06 13:39:27 +0000 | [diff] [blame] | 2387 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 2388 | When a board is reset during an i2c bus transfer |
| 2389 | chips might think that the current transfer is still |
| 2390 | in progress. On some boards it is possible to access |
| 2391 | the i2c SCLK line directly, either by using the |
| 2392 | processor pin as a GPIO or by having a second pin |
| 2393 | connected to the bus. If this option is defined a |
| 2394 | custom i2c_init_board() routine in boards/xxx/board.c |
| 2395 | is run early in the boot sequence. |
wdenk | 47cd00f | 2003-03-06 13:39:27 +0000 | [diff] [blame] | 2396 | |
Richard Retanubun | 26a3350 | 2010-04-12 15:08:17 -0400 | [diff] [blame] | 2397 | CONFIG_SYS_I2C_BOARD_LATE_INIT |
| 2398 | |
| 2399 | An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is |
| 2400 | defined a custom i2c_board_late_init() routine in |
| 2401 | boards/xxx/board.c is run AFTER the operations in i2c_init() |
| 2402 | is completed. This callpoint can be used to unreset i2c bus |
| 2403 | using CPU i2c controller register accesses for CPUs whose i2c |
| 2404 | controller provide such a method. It is called at the end of |
| 2405 | i2c_init() to allow i2c_init operations to setup the i2c bus |
| 2406 | controller on the CPU (e.g. setting bus speed & slave address). |
| 2407 | |
wdenk | 17ea117 | 2004-06-06 21:51:03 +0000 | [diff] [blame] | 2408 | CONFIG_I2CFAST (PPC405GP|PPC405EP only) |
| 2409 | |
| 2410 | This option enables configuration of bi_iic_fast[] flags |
| 2411 | in u-boot bd_info structure based on u-boot environment |
| 2412 | variable "i2cfast". (see also i2cfast) |
| 2413 | |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2414 | CONFIG_I2C_MULTI_BUS |
| 2415 | |
| 2416 | This option allows the use of multiple I2C buses, each of which |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 2417 | must have a controller. At any point in time, only one bus is |
| 2418 | active. To switch to a different bus, use the 'i2c dev' command. |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2419 | Note that bus numbering is zero-based. |
| 2420 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2421 | CONFIG_SYS_I2C_NOPROBES |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2422 | |
| 2423 | This option specifies a list of I2C devices that will be skipped |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 2424 | when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS |
Peter Tyser | 0f89c54 | 2009-04-18 22:34:03 -0500 | [diff] [blame] | 2425 | is set, specify a list of bus-device pairs. Otherwise, specify |
| 2426 | a 1D array of device addresses |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2427 | |
| 2428 | e.g. |
| 2429 | #undef CONFIG_I2C_MULTI_BUS |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 2430 | #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68} |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2431 | |
| 2432 | will skip addresses 0x50 and 0x68 on a board with one I2C bus |
| 2433 | |
Wolfgang Denk | c0f4085 | 2011-10-26 10:21:21 +0000 | [diff] [blame] | 2434 | #define CONFIG_I2C_MULTI_BUS |
Simon Glass | 945a18e | 2016-10-02 18:01:05 -0600 | [diff] [blame] | 2435 | #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} |
Ben Warren | bb99ad6 | 2006-09-07 16:50:54 -0400 | [diff] [blame] | 2436 | |
| 2437 | will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 |
| 2438 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2439 | CONFIG_SYS_SPD_BUS_NUM |
Timur Tabi | be5e618 | 2006-11-03 19:15:00 -0600 | [diff] [blame] | 2440 | |
| 2441 | If defined, then this indicates the I2C bus number for DDR SPD. |
| 2442 | If not defined, then U-Boot assumes that SPD is on I2C bus 0. |
| 2443 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2444 | CONFIG_SYS_RTC_BUS_NUM |
Stefan Roese | 0dc018e | 2007-02-20 10:51:26 +0100 | [diff] [blame] | 2445 | |
| 2446 | If defined, then this indicates the I2C bus number for the RTC. |
| 2447 | If not defined, then U-Boot assumes that RTC is on I2C bus 0. |
| 2448 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2449 | CONFIG_SYS_DTT_BUS_NUM |
Stefan Roese | 0dc018e | 2007-02-20 10:51:26 +0100 | [diff] [blame] | 2450 | |
| 2451 | If defined, then this indicates the I2C bus number for the DTT. |
| 2452 | If not defined, then U-Boot assumes that DTT is on I2C bus 0. |
| 2453 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 2454 | CONFIG_SYS_I2C_DTT_ADDR: |
Victor Gallardo | 9ebbb54 | 2008-09-09 15:13:29 -0700 | [diff] [blame] | 2455 | |
| 2456 | If defined, specifies the I2C address of the DTT device. |
| |